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1. ziadmali59 ziadmali59 Public

   Config files for my GitHub profile.

2. Single-Cycle-RISC-V-32I-Processor Single-Cycle-RISC-V-32I-Processor Public

   Verilog

3. Memory_Swapper Memory_Swapper Public

   Swap Two Memory loaction using FSM

   Verilog

4. Booth_Algorithm Booth_Algorithm Public

   implemented using verilog based on FSM concepts

   Verilog

5. Advanced_Encryption_Standard Advanced_Encryption_Standard Public

   Implementation of AES-128-bit encryption

   Verilog

6. Spartan6---DSP48A1 Spartan6---DSP48A1 Public

   The Spartan-6 family offers a high ratio of DSP48A1 slices to logic, making it ideal for math-intensive applications.

   Verilog