Si9243EY
Single-Ended Bus Transceiver
Features
Single-Ended Transceiver Fault Detection
Survives Shorts and Transients on Automotive Bus ISO 9141 Compatible
Wide Power Supply Voltage Range
Description
The Si9243EY is a monolithic bus transceiver designed to VBAT to protect the IC. The fault will be reset when TX
provide bidirectional serial communication in automotive toggles “high.”
diagnostic applications.
TX is set “high” for receive only.
The device incorporates protection against overvoltages
The RX output is capable of driving CMOS or
and short circuits to GND or VB. The transceiver pin is
1 LSTTL load.
protected and can be driven beyond the VBAT voltage.
The Si9243EY is built on the Siliconix BiC/DMOS
The Si9243EY contains temperature and short circuit process. This process supports bipolar transistors,
fault detection circuits. In the transmit mode, load shorts CMOS, and DMOS. An epitaxial layer prevents latchup.
and opens are generally detected by the processor
monitoring RXK and TX. When the two mirror each other The Si9243EY is available in a 8-pin SO package and
there is no fault, but the Si9243EY will turn off the K operates over the automotive temperature range (–40 to
output in the event of over temperature or short circuit to 125C).
Pin Configuration and Functional Block Diagram
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Updates to this data sheet may be obtained via facsimile by calling Siliconix FaxBack, 1-408-970-5600. Please request FaxBack document #70017.
Application Note AN602 may also be obtained via FaxBack, request document #70573.
S-49720—Rev. E, 27-Sep-96 1
Si9243EY
Output Table and State Diagrams
Over Temp State Output
Inputs Variable Table
Power On A=1 A=0 TX A B K RXK L RXL Comments
0 1 1 0 0 0 0
Over Temp S TX 1 1 1 1 1 1 1
Short Circuit 0 1 1 0 0 1 1
1 1 1 1 1 0 0
Power On B=1 B=0 X 0 1 HiZ K L L Over Temp
0 1 0 HiZ 1 L L Short Circuit
TX
1 1 1 1 1 1 1 Receive Mode
1 1 1 0 0 0 0
Note: Over Temp is a condition and not meant to be a logic signal.
X = “1” or “0”
HiZ = High Impedance State
Absolute Maximum Ratings
Voltage Referenced to Ground Voltage on VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Voltage On VBAT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 V Short Circuit Duration (to VBAT or GND) . . . . . . . . . . . . . Continuous
Voltage K , L . . . . . . . . . . . . . . . . . . . . . . . . . . . –16 V to VBAT + 1 V Operating Temperature (TA) . . . . . . . . . . . . . . . . . . . . . –40 to 125C
Voltage On Any Pin (Except VBAT , K, L) Junction and Storage Temperature . . . . . . . . . . . . . . . . . . -55 to 150C
or Max. Current . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V or 10 mA Thermal Resistance JA . . . . . . . . . . . . . . . . . . . . . . . . . . . 125C/W
Limits
Test Conditions
E Suffix: –40 to 125C
Unless Otherw se Spec
Otherwise f ed
Specified
Parameter Symbol VDD = 4.5 to 5.5 V, VBAT = 7.25 to 35 V Tempa Minb Typc Maxb Unit
Transmitter and Logic Levels
TX Input Low Voltage VILT Full 1.5
TX Input High Voltage VIHT Full 3.5
RL = 510 , CL = 10 nF
Full 4.9 V
VBAT = 35 V, VDD = 4.5 V
p Low Voltage
K Output g VO
OLK
Full 0.2 VBAT
RL = 510
, CL = 10 nF
F
K Output High Voltage VOHK Full 0.91 VBAT
See Test Circuit
K Rise, Fall Times tr, tf Full 9.6 s
K Output Sink Resistance Rsi Full 110
TX = 0 V
K Output Capacitanced CO Full 20
pF
TX Input Capacitanced CINT Full 10
TX Input Current IINT VDD = 5.5 V, TX = 1.5 V, 3.5 V Full –60 –4 A
2 S-49720—Rev. E, 27-Sep-96
Si9243EY
Limits
Test Conditions
E Suffix: –40 to 125C
Unless Otherw
Otherwise Specified
se Spec f ed
Parameter Symbol VDD = 4.5 to 5.5 V, VB = 7.25 to 35 V Tempa Minb Typc Maxb Unit
Receiver
L and K Input Low Voltage VILK Full 0.4 VBAT 0.33 VBAT
L and K Input High Voltage VIHK Full 0.7 VBAT 0.6 VBAT
L and K Input Hysteresisd VHYS Full 0.1 VBAT
V
RXL and RXK VILK , VILL = 0.33 VBAT
VOLR Full 0.4
Output Low Voltage IOLR = 1 mA
TX = 4 V VIHK , VIHL = 0.70 VBAT
RXL and RXK High Voltage VOHR Full 4
IOHR = –40 A
L and K Input Currents IIHK VIHK = VB Full 1.5 20 A
Supplies
Bat Supply Current IBAT TX = 1.5 V, K, L Open Full 2.7 5.0
mA
Logic Supply Current IDD TX = 1.5 V, K, L Open Full 1 3.0
Miscellaneous
Baud Rate BR RL = 510 , CL = 10 nF Full 10.4 kBaud
TX Minimum Pulse Widthd, e tTX Full 1 s
a. Room = 25C, Cold and Hot = as determined by the operating temperature suffix.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. Guaranteed by design, not subject to production test.
e. Minimum pulse width to reset a fault condition.
Test Circuit
VDD VBAT
VBAT
RL
K 80% 80%
TX
CL
20% 20%
Si9243EY
VK
tr tf
GND
S-49720—Rev. E, 27-Sep-96 3
Si9243EY
Application Circuit
ECU Diagnostic Tester
VB
K-Line
510
I/Os Microcontroller
0.4
L-Line
VDD
Si9243EY
Bus
ECU = Electronic Control Unit
4 S-49720—Rev. E, 27-Sep-96
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