DG641, DG642, DG643

Vishay Siliconix

Low On-Resistance Wideband/Video Switches

DESCRIPTION FEATURES
The DG641, DG642, DG643 are high performance • Wide bandwidth: 500 MHz
monolithic video switches designed for switching wide • Low crosstalk at 5 MHz: - 85 dB
bandwidth analog and digital signals. DG641 is a quad • Low RDS(on): 5 , DG642
SPST, DG642 is a single SPDT, and DG643 is a dual SPDT • TTL logic compatible
function. These devices have exceptionally low • Fast switching: tON 50 ns
• Single supply compatibility
on-resistances (5 typ-DG642), low capacitance and high
• High current: 100 mA, DG642
current handling capability.
BENEFITS
To achieve TTL compatibility, low channel capacitances and • High precision
fast switching times, the DG641, DG642, DG643 are built on • Improved frequency response
the Vishay Siliconix proprietary D/CMOS process. Each • Low insertion loss
switch conducts equally well in both directions when on, and • Improved system performance
blocks up to 14 Vp-p when off. An epitaxial layer prevents • Reduced board space
latchup. • Low power consumption
APPLICATIONS
• RF and video switching
• RGB switching
• Video routing
• Cellular communications
• ATE
• Radar/FLIR systems
• Satellite receivers
• Programmable filters

FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION

Dual-In-Line and SOIC Dual-In-Line and SOIC

IN1 1 16 IN2 IN1 1 16 IN2

Dual-In-Line and SOIC
D1 2 15 D2 D1 2 15 D2

S1 3 14 S2 S1 1 8 IN GND 3 14 GND

V- 4 13 V+ D1 2 7 V+ S1 4 13 S2
DG641
GND 5 12 GND V- 3 6 D2 V- 5 12 V+

S4 6 11 S3 GND 4 5 S2 S4 6 11 S3
DG642
D4 7 10 D3 GND 7 10 GND
Top View
IN4 8 9 IN3 D4 8 9 D3
DG643
Top View Top View

TRUTH TABLE (DG641) TRUTH TABLE (DG642) TRUTH TABLE (DG643)

Logic Switch Logic SW1 SW2 Logic SW1, SW2 SW3, SW4
0 OFF 0 OFF ON 0 OFF ON
1 ON 1 ON OFF 1 ON OFF
Logic “0” 0.8 V Logic “0” 0.8 V Logic “0” 0.8 V
Logic “1”  2.4 V Logic “1”  2.4 V Logic “1”2.4 V

Document Number: 70058 www.vishay.com

S11-0154-Rev. F, 31-Jan-11 1
DG641, DG642, DG643
Vishay Siliconix

ORDERING INFORMATION
Temp. Range Package Part Number
DG641
16-Pin Plastic DIP DG641DJ
- 40 °C to 85 °C
16-Pin Narrow SOIC DG641DY
DG642
8-Pin Plastic DIP DG642DJ
- 40 °C to 85 °C
8-Pin Narrow SOIC DG642DY
DG643
16-Pin Plastic DIP DG643DJ
- 40 °C to 85 °C
16-Pin Narrow SOIC DG643DY

ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)

Parameter Symbol Limit Unit
V+ to V- - 0.3 to 21
V+ to GND - 0.3 to 21
V- to GND - 19 to + 0.3
(V-) - 0.3 V to (V+) + 0.3 V V
Digital Inputs
or 20 mA, whichever occurs first
(V-) - 0.3 V to (V+) + 14 V
VS, VD
or 20 mA, whichever occurs first
Continuous Current (Any terminal except S or D) 20
DG641, DG643 75
Continuous Current S or D
DG642 100 mA
Current, S or D DG641, DG643 200
(Pulsed at 1 ms, 10 % duty cycle max) DG642 300
Storage Temperature - 65 to 125 °C
8-Pin Plastic DIP and Narrow SOICc 300
Power Dissipation (Package)b 16-Pin Plastic DIPd 470 mW
16-Pin Narrow SOICe 600
Notes:
a. Signals on SX, DX, or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC board.
c. Derate 7.6 mW/°C above 75 °C.
d. Derate 6 mW/°C above 75 °C.
e. Derate 80 mW/°C above 75 °C.

SCHEMATIC DIAGRAM (Typical Channel)

V+

5V S
GND Reg

IN

V-

Figure 1.

www.vishay.com Document Number: 70058

2 S11-0154-Rev. F, 31-Jan-11
 DG641, DG642, DG643
Vishay Siliconix

SPECIFICATIONS (for DG641 and DG643)

Test Conditions Limits
Unless Otherwise Specified - 40 °C to 85 °C
V+ = 15 V, V- = - 3 V
Parameter Symbol VINH = 2.4 V, VINL = 0.8 Ve Temp.a Min.b Typ.c Max.b Unit
Analog Switch
V- = - 5 V, V+ = 12 V Full -5 8
Analog Signal Ranged VANALOG V
V- = GND V, V+ = 12 V Full 0 8
Room 8 15
Drain-Source On-Resistance RDS(on)
IS = - 10 mA, VD = 0 V Full 20 
RDS(on) Match RDS(on) Room 1 2
Room - 10 - 0.02 10
Source Off Leakage Current IS(off) VS = 0 V, VD = 10 V
Full - 100 100
Room - 10 - 0.02 10
Drain Off Leakage Current ID(off) VS = 10 V, VD = 0 V nA
Full - 100 100
Room - 10 - 0.1 10
Channel On Leakage Current ID(on) VS = V D = 0 V
Full - 100 100
Digital Control
Input Voltage High VINH Full 2.4
V
Input Voltage Low VINL Full 0.8
Room -1 0.05 1
Input Current IIN VIN = GND or V+ µA
Full - 20 20
Dynamic Characteristics
On State Input Capacitanced CS(on) VS = V D = 0 V Room 10 20
Off State Output Capacitanced CS(off) VS = 0 V Room 4 12 pF
Off State Input Capacitanced CD(off) VD = 0 V Room 4 12
Bandwidth BW RL = 50 see figure 6 Room 500 MHz
Room 50 70
Turn On Time tON
RL = 1 kCL = 35 pF Full 140
ns
see figure 2 Room 28 50
Turn Off Time tOFF
Full 85
CL = 1000 pF, VD = 0 V
Charge Injection Q Room - 19 pC
see figure 3
RIN = 75 RL = 75 
Off Isolation OIRR Room - 60
f = 5 MHz, see figure 4
dB
RIN = 10 , RL = 75 
All Hostie Crosstalk XTALK Room - 87
f = 5 MHz, see figure 5
Power Supplies
Room 3.5 6
Positive Supply Current I+
Full 9
VIN = 0 V or VIN = 5 V mA
Room -6 -3
Negative Supply Current I-
Full -9
Notes:
a. Room = 25 °C, Full = as determined by the operating temperature suffix.
b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Guaranteed by design, not subject to production test.
e. VIN = input voltage to perform proper function.

Document Number: 70058 www.vishay.com

S11-0154-Rev. F, 31-Jan-11 3
DG641, DG642, DG643
Vishay Siliconix

SPECIFICATIONS (for DG642)

Test Conditions Limits
Unless Otherwise Specified - 40 °C to 85 °C
V+ = 15 V, V- = - 3 V
Parameter Symbol VINH = 2.4 V, VINL = 0.8 Ve Temp.a Min.b Typ.c Max.b Unit
Analog Switch
V- = - 5 V, V+ = 12 V Full -5 8
Analog Signal Ranged VANALOG V
V- = GND V, V+ = 12 V Full 0 8
Room 5 8
Drain-Source On-Resistance RDS(on)
IS = - 10 mA, VD = 0 V Full 9 
RDS(on) Match RDS(on) Room 0.5 1
Room - 10 - 0.04 10
Source Off Leakage Current IS(off) VS = 0 V, VD = 10 V
Full - 200 200
Room - 10 - 0.04 10
Drain Off Leakage Current ID(off) VS = 10 V, VD = 0 V nA
Full - 200 200
Room - 10 - 0.2 10
Channel On Leakage Current ID(on) VS = V D = 0 V
Full - 200 200
Digital Control
Input Voltage High VINH Full 2.4
V
Input Voltage Low VINL Full 0.8
Room -1 0.05 1
Input Current IIN VIN = GND or V+ µA
Full - 20 20
Dynamic Characteristics
On State Input Capacitanced CS(on) VS = V D = 0 V Room 19 40
Off State Input Capacitanced CS(off) VD = 0 V Room 8 20 pF
Off State Output Capacitanced CD(off) VS = 0 V Room 8 20
Bandwidth BW RL = 50 see figure 6 Room 500 MHz
Room 60 100
Turn On Time tON
RL = 1 kCL = 35 pF Full 160
ns
see figure 2 Room 40 60
Turn Off Time tOFF
Full 100
CL = 1000 pF, VD = 0 V
Charge Injection Q Room - 40 pC
see figure 3
RIN = 75 RL = 75 
Off Isolation Room - 63
f = 5 MHz, see figure 4
dB
RIN = 10 , RL = 75 
All Hostie Crosstalk XTALK(AH) Room - 85
f = 5 MHz, see figure 5
Power Supplies
Room 3.5 6
Positive Supply Current I+
Full 9
VIN = 0 V or VIN = 5 V mA
Room -6 -3
Negative Supply Current I-
Full -9
Notes:
a. Room = 25 °C, Full = as determined by the operating temperature suffix.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. Guaranteed by design, not subject to production test.
e. VIN = input voltage to perform proper function.

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.

www.vishay.com Document Number: 70058

4 S11-0154-Rev. F, 31-Jan-11
 DG641, DG642, DG643
Vishay Siliconix
TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted)
6 100 nA

5
10 nA
4
I+
3
1 nA
2

I S(off)
Current (mA)

I D(off) ,
IGND 100 pA
0
-1
10 pA
-2
I-
-3 1 pA
-4
-5 0.1 pA
- 55 - 35 - 15 5 25 45 65 85 105 125 - 55 - 25 0 25 50 75 100 125

Temperature (°C) Temperature (°C)

Supply Current vs. Temperature Leakages vs. Temperature

40 20
V+ = 15 V V+ = 15 V

R DS(on) - Drain-Source On-Resistance ()

R DS(on) - Drain-Source On-Resistance ()

V- = - 3 V V- = - 3 V

30 15

125 °C 125 °C

20 25 °C 10 25 °C

- 55 °C - 55 °C
10 5

0 0
-3 -1 1 3 5 7 9 11 -3 -1 1 3 5 7 9 11

VD - Drain V oltage (V) VD - Drain Voltage (V)

DG641, DG643 DG642
RDS(on) vs. Drain Voltage RDS(on) vs. Drain Voltage

22 120
V+ = 15 V, V- = - 15 V
VL = 5 V, V IN = 3 V Pulse tON
20
100

18
80
t ON, t OFF (ns)

16
C (pF)

tOFF
14 60
DG642
12
40

10

DG641, DG643 20
8

6 0
0 2 4 6 8 10 12 - 55 - 40 - 20 0 20 40 60 80 100 120

(VD) - (V-) Temperature (°C)

On Capacitance Off Isolation

Document Number: 70058 www.vishay.com

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DG641, DG642, DG643
Vishay Siliconix
TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted)
80 140

120 DG417, DG418, DG419

Source 2
70
tON 100
V- = 0 V
t ON, t OFF (ns)

VL = 5 V DG419
VIN = 3 V 80 Source 1

(dB)
60
60

40
50 V+ = 15 V
tOFF V- = - 15 V
20 VL = 5 V

40 0
± 10 ± 11 ± 12 ± 13 ± 14 ± 15 ± 16 100 1k 10 k 100 k 1M 10 M 100 M
Supply Voltage (V) f - Frequency (Hz)
All Hostile Crosstalk Charge Injection vs. VD

90 20
80

70 18
V+ - Positive Supply Voltage (V)

60
tON
16
t (ns)

50

40
14 Operating
Voltage
30 Area

20 tOFF
12
10

0
10
- 55 - 25 0 25 50 75 100 125
0 -1 -2 -3 -4 -5 -6
Temperature (°C)
V- - Negative Supply (V)
Switching Times vs. Temperature
Operating Supply Voltage Range

TEST CIRCUITS

+ 15 V

tr < 20 ns
3V tf < 20 ns
V+ Logic
50 %
S D Input
3V VO

IN
3V RL CL
GND V- 1 k 35 pF 90 % 90 %
Switch
Output 0

-3V tON tOFF

Figure 2. Switching Time

www.vishay.com Document Number: 70058

6 S11-0154-Rev. F, 31-Jan-11
 DG641, DG642, DG643
Vishay Siliconix
TEST CIRCUITS

+ 15 V

VO VO
V+
Rg
S D
VO
ON ON
Vg IN CL INX OFF
3V 1000 pF
GND V-
V O = measured voltage error due to charge injection
The charge injection in coulombs is Q = CL x VO
-3V

Figure 3. Charge Injection

+ 15 V

V+
VS S D
VO
Rg = 50 
RL
IN
0 V, 2.4 V

GND V- C

-3V

VS
Off Isolation = 20 log
VO

Figure 4. Off Isolation

DG641 DG642
S1 VOUT
D1
S1 D1 VOUT
S2 D2 RL RIN
RIN 75  10  S2 D2 RL
10  75 
S3 D3
RL
RL
RL Signal
S4 D4 Generator V
75 
RL "0"
Signal
(b)
Generator V
75 
VOUT
"1" XTALK(AH) = 20 log10
V
(a)
Figure 5. All Hostile Crosstalk - XTALK(AH)

Document Number: 70058 www.vishay.com

S11-0154-Rev. F, 31-Jan-11 7
DG641, DG642, DG643
Vishay Siliconix
TEST CIRCUITS

+ 15 V

V+
S D
VOUT
Signal
Generator V- RL
50  50 

-3V

Figure 6. Bandwidth

APPLICATIONS 2. The value of on capacitance [CS(on)] may be reduced.

Device Description A property known as ‘the body-effect’ on the DMOS
switch devices causes various parametric effects to
The DG641, DG642, DG643 switches offer true bidirectional
occur. One of these effects is the reduction in CS(on)
switching of high frequency analog or digital signals with
for an increasing V body-source. Note however that
minimum signal crosstalk, low insertion loss, and negligible
to increase V- normally requires V+ to be reduced
non-linearity distortion and group delay.
(since V+ to V- = 21 V max.). A reduction in V+
Built on the Siliconix D/CMOS process, these switches causes an increase in rDS(on), hence a compromise
provide excellent off-isolation with a bandwidth of around has to be achieved. It is also useful to note that tests
500 MHz. The silicon-gate D/CMOS processing also yields indicate that optimum video linearity performance
fast switching speeds. (e.g., differential phase and gain) occurs when V- is
An on-chip regulator circuit maintains TTL input compatibility around - 3 V.
over the whole operating supply voltage range shown, 3. V- eliminates the need to bias the analog signal using
easing control logic interfacing. potential dividers and large coupling capacitors.
Circuit layout is facilitated by the interchangeability of source Decoupling
and drain terminals. It is an established rf design practice to incorporate sufficient
Frequency Response bypass capacitors in the circuit to decouple the power
A single switch on-channel exhibits both resistance [RDS(on)] supplies to all active devices in the circuit. The dynamic
and capacitance [CS(on)]. This RC combination has an performance of the DG641, DG642, DG643 series is
attenuation effect on the analog signal - which is frequency adversely affected by poor decoupling of power supply pins.
dependent (like an RC low-pass filter). The - 3 dB bandwidth Also, of even more significance, since the substrate of the
of the DG641, DG642, DG643 is typically 500 MHz (into device is connected to the negative supply, adequate
50 ). decoupling of this pin is essential. Suitable decoupling
capacitors are 1- to 10 µF tantalum bead, plus 10- to 100-nF
Power Supplies ceramic or polyester.
Power supply flexibility is a useful feature of the DG641,
Rules:
DG642, DG643 series. It can be operated from a single
positive supply (V+) if required (V- connected to ground). 1. Decoupling capacitors should be incorporated on all
power supply pins (V+, V-). (see figure 7).
Note that the analog signal must not exceed V- by more than
- 0.3 V to prevent forward biasing the substrate p-n junction. 2. They should be mounted as close as possible to the
The use of a V- supply has a number of advantages: device pins.
1. It allows flexibility in analog signal handling, i.e., with 3. Capacitors should be of a suitable type with good high
V- = - 5 V and V+ = 12 V; up to ± 5 V ac signals can frequency characteristics - tantalum bead and/or
be controlled. ceramic disc types are adequate.

www.vishay.com Document Number: 70058

8 S11-0154-Rev. F, 31-Jan-11
 DG641, DG642, DG643
Vishay Siliconix
APPLICATIONS
Board Layout
+ 15 V
PCB layout rules for good high frequency performance must
+ also be observed to achieve the performance boasted by
C1 C2 these analog switches. Some tips for minimizing stray effects
are:
V+ 1. Use extensive ground planes on double sided PCB,
S1 D1
S2 D2
separating adjacent signal paths. Multilayer PCB is
DG64X even better.
S3 D3
S4 D4 2. Keep signal paths as short as practically possible,
V-
GNDs with all channel paths of near equal length.

3. Careful arrangement of ground connections is also

C1 C2 very important. Star connected system grounds
C1 = 10 µF Tantalum + eliminate signal current, flowing through ground path
C2 = 0.1 µF Ceramic
parasitic resistance, from coupling between
-3V
channels.
Figure 7. Supply Decoupling
Figure 8 shows a 4-channel video multiplexer using a
DG641.

In Figure 9, two coax cables terminated on 75  bring two

video signals to the DG642 switch. The two drains tied
together lower the on-state capacitance. An Si582 video
amplifier drives a double terminated 75  cable. The double
terminated coax cable eliminates line reflections.

+ 15 V

V+
CH1

CH2
Si582
75  CH3 + 75 
A=2
75  CH4 -
DIS

250 
75  DG641
V-
75 
250 

-3V
TTL Channel Select
Figure 8. 4 by 1 Video Multiplexing Using the DG641

Document Number: 70058 www.vishay.com

S11-0154-Rev. F, 31-Jan-11 9
DG641, DG642, DG643
Vishay Siliconix
APPLICATIONS

+ 15 V

V+
CH1
S1 D1 Si582
+ VOUT
CH2 S2 D2 75 
A=2
75 
- RL
DIS 75 
DG642
75  V- 250 

250 

TTL Channel Select -3V

Figure 9. 2-Channel Video Selector Using the DG642

IN2
fc SELECT
S2 D2 C1

S3 D3 C2

1/ DG643
2

D1 S1
CH1
R1 R3
D4 S4
CH2 -
IN1 LF401
CH SELECT VOUT
1/ +
2 DG643
1
R2 fc  2 R 3C x

Figure 10. Active Low Pass Filter with Selectable Inputs and Break Frequencies

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?70058.

www.vishay.com Document Number: 70058

10 S11-0154-Rev. F, 31-Jan-11
 Package Information
Vishay Siliconix

SOIC (NARROW): 8-LEAD

JEDEC Part Number: MS-012

8 7 6 5

E H

1 2 3 4

D h x 45
C
0.25 mm (Gage Plane)
A
All Leads

q 0.101 mm
e B A1 L
0.004"

MILLIMETERS INCHES
DIM Min Max Min Max
A 1.35 1.75 0.053 0.069
A1 0.10 0.20 0.004 0.008
B 0.35 0.51 0.014 0.020
C 0.19 0.25 0.0075 0.010
D 4.80 5.00 0.189 0.196
E 3.80 4.00 0.150 0.157
e 1.27 BSC 0.050 BSC
H 5.80 6.20 0.228 0.244
h 0.25 0.50 0.010 0.020
L 0.50 0.93 0.020 0.037
q 0° 8° 0° 8°
S 0.44 0.64 0.018 0.026
ECN: C-06527-Rev. I, 11-Sep-06
DWG: 5498

Document Number: 71192 www.vishay.com

11-Sep-06 1
 Package Information
Vishay Siliconix

SOIC (NARROW): 16ĆLEAD

JEDEC Part Number: MS-012

MILLIMETERS INCHES
Dim Min Max Min Max
A 1.35 1.75 0.053 0.069
A1 0.10 0.20 0.004 0.008
B 0.38 0.51 0.015 0.020
C 0.18 0.23 0.007 0.009
D 9.80 10.00 0.385 0.393
E 3.80 4.00 0.149 0.157
16 15 14 13 12 11 10 9 e 1.27 BSC 0.050 BSC

E H 5.80 6.20 0.228 0.244

L 0.50 0.93 0.020 0.037
1 2 3 4 5 6 7 8
Ĭ 0_ 8_ 0_ 8_
ECN: S-03946—Rev. F, 09-Jul-01
DWG: 5300

D H
C

All Leads
0.101 mm
A1 Ĭ
e B L
0.004 IN

Document Number: 71194 www.vishay.com

02-Jul-01 1
 Package Information
Vishay Siliconix

PDIP: 8ĆLEAD

MILLIMETERS INCHES
Dim Min Max Min Max
8 7 6 5 A 3.81 5.08 0.150 0.200

E A1 0.38 1.27 0.015 0.050

E1
B 0.38 0.51 0.015 0.020
1 2 3 4 B1 0.89 1.65 0.035 0.065
C 0.20 0.30 0.008 0.012
D 9.02 10.92 0.355 0.430
E 7.62 8.26 0.300 0.325
E1 5.59 7.11 0.220 0.280
D e1 2.29 2.79 0.090 0.110
S eA 7.37 7.87 0.290 0.310
Q1
L 2.79 3.81 0.110 0.150
Q1 1.27 2.03 0.050 0.080
A
S 0.76 1.65 0.030 0.065
ECN: S-03946—Rev. E, 09-Jul-01
DWG: 5478
A1 L

15° NOTE: End leads may be half leads.

e1 MAX
C
B1 B eA

Document Number: 71259 www.vishay.com

05-Jul-01 1
 Package Information
Vishay Siliconix

PDIP: 16ĆLEAD

16 15 14 13 12 11 10 9

E1 E

1 2 3 4 5 6 7 8

D
S
Q1

A1 L

15°
C MAX
B1 e1 B eA

MILLIMETERS INCHES
Dim Min Max Min Max
A 3.81 5.08 0.150 0.200
A1 0.38 1.27 0.015 0.050
B 0.38 0.51 0.015 0.020
B1 0.89 1.65 0.035 0.065
C 0.20 0.30 0.008 0.012
D 18.93 21.33 0.745 0.840
E 7.62 8.26 0.300 0.325
E1 5.59 7.11 0.220 0.280
e1 2.29 2.79 0.090 0.110
eA 7.37 7.87 0.290 0.310
L 2.79 3.81 0.110 0.150
Q1 1.27 2.03 0.050 0.080
S 0.38 1.52 .015 0.060
ECN: S-03946—Rev. D, 09-Jul-01
DWG: 5482

Document Number: 71261 www.vishay.com

06-Jul-01 1
 Application Note 826
Vishay Siliconix

RECOMMENDED MINIMUM PADS FOR SO-8

0.172
(4.369)
0.028
(0.711)
(6.248)

(3.861)
0.246

0.152
(1.194)
0.047

0.022 0.050
(0.559) (1.270)

Recommended Minimum Pads

Dimensions in Inches/(mm)

Return to Index
Return to Index
APPLICATION NOTE

www.vishay.com Document Number: 72606

22 Revision: 21-Jan-08
 Application Note 826
Vishay Siliconix

RECOMMENDED MINIMUM PADS FOR SO-16

RECOMMENDED MINIMUM PADS FOR SO-16

0.372
(9.449)

0.047
(1.194)
(6.248)

(3.861)
0.246

0.152
0.022 0.050 0.028
(0.559) (1.270) (0.711)

Recommended Minimum Pads

Dimensions in Inches/(mm)

Return to Index
Return to Index
APPLICATION NOTE

www.vishay.com Document Number: 72608

24 Revision: 21-Jan-08
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Disclaimer

ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.

Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.

Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular
purpose, non-infringement and merchantability.

Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of
typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding
statements about the suitability of products for a particular application. It is the customer’s responsibility to validate that a
particular product with the properties described in the product specification is suitable for use in a particular application.
Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over
time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s
technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.

Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk.
Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for
such applications.

No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document
or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.

© 2017 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED

Revision: 08-Feb-17 1 Document Number: 91000