DG441/442

Vishay Siliconix

Quad SPST CMOS Analog Switches

DESCRIPTION FEATURES
The DG441/442 monolithic quad analog switches are • Low On-Resistance: 50 Ω
designed to provide high speed, low error switching of • Low Leakage: 80 pA Pb-free
• Low Power Consumption: 0.2 mW Available
analog and audio signals. The DG441 has a normally closed
• Fast Switching Action-tON: 150 ns RoHS*
function. The DG442 has a normally open function. • Low Charge Injection-Q: - 1 pC COMPLIANT
Combining low on-resistance (50 Ω, typ.) with high speed • DG201A/DG202 Upgrades
(tON 150 ns, typ.), the DG441/442 are ideally suited for • TTL/CMOS-Compatible Logic
upgrading DG201A/202 sockets. Charge injection has been • Single Supply Capability
minimized on the drain for use in sample-and-hold circuits. BENEFITS
• Less Signal Errors and Distortion
To achieve high voltage ratings and superior switching • Reduced Power Supply Requirements
performance, the DG441/442 are built on Vishay Siliconix’s • Faster Throughput
high-voltage silicon-gate process. An epitaxial layer • Improved Reliability
• Reduced Pedestal Errors
prevents latchup.
• Simplifies Retrofit
• Simple Interfacing
Each switch conducts equally well in both directions when
on, and blocks input voltages to the supply levels when off. APPLICATIONS
• Audio Switching
• Battery Powered Systems
• Data Acquisition
• Hi-Rel Systems
• Sample-and-Hold Circuits
• Communication Systems
• Automatic Test Equipment
• Medical Instruments
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION

IN1 1 16 IN2 D1 IN1 NC IN2 D2

Key
3 2 1 20 19
D1 2 15 D2

S1 4 18 S2
S1 3 14 S2
V- 5 17 V+
LCC
V- 4 Dual-In-Line and SOIC 13 V+
6 16
NC DG441 NC
DG441
GND 5 12 NC 7 Top View
GND 15 NC
Top View
S4 8 14 S3
S4 6 11 S3

D4 7 10 D3 9 10 11 12 13

D4 IN4 NC IN3 D3
IN4 8 9 IN3

TRUTH TABLE
Logic DG441 DG442
0 ON OFF
1 OFF ON
Logic "0" ≤ 0.8 V
Logic "1" ≥ 2.4 V
* Pb containing terminations are not RoHS compliant, exemptions may apply

Document Number: 70053 www.vishay.com

S-71241–Rev. I, 25-Jun-07 1
DG441/442
Vishay Siliconix

ORDERING INFORMATION
Temp Range Package Part Number
DG441DJ
DG441DJ-E3
16-Pin Plastic DIP
DG442DJ
DG442DJ-E3
DG441DY
- 40 to 85 °C DG441DY-E3
DG441DY-T1
DG441DY-T1-E3
16-Pin Narrow SOIC
DG442DY
DG442DY-E3
DG442DY-T1
DG442DY-T1-E3

ABSOLUTE MAXIMUM RATINGS

Parameter Limit Unit
V+ to V- 44
GND to V- 25
V
(V-) - 2 to (V+) + 2
Digital Inputsa, VS, VD
or 30 mA, whichever occurs first
Continuous Current (Any Terminal) 30
mA
Current, S or D (Pulsed at 1 ms, 10 % duty cycle) 100
(AK Suffix) - 65 to 150
Storage Temperature °C
(DJ, DY Suffix) - 65 to 125
16-Pin Plastic DIPc 450
16-Pin CerDIPd 900
Power Dissipation (Package)b mW
16-Pin Narrow SOICd 900
LCC-20d 1200
Notes:
a. Signals on SX, DX, or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC Board.
c. Derate 6 mW/°C above 75 °C.
d. Derate 12 mW/°C above 75 °C.

SCHEMATIC DIAGRAM (TYPICAL CHANNEL)

V+

5 V Reg

V-
Level
INX Shift/
Drive

V+

GND

V-
Figure 1.
www.vishay.com Document Number: 70053
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 DG441/442
Vishay Siliconix

SPECIFICATIONSa FOR DUAL SUPPLIES

Test Conditions A Suffix D Suffix
Unless Otherwise Specified - 55 to 125 °C - 40 to 85 °C
V+ = 15 V, V- = - 15 V
Parameter Symbol VIN = 2.4 V, 0.8 Vf Tempb Typc Mind Maxd Mind Maxd Unit
Analog Switch
Analog Signal Rangee VANALOG Full - 15 15 - 15 15 V
Drain-Source IS = - 10 mA, VD = ± 8.5 V Room 50 85 85
rDS(on)
On-Resistance V+ = 13.5 V, V- = - 13.5 V Full 100 100
Ω
On-Resistance Match Between IS = - 10 mA, VD = ± 10 V Room 4 4
ΔrDS(on)
Channelse V+ = 15 V, V– = - 15 V Full 5 5

IS(off)
Room ± 0.01 - 0.5 0.5 - 0.5 0.5
V+ = 16.5, V- = - 16.5 V Full - 20 20 -5 5
Switch Off Leakage Current
VD = ± 15.5 V, VS = ± 15.5 V Room ± 0.01 - 0.5 0.5 - 0.5 0.5
ID(off) nA
Full - 20 20 -5 5
V+ = 16.5 V, V- = - 16.5 V Room ± 0.08 - 0.5 0.5 - 0.5 0.5
Channel On Leakage Current ID(on)
VS = VD = ± 15.5 V Full - 40 40 - 10 10
Digital Control
VIN under test = 0.8 V,
Input Current VIN Low IIL Full - 0.01 - 500 500 - 500 500
All Other = 2.4 V
nA
VIN under test = 2.4 V
Input Current VIN High IIH Full 0.01 - 500 500 - 500 500
All Other = 0.8 V
Dynamic Characteristics
Turn-On Time tON RL = 1 kΩ, CL = 35 pF Room 150 250 250
DG441 VS = ± 10 V Room 90 120 120 ns
Turn-Off Time tOFF
DG442 See Figure 2 Room 110 210 210
CL = 1 nF, VS = 0 V
Charge Injectione Q Room -1 pC
Vgen = 0 V, Rgen = 0 Ω
Off Isolatione OIRR RL = 50 Ω, CL = 5 pF Room 60
dB
Crosstalke (Channel-to-Channel) XTALK f = 1 MHz Room 100
Source Off Capacitancee CS(off) Room 4
f = 1 MHz
Drain Off Capacitancee CD(off) Room 4 pF
Channel On Capacitance e CD(on) VANALOG = 0 V Room 16
Power Supplies
Positive Supply Current I+ Full 15 100 100
V+ = 16.5 V, V- = - 16.5 V Room - 0.0001 -1 -1
Negative Supply Current I- µA
VIN = 0 or 5 V Full -5 -5
Ground Current IGND Full - 15 - 100 - 100

Document Number: 70053 www.vishay.com

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DG441/442
Vishay Siliconix

SPECIFICATIONSa FOR SINGLE SUPPLY

Test Conditions A Suffix D Suffix
Unless Otherwise Specified - 55 to 125 °C - 40 to 85 °C
V+ = 12 V, V- = 0 V
Parameter Symbol VIN = 2.4 V, 0.8 Vf Tempb Typc Mind Maxd Mind Maxd Unit
Analog Switch
Analog Signal Rangee VANALOG Full 0 12 0 12 V
Drain-Source IS = - 10 mA, VD = 3 V, 8 V Room 100 160 160
rDS(on) Ω
On-Resistance V+ = 10.8 V Full 200 200
Dynamic Characteristics
Turn-On Time tON RL = 1 kΩ, CL = 35 pF Room 300 450 450
VS = 8 V ns
Turn-Off Time tOFF Room 60 200 200
See Figure 2
Charge Injection Q CL = 1nF, Vgen = 6 V, Rgen = 0 Ω Room 2 pC
Power Supplies
Positive Supply Current I+ Full 15 100 100
V+ = 13.2 V, V- = 0 V Room - 0.0001 -1 -1
Negative Supply Current I- µA
VIN = 0 or 5 V Full - 100 - 100
Ground Current IGND Full - 15 - 100 - 100
Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25 °C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.

www.vishay.com Document Number: 70053

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 DG441/442
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
100 80
V+ = 15 V
r DS(on) – Drain-Source On-Resistance (Ω)

70

r DS(on) – Drain-Source On-Resistance (Ω)

±5V V- = - 15 V
80
60
125 °C
60 ±8V 50
85 °C
± 10 V
± 12 V 40 25 °C
40 ± 15 V
30

± 20 V
20 20 - 55 °C
0 °C

10 - 40 °C

0 0
- 20 - 15 - 10 -5 0 5 10 15 20 - 15 - 10 - 5 0 5 10 15
VD – Drain Voltage (V) VD – Drain Voltage (V)
rDS(on) vs. VD and Power Supply Voltage rDS(on) vs. VD and Temperature

300
140
V- = 0 V
r DS(on) – Drain-Source On-Resistance (Ω)

r DS(on) – Drain-Source On-Resistance (Ω)

250 120
125 °C
V+ = 5 V
100 85 °C
200

80 25 °C
150

8V 60
100 10 V
12 V 40 - 55 °C
15 V 0 °C
50
20 V - 40 °C V+ = 12 V
20
V- = 0 V
0
0
0 4 8 12 16 20
0 2 4 6 8 10 12
VD − Drain Voltage (V)
VD – Drain Voltage (V)
rDS(on) vs. VD and Unipolar
rDS(on) vs. VD and Temperature
Power Supply Voltage
(Single 12-V Supply)

140 50

40 CL = 1 nF
120
Crosstalk
30
100
V+ = 15 V
20
80 V- = - 15 V
Q (pC)
(–dB)

10
60
Off Isolation 0
40
- 10 V+ = 12 V
V+ = 15 V V- = 0 V
20 V- = - 15 V - 20
Ref. 10 dBm
0 - 30
100 1k 10 k 100 k 1M 10 M - 10 -5 0 5 10
f – Frequency (Hz) VS – Source Voltage (V)
Crosstalk and Off Isolation vs. Frequency Charge Injection vs. Source Voltage

Document Number: 70053 www.vishay.com

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DG441/442
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
2.4 20
IS(off) , ID(off)
0

1.6 - 20

I S, I D (pA)
V IN (V)

- 40
ID(on)

0.8 - 60

V+ = 15 V
- 80 V- = - 15 V
For I(off), V D = - VS
0 - 100
0 ±5 ± 10 ± 15 ± 20 - 15 - 10 -5 0 5 10 15
V+, V– Positive and Negative Supplies (V) VD or V S – Drain or Source Voltage (V)
Switching Threshold vs. Supply Voltage Source/Drain Leakage Currents

10 50
V+
IS(off) , ID(off) 44 S D
0 40 5 V – CMOS
Compatible
IN

- 10
I S, I D (pA)

30
V+ (V)

IS(on) + ID(on) V-

- 20 20
TTL Compatible
V+ = 12 V VIN = 0.8 V, 2.4 V
- 30 V- = 0 V
For ID, V S = 0 10
For IS, V D = 0 CMOS
3 Compatible
- 40 0
0 2 4 6 8 10 12 0 - 10 - 20 - 30 - 40 - 50
VD or V S – Drain or Source Voltage (V) V- – Negative Supply (V)
Source/Drain Leakage Currents (Single 12 V Supply) Operating Voltage

160 500

V- = 0 V
140
tON
400
120
tON

100 300
t (ns)

t (ns)

80
200
tOFF
60

100
40
tOFF

20
0
± 10 ± 12 ± 14 ± 16 ± 18 ± 20 ± 22 8 10 12 14 16 18 20 22
Supply Voltage (V) VS − Source Voltage (V)
Switching Time vs. Power Supply Voltage Switching Time vs. Power Supply Voltage

www.vishay.com Document Number: 70053

6 S-71241–Rev. I, 25-Jun-07
 DG441/442
Vishay Siliconix
TEST CIRCUITS
+ 15 V 3V
Logic
Input tr < 20 ns
50 % 50 % tf < 20 ns
V+
0V
S D
10 V VO tOFF
Switch VS
IN RL CL Input VO
3V 1 kΩ 35 pF 80 % 80 %
GND V-
Switch 0V
Output tON
- 15 V

CL (includes fixture and stray capacitance) Note: Logic input waveform is inverted for DG442.
Figure 2. Switching Time

+ 15 V
ΔV
O
VO
V+
Rg
S D INX
VO OFF ON OFF
(DG441)
IN CL
3V 1 nF
GND V- OFF ON OFF
INX
Q = ΔVO x CL
(DG442)
- 15 V
Figure 3. Charge Injection

C = 1 mF tantalum in parallel with 0.01 mF ceramic

+ 15 V
C
+ 15 V
C
V+
VS S1 D1

Rg = 50 Ω 50 Ω
V+ VO
IN1 VS S D
0 V, 2.4 V
Rg = 50 Ω
S2 D2 VO RL
NC IN
0 V, 2.4 V
RL
IN2 GND V-
0 V, 2.4 V C
GND V- C
- 15 V
- 15 V
VS
VS Off Isolation = 20 log
XTA LK Isolation = 20 log VO
C = RF bypass VO
Figure 5. Off Isolation
Figure 4. Crosstalk
+ 15 V
C

V+ S

Meter
IN HP4192A
0 V, 2.4 V Impedance
Analyzer
D or Equivalent

GND V-
C

- 15 V
Figure 6. Source/Drain Capacitances

Document Number: 70053 www.vishay.com

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DG441/442
Vishay Siliconix
APPLICATIONS

+ 24 V
+ 15 V

RL
V+ I=3A
DG442
+ 15 V 150 Ω
VN0300 L, M
IN
+ 15 V

VIN
1/4 DG442
10 kΩ
+ S D
+ 15 V VOUT
- CH +
-
GND V-

0 = Load Off IN - 15 V H = Sample

1 = Load On L = Hold

Figure 7. Power MOSFET Driver Figure 8. Open Loop Sample-and-Hold

VIN + VOUT
-

+ 15 V Gain error is determined only by the resistor

tolerance. Op amp offset and CMRR will limit ac-
V+ curacy of circuit.

GAIN1 R1
AV = 1 90 kΩ

With SW4 Closed

GAIN2 R2
AV = 10 5 kΩ
VOUT R1 + R2 + R3 + R4
= = 100
VIN R4
GAIN3 R3
AV = 20 4 kΩ

GAIN4 R4
AV = 100 1 kΩ
DG441 or DG442
V- GND

- 15 V
Figure 9. Precision-Weighted Resistor Programmable-Gain Amplifier

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?70053.

www.vishay.com Document Number: 70053

8 S-71241–Rev. I, 25-Jun-07
 Legal Disclaimer Notice
Vishay

Disclaimer

All product specifications and data are subject to change without notice.

Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.

Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.

No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.

The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
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Revision: 18-Jul-08 1