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Features: 600Khz/1.2Mhz PWM Step-Up Regulator

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0% found this document useful (0 votes)
102 views12 pages

Features: 600Khz/1.2Mhz PWM Step-Up Regulator

Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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E N D ED FOR NEW

DESIGNS DATASHEET
E C O M M
N OT R MENT IS
BLE REPLACE
PIN COMPATI
ISL97516
EL7516 FN7333
600kHz/1.2MHz PWM Step-Up Regulator Rev 6.00
October 9, 2007

The EL7516 is a high frequency, high efficiency step-up Features


voltage regulator operated at constant frequency PWM
mode. With an internal 1.5A, 200m MOSFET, it can deliver • >90% efficiency
up to 600mA output current at over 90% efficiency. The • 1.6A, 200m power MOSFET
selectable 600kHz and 1.2MHz allows smaller inductors and
• VIN > 2.5V
faster transient response. An external compensation pin
gives the user greater flexibility in setting frequency • 600kHz/1.2MHz switching frequency selection
compensation allowing the use of low ESR Ceramic output • Adjustable soft-start
capacitors.
• Internal thermal protection
When shut down, it draws <10µA of current and can operate
down to 2.5V input supply. These features along with • 1.1mm max height 8 Ld MSOP package
1.2MHz switching frequency makes it an ideal device for • Pb-free plus anneal available (RoHS compliant)
portable equipment and TFT-LCD displays.
Applications
The EL7516 is available in an 8 Ld MSOP package with a
maximum height of 1.1mm. The device is specified for • TFT-LCD displays
operation over the full -40°C to +85°C temperature range. • DSL modems

Pinout • PCMCIA cards


EL7516 • Digital cameras
(8 LD MSOP)
TOP VIEW • GSM/CDMA phones
• Portable equipment
COMP 1 8 SS
• Handheld devices
FB 2 7 FSEL

SHDN 3 6 VDD
Ordering Information
PART PART TAPE & PKG.
GND 4 5 LX
NUMBER MARKING REEL PACKAGE DWG. #

EL7516IY f - 8 Ld MSOP MDP0043


EL7516IY-T7 f 7” 8 Ld MSOP MDP0043

EL7516IY-T13 f 13” 8 Ld MSOP MDP0043

EL7516IYZ BARAA - 8 Ld MSOP MDP0043


(Note) (Pb-Free)

EL7516IYZ-T7 BARAA 7” 8 Ld MSOP MDP0043


(Note) (Pb-Free)

EL7516IYZ-T13 BARAA 13” 8 Ld MSOP MDP0043


(Note) (Pb-Free)

NOTE: Intersil Pb-free plus anneal products employ special Pb-free


material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.

FN7333 Rev 6.00 Page 1 of 12


October 9, 2007
EL7516

Absolute Maximum Ratings (TA = +25°C) Thermal Information


LX to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18V Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
VDD to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.5V Operating Ambient Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
COMP, FB, SHDN, SS, FSEL to GND . . . . . . . -0.3V to (VDD +0.3V) Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +135°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA

Electrical Specifications VIN = 3.3V, VOUT = 12V, IOUT = 0mA, FSEL = GND, TA = +25°C unless otherwise specified.

PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT

IQ1 Quiescent Current - Shut-down SHDN = 0V 0.6 10 µA

IQ2 Quiescent Current - Not Switching SHDN = VDD, FB = 1.3V 0.7 mA

IQ3 Quiescent Current - Switching SHDN = VDD, FB = 1.0V 1.3 2 mA

VFB Feedback Voltage 1.272 1.294 1.309 V

IB-FB Feedback Input Bias Current 0.01 0.5 µA


VDD Start-Up Input Voltage Range 2.6 5.5 V

DMAX - 600kHz Maximum Duty Cycle FSEL = 0V 84 90 %

DMAX - 1.2MHz Maximum Duty Cycle FSEL = VDD 84 90 %

ILIM Current Limit - Max Peak Input Current 1.3 1.5 A


ISHDN Shut-down Input Bias Current SHDN = 0V 0.01 0.1 µA

rDS-ON Switch ON-Resistance VDD = 2.7V, ILX = 1A 0.2 

ILX-LEAK Switch Leakage Current VSW = 18V 0.01 3 µA


VOUT/VIN Line Regulation 3V < VIN < 5.5V, VOUT = 12V 0.1 %

VOUT/IOUT Load Regulation VIN = 3.3V, VOUT = 12V, IO = 30mA to 200mA 6.7 mV/A

fOSC1 Switching Frequency Accuracy FSEL = 0V 500 620 740 kHz


fOSC2 Switching Frequency Accuracy FSEL = VDD 1000 1250 1500 kHz

VIL SHDN, FSEL Input Low Level 0.5 V

VIH SHDN, FSEL Input High Level 2.7 V


VIL SHDN, Input Low Level 5V Input Supply 1.25 V

VIH SHDN, Input High Level 5V Input Supply 4.5 V

GM Error Amp Tranconductance I = 5µA 90 130 170 1µ/

AV Voltage Gain 350 V/V

VDD-ON VDD UVLO On Threshold 2.40 2.51 2.60 V

VDD-OFF VDD UVLO Off Threshold 2.20 2.30 2.40 V

ISS Soft-start Charge Current 4 6 8 µA

RCS Current Sense Transresistance 0.08 V/A

OTP Over-temperature Protection 130 °C

FN7333 Rev 6.00 Page 2 of 12


October 9, 2007
EL7516

Block Diagram
FSEL SHDN SS

SHUTDOWN
REFERENCE
VDD OSCILLATOR AND START-UP
GENERATOR
CONTROL

LX
PWM LOGIC FET
CONTROLLER DRIVER

COMPARATOR

CURRENT
GND
SENSE

FB
GM
AMPLIFIER

COMP

Pin Descriptions
PIN NUMBER PIN NAME DESCRIPTION

1 COMP Compensation pin. Output of the internal error amplifier. Capacitor and resistor from COMP pin to ground.

2 FB Voltage feedback pin. Internal reference is 1.294V nominal. Connect a resistor divider from VOUT. VOUT =
1.294V (1 + R1/R2). See Typical Application Circuit.

3 SHDN Shutdown control pin. Pull SHDN low to turn off the device.

4 GND Analog and power ground.

5 LX Power switch pin. Connected to the drain of the internal power MOSFET.

6 VDD Analog power supply input pin.

7 FSEL Frequency select pin. When FSEL is set low, switching frequency is set to 620kHz. When connected to
high or VDD, switching frequency is set to 1.25MHz.

8 SS Soft-start control pin. Connect a capacitor to control the converter start-up.

Typical Application Circuit

R3 1 COMP SS 8
C3
3.9k R1 85.2k
2 FB FSEL 7 27nF
C5 R2
4.7nF 10k 3 SHDN VDD 6 2.7V TO 5.5V
C4 + C1
4 GND LX 5 0.1µF 22µF 10µH

12V
S1 + C2
D1
22µF

FN7333 Rev 6.00 Page 3 of 12


October 9, 2007
EL7516

Typical Performance Curves


95 0.6

0.4

LOAD REGULATION (%)


90 0.2
EFFICIENCY (%)

85 -0.2

-0.4

80 -0.6

-0.8

75 -1.0
0 100 200 300 400 0 50 100 150 200 250 300 350

IOUT (mA) IOUT (mA)

FIGURE 1. EFFICIENCY - 3.3V VIN TO 12V VOUT @ 1.3MHz FIGURE 2. LOAD REGULATION - 3.3V VIN TO 12V VOUT
@ 1.3MHz

90 1.0

LOAD REGULATION (%) 0.5


EFFICIENCY (%)

85

80
-0.5

75 -1.0
0 100 200 300 400 0 50 100 150 200 250 300 350

IOUT (mA) IOUT (mA)

FIGURE 3. EFFICIENCY - 3.3V VIN TO 12V VOUT @ 620kHz FIGURE 4. LOAD REGULATION - 3.3V VIN TO 12V VOUT
@ 620kHz

95 1.0
LOAD REGULATION (%)

90
0.5
EFFICIENCY (%)

85
0
80

-0.5
75

70 -1.0
0 100 200 300 400 500 0 100 200 300 400 500

IOUT (mA) IOUT (mA)

FIGURE 5. EFFICIENCY - 3.3V VIN TO 9V VOUT @ 1.2MHz FIGURE 6. LOAD REGULATION - 3.3V VIN TO 9V VOUT
@ 1.2MHz

FN7333 Rev 6.00 Page 4 of 12


October 9, 2007
EL7516

Typical Performance Curves (Continued)

90 1.0

LOAD REGULATION (%)


0.6
EFFICIENCY (%)

85
0.2

-0.2
80

-0.6

75 -1.0
0 100 200 300 400 500 0 100 200 300 400 500

IOUT (mA) IOUT (mA)

FIGURE 7. EFFICIENCY - 3.3V VIN TO 9V VOUT @ 600kHz FIGURE 8. LOAD REGULATION - 3.3V VIN TO 9V VOUT
@ 600kHz

95 0.8
0.6

90 LOAD REGULATION (%) 0.4


EFFICIENCY (%)

0.2
1.0
85
-0.2
-0.4
80 -0.6
-0.8
75 -1
0 100 200 300 400 500 600 0 100 200 300 400 500 600

IOUT (mA) IOUT (mA)

FIGURE 9. EFFICIENCY - 5V VIN TO 12V VOUT @ 1.2MHz FIGURE 10. LOAD REGULATION - 5V VIN TO 12V VOUT
@ 1.2MHz

92 0.8
0.6
LOAD REGULATION (%)

90 0.4
EFFICIENCY (%)

0.2
1.0
88
-0.2
-0.4
86 -0.6
-0.8
84 -1
0 100 200 300 400 500 600 0 100 200 300 400 500 600

IOUT (mA) IOUT (mA)

FIGURE 11. EFFICIENCY - 5V VIN TO 12V VOUT @ 600kHz FIGURE 12. LOAD REGULATION - 5V VIN TO 12V VOUT
@ 600kHz

FN7333 Rev 6.00 Page 5 of 12


October 9, 2007
EL7516

Typical Performance Curves (Continued)

95 0.6

0.4

LOAD REGULATION (%)


90 0.2
EFFICIENCY (%)

85 -0.2

-0.4

80 -0.6

-0.8

75 -1
0 200 400 600 800 1k 0 200 400 600 800 1k

IOUT (mA) IOUT (mA)

FIGURE 13. EFFICIENCY - 5V VIN TO 9V VOUT @ 1.2MHz FIGURE 14. LOAD REGULATION - 5V VIN TO 9V VOUT
@ 1.2MHz

0.2 0.10
VOUT=12V VOUT = 8V
IOUT=80mA IOUT = 80mA
LINE REGULATION (%)

0.1 LINE REGULATION (%) 0.05 1.2MHz


1.2MHz

0 0

600kHz 600kHz
-0.1 -0.05

-0.2 -0.10
2 3 4 5 6 2.5 3.5 4.5 5.5 6.5

VIN (V) VIN (V)

FIGURE 15. LINE REGULATION FIGURE 16. LINE REGULATION

95 0.5
1.2MHz
600kHz
LOAD REGULATION (%)

90 0.3
EFFICIENCY (%)

85 0.1
1.2MHz
80 -0.1 600kHz

75 -0.3

70 -0.5
10 110 210 310 410 510 610 0 100 200 300 400 500 600

IOUT (mA) IOUT (mA)

FIGURE 17. EFFICIENCY vs IOUT - 3.3V TO 8V FIGURE 18. LOAD REGULATION - 3.3V TO 8V

FN7333 Rev 6.00 Page 6 of 12


October 9, 2007
EL7516

Typical Performance Curves (Continued)

94 1.29
92 1.28
90 1.27

FREQUENCY (MHz)
EFFICIENCY (%)

88 1.26
86 1.2MHz 1.25
84 1.24
82 1.23
80 1.22
78 600kHz 1.21
76 1.2
0 200 400 600 800 1k 1.2k 2.5 3 3.5 4 4.5 5 5.5

IOUT (mA) VIN (V)

FIGURE 19. EFFICIENCY vs IOUT FIGURE 20. FREQUENCY (1.2MHz) vs VIN

670 93

660 91
FREQUENCY (kHz)

EFFICIENCY (kHz)
650
89
640
87
630
85
620

610 83

600 81
2.5 3 3.5 4 4.5 5 5.5 0 200 400 600 800 1k

VIN (V) IOUT (mA)

FIGURE 21. FREQUENCY (600kHz) vs VIN FIGURE 22. EFFICIENCY - 5V VIN TO 9V VOUT @ 600kHz

0.4
VIN = 3.3V
VOUT = 12V
LOAD REGULATION (%)

IOUT = 50mA TO 300mA


0.2

0 200mV/DIV

-0.2

-0.4
0 200 400 600 800 1k
0.1ms/DIV
IOUT (mA)

FIGURE 23. LOAD REGULATION - 5V VIN TO 9V VOUT FIGURE 24. TRANSIENT REPONSE - 600kHz
@ 600kHz

FN7333 Rev 6.00 Page 7 of 12


October 9, 2007
EL7516

Typical Performance Curves (Continued)

5
VIN = 3.3V
VOUT = 12V 4
IOUT = 50mA TO 300mA SHDN TURN ON

SHDN LEVEL (V)


SHDN TURN OFF
3

200mV/DIV
2

0
3 3.5 4 4.5 5 5.5 6
0.1ms/DIV VIN (V)

FIGURE 25. TRANSIENT RESPONSE - 1.2MHz FIGURE 26. TYPICAL SHDN INPUT LEVEL vs VIN

JEDEC JESD51-7 HIGH EFFECTIVE THERMAL JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD CONDUCTIVITY TEST BOARD
1.0 0.6
0.9
0.5
POWER DISSIPATION (W)

POWER DISSIPATION (W)


0.8 870mW
486mW
0.7 M
 SO 0.4 M
0.6 JA  SO
=1 P JA P8
=
15 8 20
0.5 °C 0.3 6°
/W C/
W
0.4
0.2
0.3
0.2
0.1
0.1
0 0
0 25 50 75 85 100 125 0 25 50 75 85 100 125

AMBIENT TEMPERATURE (°C) AMBIENT TEMPERATURE (°C)

FIGURE 27. PACKAGE POWER DISSIPATION vs AMBIENT FIGURE 28. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE TEMPERATURE

Applications Information the boost converter operates in two cycles. During the first
cycle, as shown in Figure 29, the internal power FET turns
The EL7516 is a high frequency, high efficiency boost
on and the Schottky diode is reverse biased and cuts off the
regulator operated at constant frequency PWM mode. The
current flow to the output. The output current is supplied
boost converter stores energy from an input voltage source
from the output capacitor. The voltage across the inductor is
and delivers it to a higher output voltage. The input voltage
VIN and the inductor current ramps up in a rate of VIN / L, L
range is 2.5V to 5.5V and the output voltage range is 5V to
is the inductance. The inductance is magnetized and energy
18V. The switching frequency is selectable between 600KHz
is stored in the inductor. The change in inductor current is:
and 1.2MHz, allowing smaller inductors and faster transient
response. An external compensation pin gives the user V IN
I L1 = t1  ---------
greater flexibility in setting output transient response and L
tighter load regulation. The converter soft-start characteristic D
t1 = ----------
can also be controlled by external CSS capacitor. The SHDN f SW
pin allows the user to completely shut-down the device.
D = Duty Cycle
Boost Converter Operations
I OUT
Figure 28 shows a boost converter with all the key V O = ----------------  t 1
C OUT
components. In steady state operating and continuous (EQ. 1)
conduction mode where the inductor current is continuous,

FN7333 Rev 6.00 Page 8 of 12


October 9, 2007
EL7516

During the second cycle, the power FET turns off and the
L D
Schottky diode is forward biased, Figure 30. The energy VIN VOUT
stored in the inductor is pumped to the output supplying
CIN COUT
output current and charging the output capacitor. The
EL7516
Schottky diode side of the inductor is clamp to a Schottky
diode above the output voltage, so the voltage drop across
the inductor is VIN - VOUT. The change in inductor current
during the second cycle is: IL2 IL

V IN – V OUT t2
I L = t2  -------------------------------- VO
L

1–D
t2 = ------------- FIGURE 31. BOOST CONVERTER - CYCLE 2, POWER
f SW
(EQ. 2) SWITCH OPEN

For stable operation, the same amount of energy stored in Output Voltage
the inductor must be taken out. The change in inductor An external feedback resistor divider is required to divide the
current during the two cycles must be the same. output voltage down to the nominal 1.294V reference
voltage. The current drawn by the resistor network should be
I1 + I2 = 0
limited to maintain the overall converter efficiency. The
V IN 1 – D V IN – V OUT maximum value of the resistor network is limited by the
D
----------  --------- + -------------  -------------------------------- = 0 feedback input bias current and the potential for noise being
f SW L f SW L
coupled into the feedback pin. A resistor network less than
V OUT 100k is recommended. The boost converter output voltage is
1
---------------- = ------------- determined by the relationship:
V IN 1–D
(EQ. 3)
 R 1
V OUT = V FB   1 + -------
 R 2
(EQ. 4)
L D
VIN VOUT The nominal VFB voltage is 1.294V.
CIN COUT
Inductor Selection
EL7516 The inductor selection determines the output ripple voltage,
transient response, output current capability, and efficiency.
Its selection depends on the input voltage, output voltage,
switching frequency, and maximum output current. For most
FIGURE 29. BOOST CONVERTER applications, the inductance should be in the range of 2µH to
33µH. The inductor maximum DC current specification must
be greater than the peak inductor current required by the
L
regulator. The peak inductor current can be calculated:
VIN VOUT
CIN COUT I OUT  V OUT V IN   V OUT – V IN 
I L  PEAK  = ------------------------------------ + 1  2  -----------------------------------------------------
V IN L  V OUT  FREQ
EL7516
(EQ. 5)

Output Capacitor
Low ESR capacitors should be used to minimize the output
IL IL1 voltage ripple. Multilayer ceramic capacitors (X5R and X7R)
t1 are preferred for the output capacitors because of their lower
VO ESR and small packages. Tantalum capacitors with higher
ESR can also be used. The output ripple can be calculated
FIGURE 30. BOOST CONVERTER - CYCLE 1, POWER as:
SWITCH CLOSED I OUT  D
V O = ------------------------- + I OUT  ESR
f SW  C O
(EQ. 6)

For noise sensitive application, a 0.1µF placed in parallel


with the larger output capacitor is recommended to reduce
the switching noise coupled from the LX switching node.

FN7333 Rev 6.00 Page 9 of 12


October 9, 2007
EL7516

Schottky Diode EL7516 does not use a level translator or ground-referenced


In selecting the Schottky diode, the reverse break down threshold for the SHDN input. For different supply voltages,
voltage, forward current and forward voltage drop must be please refer to Figure 32 to choose the right input threshold
considered for optimum converter performance. The diode voltages for SHDN, where VTP is about 1V. It is
must be rated to handle 1.5A, the current limit of the recommended that VIH = (VIN - VTP/2) and VIL = (VIN/4).
EL7516. The breakdown voltage must exceed the maximum If the consistent SHDN threshold is desired in the
output voltage. Low forward voltage drop, low leakage application, an external active level shifter must be used.
current, and fast reverse recovery will help the converter to The simplest circuit requires 1 NMOS and 1 resistor, as
achieve the maximum efficiency. shown in Figure 33 where the gate of the NMOS is
Input Capacitor connected to supply of PWRON logic circuit, and the source
of the NMOS goes to PWRON pin of the converter.
The value of the input capacitor depends on the input and
output voltages, the maximum output current, the inductor
value and the noise allowed to put back on the input line. For
most applications, a minimum 10µF is required. For VIN = 3.3V VIN = 5.5V

SHDN INPUT THRESHOLDS


VIH, UPPER VIN
applications that run close to the maximum output current
LOGIC THRESHOLD (VIN - VTP)
limit, input capacitor in the range of 22µF to 47µF is
recommended.
VIL, LOWER KEEP OUT (VIN/2)
The EL7516 is powered from the VIN. High frequency 0.1µF LOGIC THRESHOLD
by-pass cap is recommended to be close to the VIN pin to
reduce supply line noise and ensure stable operation.

Loop Compensation 0V VIN


The EL7516 incorporates an transconductance amplifier in
FIGURE 32. SHDN INPUT THRESHOLD vs INPUT SUPPLY
its feedback path to allow the user some adjustment on the VOLTAGE
transient response and better regulation. The EL7516 uses
current mode control architecture, which has a fast current
sense loop and a slow voltage feedback loop. The fast
current feedback loop does not require any compensation. SUPPLY INPUT VOLTAGE
The slow voltage loop must be compensated for stable
operation. The compensation network is a series RC
network from COMP pin to ground. The resistor sets the high
frequency integrator gain for fast transient response and the 20k
capacitor sets the integrator zero to ensure loop stability. For
3VD TO EL7516
most applications, the compensation resistor in the range of
PIN3 SHDN
2k to 7.5k and the compensation capacitor in the range of 20k
3nF to 10nF.
PWRON
Soft-Start PIN OF THE
CONVERTER
The soft-start is provided by an internal 6µA current source,
which charges the external CSS. The peak MOSFET current FIGURE 33. LEVEL SHIFTER CIRCUIT
is limited by the voltage on the capacitor. This in turn controls
the rising rate of the output voltage. The regulator goes Maximum Output Current
through the start-up sequence as well after the SHDN pin is The MOSFET current limit is nominally 1.5A and guaranteed
pulled to HI. 1.3A. This restricts the maximum output current IOMAX
based on the following formula:
Frequency Selection
The EL7516 switching frequency can be user selected to I L = I L-AVG +  1  2  I L 
(EQ. 7)
operate at either at constant 620kHz or 1.25MHz.
Connecting FSEL pin to ground sets the PWM switching
frequency to 620kHz. When connect FSEL high or VDD,
switching frequency is set to 1.25MHz.

Shut-Down Control
When the Shut-down pin is pulled down, the EL7516 is shut-
down, reducing the supply current to <3µA.

FN7333 Rev 6.00 Page 10 of 12


October 9, 2007
EL7516

where: Thermal Performance


IL = MOSFET current limit The EL7516 uses a fused-lead package, which has a
reduced JA of 100°C/W on a four-layer board and 115°C/W
IL-AVG = average inductor current on a two-layer board. Maximizing copper around the ground
IL = inductor ripple current pins will improve the thermal performance.

V IN    V O + V DIODE  – V IN  This device also has internal thermal shut-down set at


I L = ------------------------------------------------------------------------------ around +130°C to protect the component.
L   V O + V DIODE   f S
(EQ. 8)
Layout Considerations
VDIODE = Schottky diode forward voltage, typically, 0.6V To achieve highest efficiency, best regulation and the most
fS = switching frequency, 600kHz or 1.2MHz stable operation, a good printed circuit board layout is
essential. It is strongly recommended that the demoboard
I OUT
I L-AVG = ------------- layout be followed as closely as possible. Use the following
1–D
(EQ. 9) general guidelines when laying out the print circuit board:

D = MOSFET turn-on ratio: 1. Place C4 as close to the VDD pin as possible. C4 is the
supply bypass capacitor of the device.
V IN
D = 1 – -------------------------------------------- 2. Keep the C1 ground, GND pin and C2 ground as close as
V OUT + V DIODE
(EQ. 10) possible.
3. Keep the two high current paths a) from C1 through L1, to
Table 1 gives typical maximum IOUT values for 1.2MHz the LX pin and GND and b) from C1 through L1, D1, and
switching frequency and 22µH inductor: C2 as short as possible.
TABLE 1. 4. High current traces should be as short and as wide as
possible.
VIN (V) VOUT (V) IOMAX (mA)
5. Place the feedback resistor close to the FB pin to avoid
2.5 5 570 noise pickup.
2.5 9 325 6. Place the compensation network close to the COMP pin.
2.5 12 250 The demo board is a good example of layout based on these
3.3 5 750 principles; it is available upon request.

3.3 9 435 Differences Between EL7516 and ISL97516


3.3 12 330 ISL97516 is the replacement for EL7516, and it is pin-to-pin
compatible to EL7516, but there are differences between the
5 9 650
two parts, as shown in the Table 2:
5 12 490
TABLE 2. DIFFERENCES BETWEEN EL7516 AND ISL97516

ISL97516 EL7516
Current Limit 2.0A (typical value) 1.5A (typical value)

Over-Temperature +150°C +130°C


Protection

Logic High or Low Level Refer to Ground, Refer to input


Fixed. voltage, Varying

From Table 2, it shows that ISL97516 can provide more


output current at the same conditions, and work in higher
ambient temperature. The fixed logic level also helps reduce
the system design complexity.

FN7333 Rev 6.00 Page 11 of 12


October 9, 2007
EL7516

Mini SO Package Family (MSOP)


0.25 M C A B A
MDP0043
MINI SO PACKAGE FAMILY
D
(N/2)+1
N MILLIMETERS

SYMBOL MSOP8 MSOP10 TOLERANCE NOTES


A 1.10 1.10 Max. -

A1 0.10 0.10 ±0.05 -


E E1 PIN #1 A2 0.86 0.86 ±0.09 -
I.D.
b 0.33 0.23 +0.07/-0.08 -

c 0.18 0.18 ±0.05 -

D 3.00 3.00 ±0.10 1, 3


1
B (N/2) E 4.90 4.90 ±0.15 -

E1 3.00 3.00 ±0.10 2, 3

e 0.65 0.50 Basic -


e H
C L 0.55 0.55 ±0.15 -

SEATING L1 0.95 0.95 Basic -


PLANE
N 8 10 Reference -
0.10 C b 0.08 M C A B
N LEADS Rev. D 2/07
NOTES:
1. Plastic or metal protrusions of 0.15mm maximum per side are not
included.
L1 2. Plastic interlead protrusions of 0.25mm maximum per side are
not included.
A
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
c
SEE DETAIL "X"

A2

GAUGE
PLANE
0.25

A1 L
3° ±3°
DETAIL X

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FN7333 Rev 6.00 Page 12 of 12


October 9, 2007

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