1ARM stands for _____________
a) Advanced Rate Machines
b) Advanced RISC Machines
c) Artificial Running Machines
d) Aviary Running Machines
2. The main importance of ARM micro-processors is providing operation with ______
a) Low cost and low power consumption
b) Higher degree of multi-tasking
c) Lower error or glitches
d) Efficient memory management
3. ARM processors where basically designed for _______
a) Main frame systems
b) Distributed systems
c) Mobile systems
d) Super computers
4. The address space in ARM is ___________
a) 224
b) 264
c) 216
d) 232
5. The address system supported by ARM systems is/are ___________
a) Little Endian
b) Big Endian
c) X-Little Endian
d) Both Little & Big Endian
6) RISC stands for _________
a) Restricted Instruction Sequencing Computer
b) Restricted Instruction Sequential Compiler
c) Reduced Instruction Set Computer
d) Reduced Induction Set Computer
7.In the ARM, PC is implemented using ___________
a) Caches
b) Heaps
c) General purpose register
d) Stack
8)The additional duplicate register used in ARM machines are called as _______
a) Copied-registers
b) Banked registers
c) EXtra registers
d) Extential registers
9)Each stage in pipelining should be completed within ___________ cycle.
a) 1
b) 2
c) 3
d) 4
10)To increase the speed of memory access in pipelining, we make use of _______
a) Special memory locations
b) Special purpose registers
c) Cache
d) Buffers
11)Which architecture provides separate buses for program and data memory?
a) Harvard architecture
b) Von Neumann architecture
c) None of the mentioned
d) All of the mentioned
12)How many types of architectures are available, for designing a device that is able to work on
its own?
a) 3
b) 2
c) 1
d) 4
13)Which of the two architecture saves memory?
a) Harvard
b) Von Neumann
c) Harvard & Von Neumann
d) None of the mentioned
14.Cortex m3 consist of pipeline
a) one stage
b) two stages
c) three stages
d) four stages
15 In cortex-M processor NVIC stands for
a)Nested vectored interrupt controller
b) Nested voltage interrupt controller
c) Nested velocity interrupt controller
d) Nested variable interrupt controller
16.ARM Processor core is a key component of ___ bit embedded system.
a)8 b) 16 c)32 d)64
17.RISC Philosophy implemented with ___ major deign goals.
a) 4 b)6 c)8 d)16
18.____ is the processing of instruction broken down to smaller unit.
a) Pipeline b) ALU c) MCU d) All
19 Register contains ___
a) Address b) data c) both d) none
20.___ Instruction used to transfer the data between register and memory.
a) Load b)store c) bothd) none
21.The design rule s allow a RISC to be __
a)simpler b) complicated c) both d) none
22.___ is used to communicate between part of the device
a) Bus b) ALU c) Address d) Peripherals
23__ are used to stop specific interrupt.
a) Interrupt mask b) Interrupt request c) both d) none
24.____ is used to connect peripherals.
a) PCI b) ALU c) MCU d) All
25.ARM bus has __ Architecture level.
a) 2 b) 3 c) 4 d) 5
26._____ level covers electrical characteristics.
a) Physical b) logical c)temporal d) all
27.____ level govern communication between the processor and peripheral.
a) Physical b) logical c)temporal d) all
17.AMBA bus was introduced in the year of _____
a)1996 b)2000 c)1998 d) 1990
18.AMBA means____
a) Advance microcontroller bus architecture b) advance Machine bus architecture C) both
d) none
19.____ is placed between main memory and core .
a)cacheb) RAM c)ROM d) all
20.____ is used to sped up data transfer
a)cacheb) RAM c)ROM d) all
21. The SPSR store the ___ mode of CPSR
a) Present b) previous c) both d) none
22.____ interrupt controller available in ARM Processor.
a)2 b)3 c)4 d)5
23.____ memory require refreshing.
a)SRAM b) DRAM c) PROM d) EPROM
24.SRAM means____
a)Static RAM b) Stable RAM c) Standard RAM d) none.
25. Application of ARM processor is____
a) automotive) consumable c) mobile d) all
26 In ARM processor data items are placed in ____ file.
a)Register b) I/O c) memory d) all
27.ARM instruction typically have ___ source register.
a)2 b)3c)4d)5.
28 ALU means____
a) Arithmetic logic unit b) Adder logic unit c) both d) none
29.MAU means ________
a) Multiply Accumulate unit b) Multiple adder unit c) Multiple accumulate unit d) none
30.General purpose registers holds the _____
a) Data b) Address c)both d) none
31.___ Register is used as the stack pointer.
a) r13 b) r14 c) r15 d) r16
32.____ register is called the link register.
a) r13 b) r14c) r15 d) r16
33.In ARM program register has __ types
a) 2 b) 3 c) 4 d) 5
34. Privileged mode allows ___ access .
a) read b) write c) both d) none
35. Non Privileged mode allows ___ access .
a) read b) write c) bothd) none
36. In ARM consists of ______ processor mode.
a) 7 b) 5 c) 4 d) 6
37.How many bank registers are available in ARM?
a) 20 b) 25 c) 30 d) 40
