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XMC WDT

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0% found this document useful (0 votes)
21 views8 pages

XMC WDT

Uploaded by

Roberto Dias
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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1 /**

2 * @file xmc_wdt.h
3 * @date 2015-06-20
4 *
5 * @cond
6
*************************************************************************************
********************************
7 * XMClib v2.0.0 - XMC Peripheral Driver Library
8 *
9 * Copyright (c) 2015, Infineon Technologies AG
10 * All rights reserved.
11 *
12 * Redistribution and use in source and binary forms, with or without
modification,are permitted provided that the
13 * following conditions are met:
14 *
15 * Redistributions of source code must retain the above copyright notice, this list
of conditions and the following
16 * disclaimer.
17 *
18 * Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following
19 * disclaimer in the documentation and/or other materials provided with the
distribution.
20 *
21 * Neither the name of the copyright holders nor the names of its contributors may be
used to endorse or promote
22 * products derived from this software without specific prior written
permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES,
25 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
PROCUREMENT OF SUBSTITUTE GOODS OR
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
AND ON ANY THEORY OF LIABILITY,
29 * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
DAMAGE.
31 *
32 * To improve the quality of the software, users are encouraged to share
modifications, enhancements or bug fixes with
33 * Infineon Technologies AG
dave@infineon.com).
34
*************************************************************************************
********************************
35 *
36 * Change History
37 * --------------
38 *
39 * 2015-02-20:
40 * - Initial <br>
41 * - Documentation updates <br>
42 *
43 * 2015-06-20:
44 * - Removed version macros and declaration of GetDriverVersion API <br>
45 *
46 * @endcond
47 */
48
49 #ifndef XMC_WDT_H
50 #define XMC_WDT_H
51
52 /*************************************************************************************
********************************
53 * HEADER FILES
54
*************************************************************************************
*******************************/
55
56 #include "xmc_common.h"
57 #include "xmc_scu.h"
58 /**
59 * @addtogroup XMClib XMC Peripheral Library
60 * @{
61 */
62
63 /**
64 * @addtogroup WDT
65 * @brief Watchdog driver for the XMC microcontroller family.
66 *
67 * The watchdog unit (WDT) improves the system integrity, by triggering the system
reset request to bring the system
68 * back from the unresponsive state to normal operation.
69 *
70 * This LLD provides the Configuration structure XMC_WDT_CONFIG_t and initialization
function XMC_WDT_Init().\n
71 * It can be used to:
72 * -# Start or Stop the watchdog timer. (XMC_WDT_Start() and XMC_WDT_Stop())
73 * -# Service the watchdog timer. (XMC_WDT_Service())
74 * -# Configure the service window upper bound and lower bound timing values.
(XMC_WDT_SetWindowBounds())
75 * -# Enable the generation of the pre-warning event for the first overflow of the
timer. (XMC_WDT_SetMode())
76 * -# Clear the pre-warning alarm event. It is mandatory to clear the flag during
pre-warning alarm ISR, to stop
77 generating reset request for the second overflow of the timer.
(XMC_WDT_ClearAlarm())
78 * -# Suspend the watchdog timer during Debug HALT mode. (XMC_WDT_SetDebugMode())
79 * -# Configure service indication pulse width.(XMC_WDT_SetServicePulseWidth())
80 *
81 * @{
82 */
83
84 /*************************************************************************************
********************************
85 * MACROS
86
************************************************************************************
********************************/
87
88 #define XMC_WDT_MAGIC_WORD (0xABADCAFEU) /* Magic word to be written in
Service Register (SRV),
89 to service or feed the
watchdog. */
90
91 /*************************************************************************************
********************************
92 * ENUMS
93
************************************************************************************
********************************/
94
95 /**
96 * Defines working modes for watchdog. Use type XMC_WDT_MODE_t for this enum.
97 */
98 typedef enum XMC_WDT_MODE
99 {
100 XMC_WDT_MODE_TIMEOUT = (uint32_t)0x0 << WDT_CTR_PRE_Pos, /**< Generates reset
request as soon as the timer overflow
101 occurs. */
102 XMC_WDT_MODE_PREWARNING = (uint32_t)0x1 << WDT_CTR_PRE_Pos /**< Generates an alarm
event for the first overflow. And
103 reset request
after subsequent
overflow, if not
104 serviced after
first overflow. */
105 } XMC_WDT_MODE_t;
106
107 /**
108 * Defines debug behaviour of watchdog when the CPU enters HALT mode. Use type
XMC_WDT_DEBUG_MODE_t for this enum.
109 */
110 typedef enum XMC_WDT_DEBUG_MODE
111 {
112 XMC_WDT_DEBUG_MODE_STOP = (uint32_t)0x0 << WDT_CTR_DSP_Pos, /**< Watchdog counter
is paused during debug halt. */
113 XMC_WDT_DEBUG_MODE_RUN = (uint32_t)0x1 << WDT_CTR_DSP_Pos /**< Watchdog counter
is not paused during debug halt. */
114 } XMC_WDT_DEBUG_MODE_t;
115
116 /*************************************************************************************
********************************
117 * DATA STRUCTURES
118
************************************************************************************
********************************/
119 /* Anonymous structure/union guard start */
120 #if defined(__CC_ARM)
121 #pragma push
122 #pragma anon_unions
123 #elif defined(__TASKING__)
124 #pragma warning 586
125 #endif
126
127 /**
128 * Structure for initializing watchdog timer. Use type XMC_WDT_CONFIG_t for this
structure.
129 */
130 typedef struct XMC_WDT_CONFIG
131 {
132 uint32_t window_upper_bound; /**< Upper bound for service window (WUB). Reset
request is generated up on overflow of
133 timer. ALways upper bound value has to be more
than lower bound value. If it is set
134 lower than WLB, triggers a system reset after
timer crossed upper bound value.\n
135 Range: [0H to FFFFFFFFH] */
136 uint32_t window_lower_bound; /**< Lower bound for servicing window (WLB). Setting
the lower bound to 0H disables the
137 window mechanism.\n
138 Range: [0H to FFFFFFFFH] */
139 union
140 {
141 struct
142 {
143 uint32_t : 1;
144 uint32_t prewarn_mode : 1; /**< Pre-warning mode (PRE). This accepts
boolean values as input. */
145 uint32_t : 2;
146 uint32_t run_in_debug_mode : 1; /**< Watchdog timer behaviour during debug
(DSP). This accepts boolean values as input. */
147 uint32_t : 3;
148 uint32_t service_pulse_width : 8; /**< Service Indication Pulse Width (SPW).
Generated Pulse width is of (SPW+1),
149 in fwdt cycles.\n
150 Range: [0H to FFH] */
151 uint32_t : 16;
152 };
153 uint32_t wdt_ctr; /* Value of operation mode control register (CTR). It’s bit
fields are represented by above
154 union members. */
155 };
156 } XMC_WDT_CONFIG_t;
157 /* Anonymous structure/union guard end */
158 #if defined(__CC_ARM)
159 #pragma pop
160 #elif defined(__TASKING__)
161 #pragma warning restore
162 #endif
163 /*************************************************************************************
********************************
164 * API PROTOTYPES
165
************************************************************************************
********************************/
166
167 #ifdef __cplusplus
168 extern "C" {
169 #endif
170
171 /**
172 * @param None
173 *
174 * @return None
175 *
176 * \par<b>Description:</b><br>
177 * \if XMC4
178 * Enables watchdog clock and releases watchdog reset.\n
179 * \endif
180 * \if XMC1
181 * Enables watchdog clock.\n
182 * \endif
183 * \par
184 * This API is invoked by XMC_WDT_Init() and therefore no need to call it explicitly
during watchdog initialization
185 * sequence. Invoke this API to enable watchdog once again if the watchdog is
disabled by invoking XMC_WDT_Disable().
186 *
187 * \par<b>Note:</b><br>
188 * \if XMC4
189 * 1. It is required to configure the watchdog, again after invoking
XMC_WDT_Disable(). Since all the registers are
190 * reset with default values.
191 * \endif
192 * \if XMC1
193 * 1. Not required to configure the watchdog again after invoking XMC_WDT_Disable().
Since the registers retains with
194 * the configured values.
195 * \endif
196 * \par<b>Related APIs:</b><BR>
197 * XMC_WDT_Init(), XMC_WDT_Disable()
198 */
199 void XMC_WDT_Enable(void);
200
201 /**
202 * @param None
203 *
204 * @return None
205 *
206 * \par<b>Description:</b><br>
207 * \if XMC4
208 * Disables the clock and resets watchdog timer.\n
209 * \endif
210 * \if XMC1
211 * Disables the clock to the watchdog timer.\n
212 * \endif
213 *
214 * \par<b>Note:</b><br>
215 * \if XMC4
216 * 1. Resets the registers with default values. So XMC_WDT_Init() has to be invoked
again to configure the watchdog.
217 * \endif
218 * \if XMC1
219 * 1. After invoking XMC_WDT_Disable(), all register values are displayed with 0F in
debugger. Once enabled by
220 calling XMC_WDT_Enable(), previous configured register values are displayed. No
need to invoke XMC_WDT_Init()
221 again.
222 * \endif
223 * \par<b>Related APIs:</b><BR>
224 * XMC_WDT_Enable()
225 */
226 void XMC_WDT_Disable(void);
227
228 /**
229 * @param config pointer to a constant watchdog configuration data structure. Refer
data structure XMC_WDT_CONFIG_t
230 * for detail.
231 *
232 * @return None
233 *
234 * \par<b>Description:</b><br>
235 * Initializes and configures watchdog with configuration data pointed by \a config.\n
236 * \par
237 * It invokes XMC_WDT_Enable() to enable clock and release reset. Then configures the
lower and upper window bounds,
238 * working mode (timeout/pre-warning), debug behaviour and service request indication
pulse width.
239 *
240 * \par<b>Note:</b><br>
241 * 1. With out invoking this XMC_WDT_Init() or XMC_WDT_Enable(), invocation of other
APIs like XMC_WDT_SetWindowBounds(),
242 * XMC_WDT_SetMode(), XMC_WDT_SetServicePulseWidth(), XMC_WDT_SetDebugMode(),
XMC_WDT_Start(), XMC_WDT_GetCounter(),
243 * XMC_WDT_Service(), XMC_WDT_ClearAlarm() has no affect.
244 */
245 void XMC_WDT_Init(const XMC_WDT_CONFIG_t *const config);
246
247 /**
248 * @param lower_bound specifies watchdog window lower bound in terms of watchdog
clock (fWDT) cycles.
249 * Range: [0H to FFFFFFFFH].
250 * @param upper_bound specifies watchdog window upper bound in terms of watchdog
clock (fWDT) cycles.
251 * Range: [0H to FFFFFFFFH].
252 *
253 * @return None
254 *
255 * \par<b>Description:</b><br>
256 * Sets watchdog window lower and upper bounds by updating WLB and WUB registers.\n
257 * \par
258 * Window lower and upper bounds are set during initialization in XMC_WDT_Init().
Invoke this API to alter the values as
259 * needed later in the program. This upper bound and lower bound can be calculated by
using the below formula\n
260 * upper_bound or lower_bound = desired_boundary_time(sec) * fwdt(hz)
261 *
262 * \par<b>Note:</b>
263 * 1. Always ensure that upper_bound is greater than the lower_bound value. If not,
whenever timer crosses the
264 * upper_bound value it triggers the reset(wdt_rst_req) of the controller.
265 */
266 __STATIC_INLINE void XMC_WDT_SetWindowBounds(uint32_t lower_bound, uint32_t
upper_bound)
267 {
268 WDT->WLB = lower_bound;
269 WDT->WUB = upper_bound;
270 }
271
272 /**
273 * @param mode is one of the working modes of the watchdog timer, i.e timeout or
pre-warning. Refer @ref XMC_WDT_MODE_t
274 * for valid values.
275 *
276 * @return None
277 *
278 * \par<b>Description:</b><br>
279 * Sets watchdog working mode (timeout or pre-warning) by updating PRE bit of CTR
register.\n
280 * \par
281 * The working mode is set during initialization in XMC_WDT_Init(). Invoke this API
to alter the mode as needed later in
282 * the program.
283 */
284 __STATIC_INLINE void XMC_WDT_SetMode(XMC_WDT_MODE_t mode)
285 {
286 WDT->CTR = (WDT->CTR & (uint32_t)~WDT_CTR_PRE_Msk) | (uint32_t)mode;
287 }
288
289 /**
290 * @param service_pulse_width specifies Service indication pulse width in terms of
fwdt.
291 * Range: [0H – FFH].
292 * @return None
293 *
294 * \par<b>Description:</b><br>
295 * Sets service indication pulse width by updating SPW bit field of CTR register.\n
296 * \par
297 * The service indication pulse (with width service_pulse_width + 1 in fwdt cycles)
is generated on successful servicing
298 * or feeding of watchdog. The pulse width is initially set during initialization in
XMC_WDT_Init(). Invoke this API to
299 * alter the width as needed later in the program.
300 */
301 __STATIC_INLINE void XMC_WDT_SetServicePulseWidth(uint8_t service_pulse_width)
302 {
303 WDT->CTR = (WDT->CTR & (uint32_t)~WDT_CTR_SPW_Msk) | ((uint32_t)service_pulse_width
<< WDT_CTR_SPW_Pos);
304 }
305
306 /**
307 * @param debug_mode running state of watchdog during debug halt mode. Refer @ref
XMC_WDT_DEBUG_MODE_t for
308 * valid values.
309 *
310 * @return None
311 *
312 * \par<b>Description:</b><br>
313 * Sets debug behaviour of watchdog by modifying DSP bit of CTR register.\n
314 * \par
315 * Depending upon DSP bit, the watchdog timer stops when CPU is in HALT mode. The
debug behaviour is initially set as
316 * XMC_WDT_DEBUG_MODE_STOP during initialization in XMC_WDT_Init(). Invoke this API
to change the debug behaviour as
317 * needed later in the program.
318 */
319 __STATIC_INLINE void XMC_WDT_SetDebugMode(const XMC_WDT_DEBUG_MODE_t debug_mode)
320 {
321 WDT->WDTCLR = (WDT->WDTCLR & (uint32_t)~WDT_CTR_DSP_Msk) | (uint32_t)debug_mode;
322 }
323
324 /**
325 * @param None
326 *
327 * @return None
328 *
329 * \par<b>Description:</b><br>
330 * Start the watchdog timer by setting ENB bit of CTR register.\n
331 * \par
332 * Invoke this API to start the watchdog after initialization, or to resume the
watchdog when
333 * paused by invoking XMC_WDT_Stop().
334 *
335 * \par<b>Related APIs:</b><BR>
336 * XMC_WDT_Init(), XMC_WDT_Stop()
337 */
338 __STATIC_INLINE void XMC_WDT_Start(void)
339 {
340 WDT->CTR |= (uint32_t)WDT_CTR_ENB_Msk;
341 }
342
343 /**
344 * @param None
345 *
346 * @return None
347 *
348 * \par<b>Description:</b><br>
349 * Pauses watchdog timer by resetting ENB bit of CTR register.\n
350 * \par
351 * Invoke this API to pause the watchdog as needed in the program e.g. debugging
through software control.
352 *
353 * \par<b>Related APIs:</b><BR>
354 * XMC_WDT_Init(), XMC_WDT_Stop()
355 */
356 __STATIC_INLINE void XMC_WDT_Stop(void)
357 {
358 WDT->CTR &= (uint32_t)~WDT_CTR_ENB_Msk;
359 }
360
361 /**
362 * @param None
363 *
364 * @return uint32_t Current count value of watchdog timer register (TIM).
365 * Range: [0H to FFFFFFFFH]
366 *
367 * \par<b>Description:</b><br>
368 * Reads current count of timer register (TIM).\n
369 * \par
370 * Invoke this API before servicing or feeding the watchdog to check whether count is
between lower and upper
371 * window bounds.
372 *
373 * \par<b>Related APIs:</b><BR>
374 * XMC_WDT_Service()
375 */
376 __STATIC_INLINE uint32_t XMC_WDT_GetCounter(void)
377 {
378 return WDT->TIM;
379 }
380
381 /**
382 * @param None
383 *
384 * @return None
385 *
386 * \par<b>Description:</b><br>
387 * Services or feeds the watchdog by writing the Magic word in SRV register.\n
388 * \par
389 * Service watchdog when count value of watchdog timer is between lower and upper
window bounds. Successful servicing
390 * will reset watchdog timer (TIM register) to 0H and generate service indication
pulse.
391 *
392 * \par<b>Note:</b><br>
393 * 1. invoking this API when count value of watchdog timer is less than window lower
bound results
394 * wrong servicing and immediately triggers reset request.
395 *
396 * \par<b>Related APIs:</b><BR>
397 * XMC_WDT_GetCounter(), XMC_WDT_SetWindowBounds(), XMC_WDT_SetServicePulseWidth()
398 */
399 __STATIC_INLINE void XMC_WDT_Service(void)
400 {
401 WDT->SRV = XMC_WDT_MAGIC_WORD;
402 }
403
404 /**
405 * @param None
406 *
407 * @return None
408 *
409 * \par<b>Description:</b><br>
410 * Clears pre-warning alarm by setting ALMC bit in WDTCLR register.\n
411 * \par
412 * In pre-warning mode, first overflow of the timer upper window bound fires the
pre-warning alarm. XMC_WDT_ClearAlarm()
413 * must be invoked to clear the alarm alarm. After clearing of the alarm, watchdog
timer must be serviced within valid
414 * time window. Otherwise watchdog timer triggers the reset request up on crossing
the upper bound value in a subsequent
415 * cycle.
416 *
417 * \par<b>Related APIs:</b><BR>
418 * XMC_WDT_Service(), XMC_WDT_SetMode()
419 */
420 __STATIC_INLINE void XMC_WDT_ClearAlarm(void)
421 {
422 WDT->WDTCLR = WDT_WDTCLR_ALMC_Msk;
423 }
424
425 #ifdef __cplusplus
426 }
427 #endif
428
429 /**
430 * @}
431 */
432
433 /**
434 * @}
435 */
436
437 #endif /* XMC_WDT_H */
438

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