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LT8630

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0% found this document useful (0 votes)
112 views24 pages

LT8630

Uploaded by

Petr
Copyright
© © All Rights Reserved
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LT8630

100V, 0.6A Synchronous Micropower


Step-Down High Efficiency Switching Regulator

FEATURES DESCRIPTION
n Ultra-Wide Input Voltage Range: 3V to 100V The LT®8630 is a current mode PWM step-down DC/DC
n Boundary Mode Switching for Highest Efficiency converter with internal synchronous switches that provide
n Output Voltage Range: 0.8V to 60V current for output loads up to 0.6A. The wide input range
n Internal Synchronous Switches of 3V to 100V makes the LT8630 suitable for regulating
n Burst Mode® Operation: power from a wide variety of sources, including automo-
n 16µA I at 12V to 5V
Q IN OUT tive and industrial systems and 36V to 72V telecom sup-
n 7µA I at 48V to 5V
Q IN OUT plies. Variable frequency boundary mode switching maxi-
n Low Dropout: 99% Maximum Duty Cycle mizes efficiency across a wide range of input voltages.
n Peak Current Mode Control Low ripple Burst Mode operation enables high efficiency
n Programmable Undervoltage Lockout operation down to very low output currents while keep-
n Power Good Flag ing the output ripple below 5mV. The soft-start feature
n Flexible Output Voltage Tracking controls the ramp rate of the output voltage, eliminating
n Short-Circuit Protection input current surge during start-up, while also provid-
n Low Shutdown Current: 5µA ing output tracking. A power good flag signals when the
n Tolerates Pin Open/Short Faults output voltage is within ±7.5% of the regulated output.
n Thermally Enhanced 20-Lead TSSOP with High Undervoltage lockout can be programmed using the EN/
Voltage Lead Spacing UV pin. Shutdown mode reduces the total quiescent cur-
n AEC-Q100 Qualified for Automotive Applications rent to < 5µA. The LT8630 is available in a 20-lead TSSOP
package with exposed pad for low thermal resistance and
APPLICATIONS high voltage lead spacing.
All registered trademarks and trademarks are the property of their respective owners.
n Automotive Supplies
n Telecom Supplies
n Distributed Supply Regulation

TYPICAL APPLICATION
12V, 0.6A Step-Down Converter Efficiency at VOUT = 12V
100
VIN
VIN BST
13V TO 100V LT8630 90
2.2µF 0.1µF 22µH
EN/UV SW
80
PG
EFFICIENCY (%)

70
IND
VOUT 60
INTVCC VOUT 12V
2.2µF 0.6A 50
10pF 1M
RT FB 40 VIN = 24V
VIN = 48V
8.66k 71.5k 30 VIN = 72V
TR/SS
VIN = 100V
GND 20
47µF
0 100 200 300 400 500 600 700 800
0.1µF
LOAD CURRENT (mA)
8630 TA01b

8630 TA01a

Rev. A

Document Feedback For more information www.analog.com 1


LT8630
ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION
(Note 1)
VIN, EN/UV, PG.........................................................100V TOP VIEW
IND, VOUT,....................................................... 60V/–0.3V VIN 1 20 SW
FB, TR/SS....................................................................4V
Operating Junction Temperature Range EN/UV 3 18 BST
LT8630EFE (Note 2)................................ –40°C to 125°C
LT8630IFE (Note 2)................................. –40°C to 125°C PG 5 GND 16 INTVCC
Storage Temperature Range................... –65°C to 150°C NC 6
21
15 NC
DNC 7 14 IND
RT 8 13 NC
NC 9 12 VOUT
TR/SS 10 11 FB

FE PACKAGE
VARIATION FE20(16)
20-LEAD PLASTIC TSSOP

θJA = 40°C/W, θJC(PAD) = 10°C/W


EXPOSED PAD (PIN 21) IS GND, MUST BE SOLDERED TO PCB

ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LT8630EFE#PBF LT8630EFE#TRPBF LT8630FE 20-Lead Plastic TSSOP –40°C to 125°C
LT8630IFE#PBF LT8630IFE#TRPBF LT8630FE 20-Lead Plastic TSSOP –40°C to 125°C
AUTOMOTIVE PRODUCTS**
LT8630EFE#WPBF LT8630EFE#WTRPBF LT8630FE 20-Lead Plastic TSSOP –40°C to 125°C
LT8630IFE#WPBF LT8630IFE#WTRPBF LT8630FE 20-Lead Plastic TSSOP –40°C to 125°C
Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
**Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These
models are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your
local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for
these models.

ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TJ = 25°C. VIN = 15V, VEN/UV = 2V, unless otherwise specified. (Note 2)

PARAMETER CONDITIONS MIN TYP MAX UNITS


EN/UV Voltage Threshold VEN/UV Rising l 1.14 1.19 1.24 V
EN/UV Voltage Hysteresis 10 17 26 mV
EN/UV Input Current 5 100 nA
VIN Undervoltage Lockout VFB = 0.9V l 2.74 2.8 3.05 V
Quiescent Current from VIN VEN/UV = 0V l 5 15 µA
VFB = 0.9V, VVOUT = 0V l 16 50 µA
VFB = 0.9V, VVOUT = 5V l 3.6 10 µA
Rev. A

2 For more information www.analog.com


LT8630
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TJ = 25°C. VIN = 15V, VEN/UV = 2V, unless otherwise specified. (Note 2)

PARAMETER CONDITIONS MIN TYP MAX UNITS


Quiescent Current from VOUT VFB = 0.9V, VVOUT = 5V l 10 45 µA
VIN Current in Regulation VVOUT = 5V, ILOAD = 100µA 90 180 µA
VVOUT = 5V, ILOAD = 1mA 475 650 µA
Feedback Bias Current VFB = 0.8V –25 –15 nA
Feedback Voltage (VFBREF) VVOUT = 5V, ILOAD = 100mA l 796 808 820 mV
Feedback Voltage Regulation VIN = 7V to 100V, ILOAD = 0.1A to 0.75A, VVOUT = 5V 792 808 824 mV
Track/Soft-Start Source Current VFB = 0.9V, VTR/SS = 0 –6.5 –4.5 –2.5 µA
Track/Soft-Start VOH VFB = 0.9V 2.9 3.0 3.4 V
Track/Soft-Start Sink Current VFB = 0.7V, VTR/SS = 1V 15 30 45 µA
Track/Soft-Start VOL VFB = 0V 50 75 mV
Track/Soft-Start to Feedback Offset VTR/SS = 0.4V, VVOUT = 5V, ILOAD = 100mA –30 5 30 mV
Track/Soft-Start Sink Current POR (Note 4) VFB = 0.9V, VTR/SS = 0.2V 180 230 µA
PG Leakage Current VFB = 0V, VPG = 100V –200 0 200 nA
PG Lower Threshold % of VFBREF (Note 5) VFB Rising l –11.5 –7.5 –4.5 %
PG Upper Threshold % of VFBREF (Note 5) VFB Falling l 4.5 7.5 11.5 %
PG Hysteresis 1.4 1.9 2.3 %
PG Sink Current VFB = 0.7V, VPG = 0.2V 900 µA
Minimum Switch ON Time VIN = 95V, VVOUT = 5V, ILOAD = 0A 150 ns
Minimum Switch OFF Time VIN = 5V, VVOUT = 5V, ILOAD = 500mA, L = 15µH 2.1 µs
IND to VOUT Peak Current (Note 6) VIN = 6V 1.6 2.0 2.7 A
Maximum VOUT Current in Regulation VIN = 10V, VVOUT = 5V, L = 15µH 0.8 1.1 1.4 A
VIN = 50V, VVOUT = 5V, L = 15µH l 0.6 0.9 2.0 A
Switch Pin Leakage Current VSW = 0V, VIN = 100V, VEN = 0V 50 500 nA
VSW = 100V, VIN = 100V, VEN = 0V 0.5 2.0 µA
Top Switch On-Resistance 775 mΩ
Bottom Switch On-Resistance 550 mΩ
BST Pin Current VBST = 18V 180 µA
BST Pin Threshold (Note 7) 2.4 V

Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 4: An internal power on reset (POR) latch is set on the positive
may cause permanent damage to the device. Exposure to any Absolute transition of the EN/UV pin through its threshold or thermal shutdown.
Maximum Rating condition for extended periods may affect device The output of the latch activates a current source on the TR/SS pin which
reliability and lifetime. typically sinks 230µA while discharging the TR/SS capacitor. The latch is
Note 2: The LT8630EFE is guaranteed to meet performance specifications reset when the TR/SS pin is driven below the soft-start POR threshold or
from 0°C to 125°C junction temperature. Specifications over the –40°C the EN/UV pin is taken below its threshold.
to 125°C operating junction temperature range are assured by design, Note 5: The threshold is expressed as a percentage of the feedback
characterization and correlation with statistical process controls. The reference voltage.
LT8630IFE is guaranteed over the full –40°C to 125°C operating junction Note 6: The IND to VOUT peak current is defined as the maximum value of
temperature range. current flowing from the IND pin to the VOUT during a switch cycle.
Note 3: The LT8630 includes overtemperature protection that is intended Note 7: The BST pin threshold is defined as the minimum voltage between
to protect the device during thermal overload conditions. Internal junction the BST and SW pins to keep the top switch on. If the the voltage falls
temperature will exceed 150°C before the overtemperature circuitry below the threshold when the top switch is on, a minimum switch off
becomes active. pulse will be generated.

Rev. A

For more information www.analog.com 3


LT8630
TYPICAL PERFORMANCE CHARACTERISTICS

Efficiency at VOUT = 12V Efficiency at VOUT = 5V Efficiency at VOUT = 3.3V


100 100 95

90 90 85

80 80 75
EFFICIENCY (%)

EFFICIENCY (%)

EFFICIENCY (%)
70 70 65

60 60 55

50 50 45
VIN = 12V VIN = 12V
40 VIN = 24V 40 VIN = 24V 35 VIN = 24V
VIN = 48V VIN = 48V VIN = 48V
30 VIN = 72V 30 VIN = 72V 25 VIN = 72V
VIN = 100V VIN = 100V VIN = 100V
20 20 15
0 100 200 300 400 500 600 700 800 0 100 200 300 400 500 600 700 800 0 100 200 300 400 500 600 700 800
LOAD CURRENT (mA) LOAD CURRENT (mA) LOAD CURRENT (mA)
8630 G01 8630 G02 8630 G03

Efficiency at Load Efficiency at Load Efficiency at Load


100 100 100
VOUT = 12V VOUT = 5V VOUT = 3.3V
90 90 90
80 80 80
70 70 70
EFFICIENCY (%)

EFFICIENCY (%)
EFFICIENCY (%)

60 60 60
50 50 50
40 40 40
30 30 12VIN 30 12VIN
24VIN 24VIN 24VIN
20 20 20
48VIN 48VIN 48VIN
10 72VIN 10 72VIN 10 72VIN
100VIN 100VIN 100VIN
0 0 0
0.00001 0.0001 0.001 0.01 0.1 1 0.00001 0.0001 0.001 0.01 0.1 1 0.00001 0.0001 0.001 0.01 0.1 1
LOAD CURRENT (A) LOAD CURRENT (A) LOAD CURRENT (A)
8630 G04 8630 G05 8630 G06

Efficiency vs Input Voltage Shutdown Supply Current EN/UV Thresholds


96 20.0 1.200
VOUT = 12V
95 ILOAD = 600mA
17.5 1.195
94 EN/UV RISING
15.0 1.190
93
EFFICIENCY (%)

CURRENT (µA)

92 12.5 1.185
VOLTAGE (V)

91 10.0 1.180
90
7.5 1.175
89
5.0 1.170 EN/UV FALLING
88
87 2.5 1.165

86 0 1.160
10 20 30 40 50 60 70 80 90 100 110 –50 –25 0 25 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150
INPUT VOLTAGE (V) TEMPERATURE (°C) TEMPERATURE (°C)
8630 G07 8630 G08 8630 G09

Rev. A

4 For more information www.analog.com


LT8630
TYPICAL PERFORMANCE CHARACTERISTICS

VIN Undervoltage Lockout Reference Voltage Frequency vs Load Current


2.90 812 800
VIN = 48V
700 VOUT = 12V
810

SWITCHING FREQUENCY (KHz)


L = 22µH
2.85 600
808
500

VOLTAGE (mV)
VOLTAGE (V)

806
2.80 400
804
300
802
2.75 200

800 100

2.70 798 0
–50 –25 0 25 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
TEMPERATURE (°C) TEMPERATURE (°C) LOAD CURRENT (A)
8630 G10 8630 G11 8630 G12

No Load Supply Current No Load Supply Current Sleep Quiescent Currents


60 25 20
VIN = 12V IQVIN
18 IQVOUT
50 20 16
14
40
CURRENT (µA)

CURRENT (µA)

CURRENT (µA)
15 12
30 10
10 8
20
6
5 4
10
VOUT = 3.3V VOUT = 3.3V 2
VOUT = 5V VOUT = 5V
0 0 0
–50 –25 0 25 50 75 100 125 150 0 10 20 30 40 50 60 70 80 90 100 2.5 2.75 3 3.25 3.5 3.75 4
TEMPERATURE (°C) INPUT VOLTAGE (V) OUTPUT VOLTAGE (V)
8630 G13 8630 G14 8630 G15

Peak Switch Current Minimum On-Time Switch Resistance


2.2 200 1.4
LOAD = 500mA
2.1 180
1.2
160
2.0
140 1.0
RESISTANCE (Ω)

1.9
CURRENT (A)

120
TIME (ns)

0.8
1.8 100
ON-TIME 0.6
1.7 80
60 0.4
1.6
40
1.5 0.2
20 TOP SWITCH
BOTTOM SWITCH
1.4 0 0
–50 –25 0 25 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150
TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C)
8630 G16 8630 G17 8630 G18

Rev. A

For more information www.analog.com 5


LT8630
TYPICAL PERFORMANCE CHARACTERISTICS

Line Regulation Load Regulation FB to TR/SS Offset Voltage


1.0 1.0 8
VOUT = 5V VIN = 12V
LOAD = 0.5A VOUT = 5V 7

0.5 0.5 6
CHANGE IN VOUT (%)

CHANGE IN VOUT (%)

VFB – VTR/SS (mV)


5

0.0 0 4

–0.5 –0.5 2

1 VTR/SS = 0.4V
LOAD = 0.5A
–1.0 –1.0 0
0 25 50 75 100 0 0.20 0.40 0.60 0.80 –50 –25 0 25 50 75 100 125 150
INPUT VOLTAGE (V) LOAD CURRENT (A) TEMPERATURE (°C)
8630 G19 8630 G20 8630 G21

Soft-Start Tracking PG High Thresholds PG Low Thresholds


1.0 12 –5
LOAD = 0.5A
0.9
11 –6
0.8
PG OFFSET FROM VREF (%)

PG OFFSET FROM VREF (%)


0.7 10 –7
FB VOLTAGE (V)

0.6
9 –8
0.5
8 –9
0.4
0.3 7 –10
0.2
6 –11
0.1 VFB RISING VFB RISING
VFB FALLING VFB FALLING
0 5 –12
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 –50 –25 0 25 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150
TR/SS VOLTAGE (V) TEMPERATURE (°C) TEMPERATURE (°C)
8630 G22 8630 G23 8630 G24

Dropout Voltage Output Current Limit Burst Waveforms


11.90 0.95
VIN 12V
11.80 VOUT SET TO 12V 0.93
VSW
0.91 10V/DIV
11.70
OUTPUT CURRENT (A)

0.89
OUTPUT VOLTAGE (V)

11.60 0.87 VOUT


11.50 0.85 20mV/DIV

11.40 0.83
IL
0.81 200mA/DIV
11.30
0.79 8630 G27
5µs/DIV
11.20 0.77
L = 22µH FRONT PAGE APPLICATION
11.10 0.75 VIN = 24V
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0 10 20 30 40 50 60 70 80 90 100
LOAD = 10mA
LOAD CURRENT (A) INPUT VOLTAGE (V)
8630 G25 8630 G26

FRONT PAGE APPLICATION

Rev. A

6 For more information www.analog.com


LT8630
TYPICAL PERFORMANCE CHARACTERISTICS

Burst Waveforms Switching Waveforms Switching Waveforms

VSW VSW VSW


50V/DIV 50V/DIV 10V/DIV

VOUT VOUT VOUT


50mV/DIV 50mV/DIV 50mV/DIV

IL IL IL
500mA/DIV 1A/DIV 1A/DIV

8630 G28 8630 G29 8630 G30


5µs/DIV 1µs/DIV 1µs/DIV
FRONT PAGE APPLICATION FRONT PAGE APPLICATION FRONT PAGE APPLICATION
VIN = 100V VIN = 100V VIN = 24V
LOAD = 50mA LOAD = 500mA LOAD = 500mA

Load Transient Response Input Voltage Transient Response Start-Up Dropout Performance

VIN
IL
200mA/DIV
VIN
20V/DIV 5V/DIV VOUT

VOUT VOUT
200mV/DIV 500mV/DIV

8630 G31 8630 G32 8630 G33


50µs/DIV 200µs/DIV 50ms/DIV

FRONT PAGE APPLICATION FRONT PAGE APPLICATION FRONT PAGE APPLICATION


200mA TO 600mA LOAD TRANSIENT ILOAD = 500mA ILOAD = 500mA
VIN = 48V

Rev. A

For more information www.analog.com 7


LT8630
PIN FUNCTIONS
VIN (Pin 1): The VIN pin powers the internal control cir- VOUT (Pin 12): The VOUT pin is the output to the internal
cuitry and is monitored by an undervoltage lockout com- sense resistor that measures current flowing in the induc-
parator. The VIN pin is also connected to the drain of the tor. Connect the output capacitor from the VOUT pin to the
on chip power switch. The VIN pin has high dI/dt edges GND pin.
and must be decoupled to the GND pin of the device. The NC13 (Pin 13): No Internal Connection. Leave this pin
input decouple capacitor should be placed as close as open or connect to GND.
possible to the VIN and GND pins.
IND (Pin 14): The IND pin is the input to the internal sense
EN/UV (Pin 3): The EN/UV pin is used to enable the resistor that measures current flowing in the inductor.
LT8630 or to program the undervoltage lockout threshold
with external resistors. The LT8630 is in shutdown mode( NC15 (Pin 15): No Internal Connection. Leave this pin
IQ < 5µA) when the EN/UV pin voltage is below 1.18V and open or connect to GND.
active mode when the voltage exceeds 1.18V. Tie EN/UV INTVCC (Pin 16): The INTVCC pin is the bypass pin for
to the VIN pin if the EN/UV feature isn’t required. the internal 3V regulator. Connect a 2.2µF bypass capaci-
PG (Pin 5): The PG pin is an open drain output that sinks tor from the INTVCC pin to the GND pin. Do not load the
current when the feedback voltage deviates from the regu- INTVCC pin with external circuitry.
lation point by ±7.5%. The PG pin has 1.6% of hysteresis. BST (Pin 18): The BST pin is used to provide a drive
NC6 (Pin 6): No Internal Connection. Leave this pin open voltage, higher than the VIN voltage, to the topside power
or connect to GND. switch. Place a 0.1µF capacitor between the BST and SW
pins as close as possible to the device.
DNC (Pin 7): Do Not Connect. Do not connect this pin,
allow it to float. SW (Pin 20): The SW pin is the output of the internal
power switches. Place the inductor and BST capacitor as
RT (Pin 8): A 8.66k resistor must be connected between close as possible to keep the SW PCB trace short.
the RT pin and GND. The RT resistor sets an internal clock
reference. Do not leave pin floating. GND (Exposed Pad Pin 21): The exposed pad GND pin
is the ONLY GROUND CONNECTION for the device. The
NC9 (Pin 9): No Internal Connection. Leave this pin open
exposed pad should be soldered to a large copper area
or connect to GND.
to reduce thermal resistance. The GND pin also serves as
TR/SS (Pin 10): A capacitor with a minimum value of small signal ground. For ideal operation all small signal
100pF must be connected between the TR/SS pin and the ground paths should connect to the GND pin at a single
GND pin. The voltage ramp rate on the TR/SS pin deter- point avoiding any high current ground returns.
mines the output voltage ramp rate. This pin can also be
used for voltage tracking. Do not leave this pin floating.
FB (Pin 11): The FB pin is the negative input to the error
amplifier. The output switches to regulate this pin to
0.808V with respect to the GND pin.

Rev. A

8 For more information www.analog.com


LT8630
BLOCK DIAGRAM
VIN
VIN

INTVCC
R3 VIN INTVCC
2.8V
+UVLO LDO C4
FAULT
C1

1.19V + BST
UVLO
EN/UV COMP
– TSD
S POR
C3
Q L1
R LATCH SW
R4
INTVCC
S SWITCH Q
OSCILLATOR BOUNDARY LATCH QB
MODE SWITCH R
ON LOGIC

IND
INEG +
CURRENT
ITRIP COMP VOUT
VOUT
0.5V + –
RT
RT AMP
– R1 C5

R5
INTVCC
50mV + PG
4.6µA SS 7.5% +
FB
COMP –7.5% – COMP

+ 0.808
BURST DETECT VC ERROR FB
VC CLAMP AMP –
TR/SS – R2
C2
GND

8630 BD

Figure 1. Block Diagram

Rev. A

For more information www.analog.com 9


LT8630
OPERATION
The LT8630 is a monolithic, variable frequency, current Comparators monitoring the FB pin voltage will pull the
mode step-down DC/DC converter. When the voltage on PG pin low if the output voltage varies more the ±7.5%
the EN/UV pin is below its 1.19V threshold, the LT8630 is from the feedback reference voltage. The PG comparators
shutdown and draws less than 5µA from the input supply. have 1.9% of hysteresis.
When the EN/UV pin is driven above 1.19V, the internal Provided that the output voltage is in regulation (as
bias circuits turn on generating an internal regulated volt- determined by the PG comparators), the LT8630 maxi-
age, 0.808V feedback reference, a 4.5µA soft-start current mizes efficiency across a wide range of input voltages
reference, and a power on reset (POR) signal. by employing a boundary mode switching scheme that
During power-up the POR signal is set and in turn sets the minimizes switching losses. The boundary mode switch-
soft-start latch. When the soft-start latch is set, the TR/SS ing cycle is comprised of three stages: a top-switch ON
pin will be discharged to ground to ensure proper start- phase, a bottom-switch ON phase, and a discontinuous
up operation. When the TR/SS pin drops below 50mV, ring phase. Figure 2 shows an example of boundary mode
the soft-start latch is reset. Once the latch is reset the operation. At the beginning of a switch cycle, the internal
soft-start capacitor starts to charge with a typical value top side power switch is turned on at the peak of the SW
of 4.5µA. node discontinuous ring. The current then flows from
VIN, through the top switch, inductor, and internal sense
The error amplifier is a transconductance amplifier that
resistor to the output. Once the voltage drop across the
compares the FB pin voltage to the lowest voltage pres-
ent at either the TR/SS pin or an internal 0.808V refer- internal sense resistor exceeds a predetermined level set
by the voltage on the internal VC node, the top switch
ence. Since the TR/SS pin is driven by a constant current
is turned off. Inductor current ceases to flow through
source, a single capacitor on the soft-start pin will gen-
the top switch; instead, inductor current discharges the
erate a controlled linear ramp on the output voltage. The
switch node capacitance. The switch node voltage is
voltage on the output of the error amplifier (internal VC
quickly driven below ground and caught by the bottom
node in Figure 1) sets the peak current of each switch
cycle and also determines when to enable low quiescent switch body diode. The bottom-switch ON phase begins
current Burst Mode operation. with the internal low side power switch turning on with
nearly zero drain-source voltage. Energy is delivered to
When the voltage on the VC node rises above the switch- the output as the inductor current decreases from its peak
ing threshold, the internal clock set-pulse sets the driver down to zero. Once the current through the internal sense
flip-flop, which turns on the internal top power switch. resistor reaches zero, the bottom switch turns off and the
This causes current from VIN, through the top switch, switch node discontinuous ring phase begins. The induc-
inductor, and internal sense resistor, to increase. When the tor resonates with the stray capacitance on the switch
voltage drop across the internal sense resistor exceeds a node and causes a discontinuous ring. If the VC volt-
predetermined level set by the voltage on the internal VC age is still above the switching threshold, the top power
node, the flip-flop is reset and the internal top switch is switch is turned on again at the peak of the discontinu-
turned off. Once the top switch is turned off the inductor ous ring and another cycle commences. The switching
will drive the voltage on the SW pin low. The synchro- frequency during boundary mode operation is determined
nous power switch will turn on, decreasing the current in by the inductor value, input voltage, output voltage, and
the inductor until the reverse current comparator trips, output current.
indicating that the inductor current is close to zero. If
The regulator's maximum output current occurs when the
the VC voltage is still above the switching threshold,
internal VC node is driven to its maximum clamp value
the top power switch is turned on again and another
cycle commences. by the error amplifier. The value of the typical maximum

Rev. A

10 For more information www.analog.com


LT8630
OPERATION
switch current is 1.8A. If the current demanded by the out- In light load situations (low VC voltage) , the LT8630 oper-
put exceeds the maximum current dictated by the internal ates in Burst Mode to optimize efficiency. Between bursts,
VC clamp, the TR/SS pin will be discharged, lowering the all circuitry associated with controlling the output switch
regulation point until the output voltage can be supported is shut down reducing the input supply current to 16µA.
by the maximum current. Once the overload condition is In a typical application, 16µA will be consumed from the
removed, the regulator will soft-start from the overload input supply when regulating with no load.
regulation point. To improve efficiency across all loads, supply current to
EN/UV pin control or thermal shutdown will set the soft- internal circuitry is sourced from the VOUT pin when it’s
start latch, resulting in a complete soft-start sequence. biased at 3.5V or above. If the VOUT pin is below 3.5V the
internal supply current is sourced from VIN.

VIN

TSW
IL

RSENSE
TOP SW
VOUT
ON MODE
+ – BSW

IL
I • 0A

VIN

IL
RSENSE
BOTTOM SW
VOUT
ON MODE
– +

SW

VIN BSW TSW BSW TSW


ON ON ON ON

DISCONTINUOUS DISCONTINUOUS
RSENSE IL RING RING
DISCONTINUOUS
VOUT
RING MODE 8630 F02

Figure 2.

Rev. A

For more information www.analog.com 11


LT8630
APPLICATIONS INFORMATION
Achieving Low Quiescent Current While in Burst Mode operation the peak inductor current
is approximately 280mA resulting in output voltage ripple
To enhance efficiency at light loads, the LT8630 operates
shown in Figure 4. Increasing the output capacitance will
in low ripple Burst Mode operation, which keeps the out-
put capacitor charged to the desired output voltage while decrease the output ripple proportionately. As load ramps
upward from zero the switching frequency will increase
minimizing the input quiescent current and output voltage
until the LT8630 automatically enters boundary mode
ripple. In Burst Mode operation the LT8630 delivers single
operation. The output load at which the LT8630 transi-
small pulses of current to the output capacitor followed
tions into boundary mode varies based on input voltage,
by sleep periods where the output power is supplied by
the output capacitor. While in sleep mode the LT8630 output voltage, and inductor choice.
consumes 16μA.
As the output load decreases, the frequency of single cur-
rent pulses decreases (see Figure 3) and the percentage VSW
10V/DIV
of time the LT8630 is in sleep mode increases, result-
ing in much higher light load efficiency than for typical VOUT
converters. By maximizing the time between pulses, the 20mV/DIV

converter quiescent current approaches 16μA for a typi-


IL
cal application when there is no output load. Therefore, 200mA/DIV
to optimize the quiescent current performance at light 5µs/DIV
8630 F04

loads, the current in the feedback resistor divider must be FRONT PAGE APPLICATION
minimized as it appears to the output as a load current. VIN = 24V
LOAD = 10mA

Figure 4. Burst Mode Operation


800
VIN = 48V
VOUT = 12V
SWITCHING BURST FREQUENCY (kHz)

700
L = 22µH
600
Choosing the Output Voltage
500
The output voltage is programmed with a resistor divider
400
between the output and the FB pin. Choose the 1% resis-
300
tors according to:
200
⎛V ⎞
100 R1= R2 ⎜ OUT – 1⎟
⎝ 0.808 ⎠
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
LOAD CURRENT (A)
8630 F03
Reference designators refer to the Block Diagram in
Figure 1.
Figure 3. Frequency vs Load Current
If low input quiescent current and good light-load effi-
ciency are desired, use large resistor values for the FB
resistor divider. The current flowing in the divider acts as

Rev. A

12 For more information www.analog.com


LT8630
APPLICATIONS INFORMATION
a load current, and will increase the no-load input current A good first choice for the inductor value is 22µH. This
to the converter, which is approximately: value represents a good trade-off between a high switch-
ing frequency and high efficiency.
⎛ ⎛ V ⎞⎞ ⎛ V ⎞ ⎛ 1⎞
IQ = IQVIN + ⎜ IQVOUT + ⎜ OUT ⎟ ⎟ • ⎜ OUT ⎟ • ⎜ ⎟
⎝ ⎝ ⎠
R1+ R2 ⎠ ⎝ VIN ⎠ ⎝ n ⎠ For applications with reduced load current or maximum
input voltage requirements, a smaller inductance value
where IQVIN is the quiescent current of the LT8630 and the may be used. However, an additional constraint on the
second term is the quiescent current drawn from the out- inductor value is the LT8630's minimum discontinuous
put (IQVOUT) plus current in the feedback divider reflected ring time interval. Use a minimum inductor value of 15µH
to the input of the buck operating at its light load efficiency for proper boundary mode operation.
n. For a 5V application with R1 = 1MΩ and R2 = 191kΩ, Once the value for L is known, the type of inductor must
the feedback divider draws 4.2µA. With VIN = 12V IQVIN be selected. High efficiency converters generally cannot
= 3.6µA, IQVOUT = 10µA and n = 50%, the no-load quies- afford the core loss found in low cost powdered iron cores,
cent current is approximately 16µA. For applications with forcing the use of ferrite cores. Ferrite designs have very
output voltages less than 3.5V, IQVOUT = 0µA and IQVIN is low core loss and are preferred at high switching frequen-
typically 16µA. Graphs of IQVIN and IQVOUT vs VOUT are in cies, so design goals can concentrate on copper loss and
the Typical Performance Characteristics section. preventing saturation. Ferrite core material saturates hard,
When using FB resistors greater than 200k, a 4.7pF to which means that inductance collapses abruptly when
22pF phase lead capacitor should be connected from VOUT the peak design current is exceeded. The LT8630 safely
to FB. tolerates operation with a saturated inductor through the
use of a high speed current mode architecture. However,
Dropout Operation inductor saturation results in an abrupt increase in induc-
tor ripple current, power dissipation, and output voltage
If the input voltage falls below VIN(MIN) (dropout mode),
ripple. In order to avoid inductor overheating and poor
the LT8630 will automatically reduce the switching fre-
efficiency, an inductor should be chosen with a satura-
quency to obtain the highest possible output voltage.
tion current rating greater than the 2.7A maximum peak
The lower limit on the switching frequency in dropout
current limit of the LT8630.
mode is determined by the boost threshold. When the
voltage between the BST and SW pins is less than the Maximum Output Current
boost threshold, a minimum off-time pulse is generated
to recharge the boost capacitor. The maximum output current depends on VIN, VOUT,
the effective switch node capacitance, and the inductor
Inductor Selection and Maximum Output Current value. Provided that the inductor value is at least 15µH,
the LT8630 will deliver at least 600mA of output current.
The inductor, along with the input voltage, output volt-
age, and load current, determines the LT8630's switch- A more accurate guaranteed output current can be found
ing frequency. Higher efficiency is generally achieved from:
with a larger inductor value, which produces a lower
frequency. For a given inductor type, however, as induc- 1 ⎛ V –V ⎞
OUTPUT CURRENT(A) = • ⎜ 1.8A – IN OUT ⎟
tance is increased, DC resistance (DCR) also increases. 2 ⎜⎝ (L / C) ⎟⎠
Higher DCR translates into higher copper losses and
lower current rating, both of which place an upper limit Where L is the output inductor value and C is the effective
on the inductance. switch node capacitance (nominally 140pF).

Rev. A

For more information www.analog.com 13


LT8630
APPLICATIONS INFORMATION
Input Capacitor Selection space but will increase output voltage ripple, degrade
transient performance, and may cause loop instability.
Bypass the LT8630 input with a 2.2µF or higher ceramic
Increasing or decreasing the output capacitor may require
capacitor of X7R or X5R type placed as close as possible
increasing or decreasing the 4.7pF feedforward capacitor
to the VIN pin and ground. Y5V types have poor perfor-
placed between the VOUT and FB pins to optimize transient
mance over temperature and applied voltage, and should
response. See the Typical Application section in the data
not be used. Note that larger input capacitance is required
sheet for suggested output and feedforward capacitor
when a lower switching frequency is used. If the input
values.
power source has high impedance, or there is significant
inductance due to long wires or cables, additional bulk Note that even X5R and X7R type ceramic capacitors have
capacitance may be necessary. This can be provided with a DC bias effect which reduces their capacitance when
a low performance electrolytic capacitor. a DC voltage is applied. It is not uncommon for capaci-
A word of caution regarding the use of ceramic capacitors tors offered in the smallest case sizes to lose more than
at the input. A ceramic input capacitor can combine with 50% of their capacitance when operated near their rated
stray inductance to form a resonant tank circuit. If power voltage. As a result it is sometimes necessary to use a
is applied quickly (for example, by plugging the circuit larger capacitance value, larger case size, or use a higher
into a live power source) this tank can ring, doubling the voltage rating in order to realize the intended capacitance
input voltage and damaging the LT8630. The solution is to value. Consult the manufacturer’s data for the capacitor
either clamp the input voltage or dampen the tank circuit you select to be assured of having the necessary capaci-
tance for the application.
by adding a lossy capacitor in parallel with the ceramic
capacitor. For details, see Application Note 88. Ceramic Capacitors
Output Capacitor Selection Ceramic capacitors are small, robust, and have very low
ESR. However, ceramic capacitors can cause problems
The output capacitor has two essential functions. Along
when used with the LT8630 due to their piezoelectric
with the inductor, it filters the square wave generated
by the LT8630 to produce the DC output. In this role it nature. When in Burst Mode operation, the LT8630's
switching frequency depends on the load current, and at
determines the output ripple, thus low impedance at the
very light loads the LT8630 can excite the ceramic capaci-
switching frequency is important. The second function is
tor at audio frequencies, generating audible noise. Since
to store energy in order to satisfy transient loads and sta-
bilize the LT8630's control loop. Since the LT8630 uses the LT8630 operates at a lower current limit during Burst
Mode operation, the noise is typically very quiet to the
current mode control, it does not require the presence of
casual ear. If this noise in unacceptable, use a high per-
output capacitor series resistance (ESR) for stability. Low
ESR or ceramic capacitors should be used to achieve very formance tantalum or electrolytic capacitor at the output.
low output ripple and small circuit size. Low noise ceramic capacitors are also available.

A 47µF, X5R or X7R ceramic capacitor with a voltage Enable Pin


rating greater than the desired output voltage is an excel-
The LT8630 is in shutdown when the EN/UV pin is low
lent first choice for most applications. The 47µF output
and active when the pin is high. The rising threshold of
capacitor will provide low output ripple with good tran- the EN/UV comparator is 1.19V, with 17mV of hysteresis.
sient response. Increasing the value will reduce the out- The EN/UV pin can be tied to VIN if the shutdown feature
put voltage ripple and improve transient response, but is not used, or tied to a logic level if shutdown control
may increase application cost and require more board is required.
space. Decreasing the value may save cost and board

Rev. A

14 For more information www.analog.com


LT8630
APPLICATIONS INFORMATION
Adding a resistor divider from VIN to EN/UV programs the die temperature because of the higher power dissipation
LT8630 to regulate the output only when VIN is above a across the regulator. Do not connect an external load to
desired voltage (see the Block Diagram). Typically, the the INTVCC pin.
EN/UV threshold is used in situations where the supply
is current limited, or has a relatively high source resis- Soft-Start and Output Voltage Tracking
tance. A switching regulator draws constant power from The LT8630 regulates its output to the lowest voltage
the source, so source current increases as source volt- present at either the TR/SS pin or an internal 0.808V refer-
age drops. This looks like a negative resistance load to ence. A capacitor from the TR/SS pin to ground is charged
the source and can cause the source to current limit or by an internal 4.5µA current source resulting in a linear
latch low under low source voltage conditions. The EN/UV output ramp from 0V to the regulated output whose dura-
threshold prevents the regulator from operating at source tion is given by:
voltages where the problems might occur. This threshold
can be adjusted by setting the values R3 and R4 such that C • 0.808V
TRAMP = TR / SS
they satisfy the following equation: 4.5µA

⎛ R3 ⎞ At power-up, a reset signal (POR) sets the soft-start


VEN THRESHOLD = ⎜ + 1 • 1.19V
⎝ R4 ⎟⎠ latch and discharges the TR/SS pin to approximately 0V
to ensure proper start-up. The TR/SS pin has a maxi-
where the LT8630 will remain off until VIN is above the mum current sink capability of 230µA. If the TR/SS pin is
EN/UV threshold. Due to the comparator’s hysteresis, used as a track function for an external voltage, the maxi-
switching will not stop until the input falls slightly below mum sink current must not be exceeded during startup.
the threshold voltage. Exceeding the maximum TR/SS sink current will inhibit
When operating in Burst Mode operation for light load operation.
currents, the current through the EN/UV resistor network When the TR/SS pin is fully discharged, the latch is reset
can easily be greater than the supply current consumed and the internal 4.5µA current source starts to charge the
by the LT8630. Therefore, the EN/UV resistors should be TR/SS pin. When the TR/SS pin voltage is below ~50mV,
large to minimize their effect on efficiency at low loads. the VC pin is pulled low which disables switching.
INTVCC Regulator As the TR/SS pin voltage rises above 50mV, the VC pin is
released and the output voltage is regulated to the TR/SS
An internal low dropout (LDO) regulator produces the 3V
voltage. When the TR/SS pin voltage exceeds the internal
supply from VIN that powers the drivers and the inter-
808mV reference, the output is regulated to the reference.
nal bias circuitry. The INTVCC can supply enough cur-
The TR/SS pin voltage will continue to rise to ~3V.
rent for the LT8630's circuitry and must be bypassed
to ground with a minimum of 2.2µF ceramic capacitor. The soft-start latch is set during several fault conditions:
Good bypassing is necessary to supply the high transient EN/UV pin is below 1.19V, INTVCC has fallen too low, VIN
currents required by the power MOSFET gate drivers. To is too low, or thermal shutdown. Once the latch is set,
improve efficiency, the internal regulator draws power the TR/SS pin will discharge to ~0V and a new startup
from the VOUT pin when the output voltage is 3.5V or sequence will begin.
higher. If the VOUT pin is below 3.5V, the internal regu- If the load exceeds the maximum output switch current,
lator will consume current from VIN. Applications with the output will start to drop causing the internal VC clamp
high input voltage and high switching frequency where to be activated. As long as the VC node is clamped, the
the internal regulator pulls current from VIN will increase TR/SS pin will be discharged. As a result, the output will
be regulated to the highest voltage that the maximum

Rev. A

For more information www.analog.com 15


LT8630
APPLICATIONS INFORMATION
output current can support. For example, if the output on However, if the VIN pin is grounded while the output is
the front page application is loaded by 4Ω the TR/SS pin held high, regardless of EN, parasitic body diodes inside
will drop to 0.48V, regulating the output at 3V. Once the the LT8630 can pull current from the output through the
overload condition is removed, the output will soft-start SW pin and the VIN pin. Figure 5 shows a connection of
from the temporary voltage level to the normal regulation the VIN and EN/UV pins that will allow the LT8630 to run
point. only when the input voltage is present and that protects
Since the TR/SS pin is pulled up to the 3V rail and has to against a shorted or reversed input.
discharge to 0.808V before taking control of regulation, D1 LT8630
momentary overload conditions will be tolerated without VIN VIN

a sort-start recovery. The typical time before the TR/SS EN/UV


pin takes control is: C1
GND
8630 F05

C • 2.2V
TTR /SS(CONTROL) = TR /SS
30µA
Figure 5. Reverse Input Voltage Protection
Output Power Good PCB Layout
When the LT8630's output voltage is within the ±7.5% For proper operation and minimum EMI, care must be
window of the regulation point (VFBREF) , typically 0.74V taken during printed circuit board layout. Figure 6 shows
to 0.86V, the output voltage is considered good and the the recommended component placement with trace,
open-drain PG pin is a high impedance node, and is typi- ground plane, and via locations. Note that large, switched
cally pulled high with an external resistor. Otherwise, the currents flow in the LT8630's VIN pin and the input capaci-
internal pull-down device will pull the PG pin low. To pre- tor (C1). The loop formed by the input capacitor should
vent glitching both the upper and lower thresholds include be as small as possible by placing the capacitor adjacent
1.9% of hysteresis. to the VIN pin and ground plane. When using a physically
The PG pin is also actively pulled low during several fault large input capacitor the resulting loop may become too
conditions: EN/UV pin is below 1.19V, VIN undervoltage, large in which case using a small case/value capacitor
or thermal shutdown. placed close to the VIN pin and ground plane plus a larger
capacitor further away is preferred. These components,
Shorted and Reverse Input Protection
along with the inductor and output capacitor, should be
If the inductor is chosen so that it won’t saturate exces- placed on the same side of the circuit board, and their
sively, the LT8630 will tolerate a shorted output. connections should be made on that layer. Place a local,
There is another situation to consider in systems where unbroken ground plane under the application circuit on
the output will be held high when the input to the LT8630 the layer closest to the surface layer. The SW and BST
is absent. This may occur in battery charging applications nodes should be as small as possible. Finally, keep the
or in battery back-up systems where a battery or some FB and RT nodes small so that the ground traces will
other supply is diode ORed with the LT8630's output. shield them from the SW and BST nodes. The exposed
If the VIN pin is allowed to float and the EN/UV pin is pan on the bottom of the package must be soldered to
held high (either by a logic signal or because it is tied ground so that the pad is connected to ground electrically
to VIN), then the LT8630's internal circuitry will pull its and also acts as a heat sink thermally. To keep thermal
quiescent current through its SW pin. This is acceptable resistance low, extend the ground plane as much as pos-
if the system can tolerate ~6mA in this state. If the EN sible, and add thermal vias under and near the LT8630 to
pin is grounded the SW pin current will drop to near 5µA. additional ground planes within the circuit board and on
the bottom side.
Rev. A

16 For more information www.analog.com


LT8630
APPLICATIONS INFORMATION
High Temperature Considerations as the ambient temperature approaches the maximum
junction rating. Power dissipation within the LT8630 can
For higher ambient temperatures, care should be taken in
be estimated by calculating the total power loss from
the layout of the PCB to ensure good heat sinking of the
an efficiency measurement and subtracting the induc-
LT8630. The exposed pad on the bottom of the package
tor loss. The die temperature is calculated by multiplying
must be soldered to a ground plane. This ground should
be tied to large copper layers below with thermal vias; the LT8630 power dissipation by the thermal resistance
these layers will spread heat dissipated by the LT8630. from junction to ambient.

Placing additional vias can reduce thermal resistance If safe junction temperature is exceeded, the LT8630 will
further. The maximum load current should be derated shutdown and restart with a POR sequence.

C1
VIN 1 20 SW

EN/UV 3 18 BST

PG 5 16 INTVCC

6 15

7 14 IND

RT 8 13

9 12 VOUT

TR/SS 10 11 FB

8630 F06
VIAS TO GROUND PLANE OUTLINE OF LOCAL
GROUND PLANE

Figure 6. Recommended PCB Layout for the LT8630

Rev. A

For more information www.analog.com 17


LT8630
APPLICATIONS INFORMATION
3.3V, 0.6A Step-Down Converter

VIN
VIN BST
4.3V TO 100V LT8630
2.2µF 0.1µF 15µH
EN/UV SW

IND
VOUT
INTVCC VOUT
3.3V, 0.6A
2.2µF
4.7pF 1M
RT FB

8.66k 324k
TR/SS
100µF
GND 1210
0.1µF 6.3V, X7R

L: SUMIDA CDRH8D38NP-150NC 8630 TA02

PIN NOT USED IN THIS CIRCUIT: PG

–15V, 300mA Step-Down Converter

VIN
VIN BST L1
15V TO 85V LT8630 0.1µF 22µH
2.2µF
EN/UV SW

IND

TR/SS VOUT
0.1µF 2.2pF 1M
RT FB

8.66k 56.2k
INTVCC 22µF
GND 1210
25V
2.2µF
VOUT
–15V
300mA
L1 = SUMIDA CDRH8D38NP-220NC 8630 TA03

PIN NOT USED IN THIS CIRCUIT: PG

Rev. A

18 For more information www.analog.com


LT8630
TYPICAL APPLICATIONS

Wide Input 5V and Ultralow Noise 3V Step-Down Converter

VIN
VIN BST L1
6.5V TO 100V
2.2µF 0.1µF 22µH
EN/UV SW

LT8630

INTVCC IND VOUT1 VOUT2


2.2µF 5V, 400mA 3.3V
VOUT IN OUT
IOUT(MAX)
47µF
10pF 1M EN/UV OUTS 200mA
1210
TR/SS FB 16V LT3042
0.1µF 200k 453k
191k
RT PG
8.66k PG SET PGFB 4.7µF
GND 4.7µF 33.2k 49.9k
GND ILIM

L1: WURTH 7447714220 8630 TA04a

Wide Input 5V and Ultralow


Noise 3.3V Application

VSW
10V/DIV

5V OUTPUT
AC-COUPLED
10mV/DIV

3.3V OUTPUT
AC-COUPLED
2µV/DIV

8630 TA04b
1µs/DIV

Rev. A

For more information www.analog.com 19


LT8630
TYPICAL APPLICATIONS

High Efficiency 12V Step-Down Converter


Efficiency vs Load Current
100
VIN VOUT = 12V
VIN BST L1
13V TO 100V
LT8630 0.1µF 24µH 95
2.2µF
EN/UV SW
VOUT 90
D1

EFFICIENCY (%)
100k 85

POWER GOOD PG IND 80


VOUT
INTVCC VOUT 12V 75
0.6A
2.2µF 10pF 1M
47µF 70 24VIN
RT FB 1210 48VIN
16V 65 72VIN
8.66k TR/SS 100VIN
71.5k
GND 60
0.1µF 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
LOAD CURRENT (A)
8630 TA05b

D1: VISHAY SS2PH10


L1: B65807JR49 EPCOS RM6 CORE WITH 0.2mm CENTERPOLE GAP 8630 TA05a
NINE TURNS 60/38G LITZ WIRE

28V Step-Down Converter LT8630 Efficiency


95
VIN
VIN BST L1
30V TO 100V LT8630
2.2µF 0.1µF 33µH 90
1M 0.1µF
×2 SW
85
EFFICIENCY (%)

EN/UV IND

41.2k 80
VOUT
INTVCC VOUT 28V
2.2µF 0.6A 75
22pF 1M

RT FB 4.7µF 70
VIN = 64V
8.66k VOUT = 28V
GND
TR/SS
29.4k + 65
47µF 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
0.1µF
LOAD CURRENT (A)
8630 TA06b

8630 TA06a

L: WURTH 7447714330

Rev. A

20 For more information www.analog.com


LT8630
TYPICAL APPLICATIONS
Low EMI High Step-Down Ratio 1.8V/5A Converter

15V INTERMEDIARY VOLTAGE

EN/UV
VIN1 VIN2
VIN 1µF 1µF
VIN BST L1 GND1 GND2
15V TO 100V
0.1µF 22µH
2.2µF
EN/UV SW LT8640
LT8630 PG BST
INTVCC IND 0.1µF
SYNC/MODE
2.2µF 1µH, L2
VOUT 22µF SW
10pF 1M 1210 VOUT
25V 1.8V, 5A
TR/SS FB 10pF 866k
TR/SS
56.2k
0.1µF FB
RT
INTVCC 1M
RT PG 100µF
GND 18.2k 1µF 1210
8.66k 0.1µF GND BIAS 6.3V

L1: WURTH 7447714220 8630 TA07a

L2: VISHAY IHLP2525CZ-01

Efficiency for Cascaded LT8630/LT8640 Converter

80
VOUT = 1.8V

75

70
EFFICIENCY (%)

65

60

55
100VIN
48VIN
50
0 1 2 3 4 5
LOAD CURRENT (A)
8630 TA07b

Rev. A

For more information www.analog.com 21


LT8630
PACKAGE DESCRIPTION
FE Package
Variation: FE20(16)
20-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1924 Rev Ø)
Exposed Pad Variation CB

6.40 – 6.60*
3.86 (.252 – .260)
(.152) 3.86
(.152)
20 18 16 15 14 13 12 11

6.60 ±0.10
2.74
4.50 ±0.10 (.108)
6.40
SEE NOTE 4 2.74 (.252)
(.108) BSC
0.45 ±0.05

1.05 ±0.10

0.65 BSC
RECOMMENDED SOLDER PAD LAYOUT 1 3 5 6 7 8 9 10
1.20
4.30 – 4.50* (.047)
(.169 – .177) 0.25 MAX
REF
0° – 8°

0.65
0.09 – 0.20 0.50 – 0.75 (.0256) 0.05 – 0.15
(.0035 – .0079) (.020 – .030) BSC (.002 – .006)
0.195 – 0.30 FE20(16) (CB) TSSOP REV 0 0512

(.0077 – .0118)
NOTE: TYP
1. CONTROLLING DIMENSION: MILLIMETERS 4. RECOMMENDED MINIMUM PCB METAL SIZE
MILLIMETERS FOR EXPOSED PAD ATTACHMENT
2. DIMENSIONS ARE IN
(INCHES) *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
3. DRAWING NOT TO SCALE SHALL NOT EXCEED 0.150mm (.006") PER SIDE

Rev. A

22 For more information www.analog.com


LT8630
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER
A 01/22 Added AEC-Q100 statement. 1
Correct typo under Order Information device marking from 8630PE to 8630FE and added #W devices. 2

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license For more by
is granted information www.analog.com
implication or otherwise under any patent or patent rights of Analog Devices. 23
LT8630
TYPICAL APPLICATION
5V/0.6A Step-Down Converter

VIN
VIN BST
6.5V TO 100V LT8630 0.1µF 22µH
2.2µF
EN/UV SW

IND
VOUT
INTVCC VOUT
5V, 0.6A
2.2µF
10pF 1M
RT FB

8.66k 191k
TR/SS
47µF
GND
1210
0.1µF 16V

L: TDK CLF7045NIT-220M-D 8630 TA08

PIN NOT USED IN THIS CIRCUIT: PG

RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LT8631 100V/1A Micropower Step-Down DC/DC Converter VIN: 3V to 100V, VOUT(MIN) = 0.8V, IQ = 7μA, ISD < 5µA, HV, TSSOP-20E
with IQ = 15µA
LT8620 65V, 2A, Synchronous Step-Down DC/DC, VIN: 3.4V to 65V, VOUT(MIN) = 0.97V, IQ = 2.5μA, ISD < 1mA, MSOP-16E and
Converter 3mm × 5mm QFN Packages
LT3991 55V, 1.2A, Synchronous Micropower Step-Down VIN: 4.2V to 55V, VOUT(MIN) = 1.20V, IQ = 2.8μA, ISD < 1μA, 3mm × 3mm DFN-10
DC/DC, Converter with IQ = 2.8μA and MSOP-10E Packages
LT8610 42V, 2.5A, High Efficiency Micropower Step-Down VIN: 3.4V to 42V, VOUT(MIN) = 0.97V, IQ: 2.5µA, ISD: <1µA, TSSOP16E
DC/DC, Converter with IQ = 2.5μA
LT8614 42V, 4A, High Efficiency Micropower Step-Down VIN: 3.4V to 42V, VOUT(MIN) = 0.97V, IQ: 1.7µA, ISD: <1µA, QFN-18
DC/DC, Converter with IQ = 1.7μA
LTC®3630A 76V, 500mA Synchronous Step-Down DC/DC VIN: 4V to 76V, VOUT(MIN) = 0.8V, IQ = 12μA, ISD = 3μA, 3mm × 5mm DFN-16,
Converter MSOP-16(12)E
LTC3637 76V, 1A Nonsynchronous Step-Down DC/DC VIN: 4V to 76V, VOUT(MIN) = 0.8V, IQ = 12μA, ISD = 3μA, 3mm × 5mm DFN-16,
Converter MSOP-16(12)E
LTC3638 140V, 250mA Synchronous Step-Down DC/DC VIN: 4V to 140V, VOUT(MIN) = 0.8V, IQ = 12μA, ISD < 1mA, MSOP-16E Package
Converter
LTC3639 150V, 100mA Synchrsonous Step-Down Regulator VIN: 4V to 150V, VOUT(MIN) = 0.8V, IQ = 12μA, ISD = 1.4μA, MSOP-16(12)E

Rev. A

24
01/22
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