LT8613

42V, 6A Synchronous
Step-Down Regulator with
Current Sense and 3µA
Quiescent Current
FEATURES DESCRIPTION
n Rail-to-Rail Current Sense Amplifier with Monitor The LT®8613 is a compact, high efficiency, high speed
n Wide Input Voltage Range: 3.4V to 42V synchronous monolithic step-down switching regulator
n Ultralow Quiescent Current Burst Mode® Operation: that consumes only 3µA of quiescent current. Top and
n 3μA I Regulating 12V to 3.3V bottom power switches are included with all necessary
Q IN OUT
n Output Ripple < 10mV circuitry to minimize the need for external components.
P-P
n High Efficiency Synchronous Operation: The built-in current sense amplifier with monitor and con-
n 95% Efficiency at 3A, 5V
OUT from 12VIN trol pins allows accurate input or output current regulation
n 94% Efficiency at 3A, 3.3V
OUT from 12VIN and limiting. Low ripple Burst Mode operation enables
n Fast Minimum Switch-On Time: 40ns high efficiency down to very low output currents while
n Low Dropout Under All Conditions: 250mV at 3A keeping the output ripple below 10mVP-P. A SYNC pin
n Allows Use of Small Inductors allows synchronization to an external clock. Internal com-
n Low EMI pensation with peak current mode topology allows the use
n Adjustable and Synchronizable: 200kHz to 2.2MHz of small inductors and results in fast transient response
n Current Mode Operation and good loop stability. The EN/UV pin has an accurate
n Accurate 1V Enable Pin Threshold 1V threshold and can be used to program VIN undervolt-
n Internal Compensation age lockout or to shut down the LT8613 reducing the
n Output Soft-Start and Tracking input supply current to 1µA. A capacitor on the TR/SS pin
n Small Thermally Enhanced 3mm × 6mm 28-Lead programs the output voltage ramp rate during start-up.
QFN Package The PG flag signals when VOUT is within ±9% of the pro-
grammed output voltage as well as fault conditions. The
APPLICATIONS LT8613 is available in a small 28-lead 3mm × 6mm QFN
package with exposed pad for low thermal resistance.
n Automotive and Industrial Supplies
All registered trademarks and trademarks are the property of their respective owners.
n General Purpose Step-Down
n CCCV Power Supplies

TYPICAL APPLICATION
5V Step-Down Converter with 6A Output Current Limit Efficiency at 5VOUT
100
VIN VIN = 12V
VIN BST
5.8V TO 42V 95
10µF ON OFF 0.1µF
EN/UV VIN = 24V
3.9µH 8mΩ VOUT 90
SYNC SW 5V
LT8613
EFFICIENCY (%)

IMON 1µF 6A 85

ICTRL ISP
80
ISN
BIAS 75
10pF
PG
INTVCC 70
TR/SS
10µF 1M 65 fSW = 700kHz
RT FB L = 3.9µH
PGND GND 60
1µF 60.4k 243k 100µF 0 1 2 3 4 5 6
LOAD CURRENT (A)
8613 TA01a
fSW = 700kHz 8613 TA01b
L: EPCOS B82559 Rev. A

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LT8613
ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION
(Note 1)
VIN, EN/UV, PG, ISP, ISN............................................42V TOP VIEW

ICTRL
IMON
BIAS...........................................................................25V

ISN
ISP
BST Pin Above SW Pin................................................4V 28 27 26 25
SYNC 1 24 FB
FB, TR/SS, RT, INTVCC, IMON, ICTRL..........................4V TR/SS 2 23 PG
SYNC Voltage ..............................................................6V RT 3 22 BIAS
Operating Junction Temperature Range (Note 2) EN/UV 4 21 INTVCC

LT8613E.............................................. –40°C to 125°C VIN 5 29

GND
20 BST
VIN 6 19 SW
LT8613I............................................... –40°C to 125°C VIN 7 18 SW
Storage Temperature Range................... –65°C to 150°C PGND 8 17 SW
PGND 9 16 SW
PGND 10 15 SW
11 12 13 14

GND
GND
GND
GND
UDE PACKAGE
28-LEAD (3mm × 6mm) PLASTIC QFN

θJA = 40°C/W, θJC(PAD) = 5°C/W

EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB

ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LT8613EUDE#PBF LT8613EUDE#TRPBF LGHX 28-Lead (3mm × 6mm) Plastic QFN –40°C to 125°C
LT8613IUDE#PBF LT8613IUDE#TRPBF LGHX 28-Lead (3mm × 6mm) Plastic QFN –40°C to 125°C
Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.

ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Minimum Input Voltage l 2.9 3.4 V
VIN Quiescent Current VEN/UV = 0V, VSYNC = 0V 1.0 5 µA
l 1.0 20 µA
VEN/UV = 2V, Not Switching, VSYNC = 0V 1.7 6 µA
l 1.7 20 µA
VEN/UV = 2V, Not Switching, VSYNC = 2V 0.3 2.0 mA
VIN Current in Regulation VOUT = 0.97V, VIN = 6V, Output Load = 100µA l 24 60 µA
VOUT = 0.97V, VIN = 6V, Output Load = 1mA l 230 370 µA
Feedback Reference Voltage VIN = 12V, ILOAD = 500mA 0.964 0.970 0.976 V
VIN = 12V, ILOAD = 500mA l 0.958 0.970 0.982 V
Feedback Voltage Line Regulation VIN = 4.0V to 25V, ILOAD = 0.5A l 0.004 0.025 %/V
Feedback Pin Input Current VFB = 1V –20 0.5 20 nA
BIAS Pin Current Consumption VBIAS = 3.3V, ILOAD = 2A, 2MHz 14 mA
Rev. A

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 LT8613
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Minimum On-Time ILOAD = 2A, SYNC = 0V l 20 40 60 ns
ILOAD = 2A, SYNC = 3.3V l 20 35 55 ns
Minimum Off-Time 50 85 120 ns
Oscillator Frequency RT = 221k, ILOAD = 1.5A l 180 210 240 kHz
RT = 60.4k, ILOAD = 1.5A l 665 700 735 kHz
RT = 18.2k, ILOAD = 1.5A l 1.85 2.00 2.15 MHz
Top Power NMOS On-Resistance ISW = 1A 65 mΩ
Top Power NMOS Current Limit l 7.5 9.7 12.0 A
Bottom Power NMOS On-Resistance VINTVCC = 3.4V, ISW = 1A 29 mΩ
Valley Current Limit VINTVCC = 3.4V l 6 10 12 A
SW Leakage Current VIN = 42V, VSW = 0V, 42V –10 0.1 10 µA
EN/UV Pin Threshold EN/UV Rising l 0.94 1.0 1.06 V
EN/UV Pin Hysteresis 40 mV
EN/UV Pin Current VEN/UV = 2V –20 1 20 nA
PG Upper Threshold Offset from VFB VFB Falling l 6.5 9.0 11.5 %
PG Lower Threshold Offset from VFB VFB Rising l –6.5 –9.0 –11.5 %
PG Hysteresis 1.3 %
PG Leakage VPG = 3.3V –40 40 nA
PG Pull-Down Resistance VPG = 0.1V l 680 2000 Ω
SYNC Threshold SYNC Falling 0.7 1.0 1.4 V
SYNC Rising 1.0 1.3 1.55 V
SYNC Pin Current VSYNC = 2V –100 100 nA
TR/SS Source Current l 1.4 2.1 2.7 µA
TR/SS Pull-Down Resistance Fault Condition, TR/SS = 0.1V 230 Ω
Current Sense Voltage (VISP-ISN) VICTRL = 1.5V, VISN = 3.3V l 48 50 52 mV
VICTRL = 1.5V, VISN = 0V l 46 50.5 56 mV
VICTRL = 800mV, VISN = 3.3V l 38 41 46 mV
VICTRL = 800mV, VISN = 0V l 37 42 47 mV
VICTRL = 200mV, VISN = 3.3V l 5 10 15 mV
VICTRL = 200mV, VISN = 0V l 4 10.5 17 mV
IMON Monitor Pin Voltage VISP-ISN = 50mV, VISN = 3.3V l 0.960 1.00 1.040 V
VISP-ISN = 50mV, VISN = 0V l 0.890 0.99 1.09 V
VISP-ISN = 10mV, VISN = 3.3V l 130 220 320 mV
VISP-ISN = 10mV, VISN = 0V l 110 205 300 mV
ISP, ISN Pin Bias Current l –20 20 µA

Note 1: Stresses beyond those listed under Absolute Maximum Ratings temperature range. High junction temperatures degrade operating
may cause permanent damage to the device. Exposure to any Absolute lifetimes. Operating lifetime is derated at junction temperatures greater
Maximum Rating condition for extended periods may affect device than 125°C.
reliability and lifetime. Note 3: This IC includes overtemperature protection that is intended to
Note 2: The LT8613E is guaranteed to meet performance specifications protect the device during overload conditions. Junction temperature will
from 0°C to 125°C junction temperature. Specifications over the –40°C exceed 150°C when overtemperature protection is active. Continuous
to 125°C operating junction temperature range are assured by design, operation above the specified maximum operating junction temperature
characterization, and correlation with statistical process controls. The will reduce lifetime.
LT8613I is guaranteed over the full –40°C to 125°C operating junction

Rev. A

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LT8613
TYPICAL PERFORMANCE CHARACTERISTICS

Efficiency at 5VOUT Efficiency at 3.3VOUT Efficiency at 5VOUT

100 100 100
VIN = 12V VIN = 12V
VIN = 12V
95 95
90
VIN = 24V
90 90
VIN = 24V 80
EFFICIENCY (%)

EFFICIENCY (%)

EFFICIENCY (%)
85 85
VIN = 24V
80 80 70

75 75
60
70 70
50
65 fSW = 700kHz 65 fSW = 700kHz fSW = 700kHz
L = 3.9µH, EPCOS B82559 L = 3.9µH, EPCOS B82559 L = 3.9µH
60 60 40
0 1 2 3 4 5 6 0 1 2 3 4 5 6 0.00001 0.0001 0.001 0.01 0.1 1 10
LOAD CURRENT (A) LOAD CURRENT (A) LOAD CURRENT (A)
8613 G01 8613 G02 8613 G03

Efficiency at 3.3VOUT Efficiency vs Frequency Reference Voltage

100 100 0.985
VIN = 12V 0.982
90 95
0.979

REFERENCE VOLTAGE (V)

0.976
80 90
EFFICIENCY (%)
EFFICIENCY (%)

VIN = 24V 0.973

70 85 0.970
0.967
60 80
0.964
VOUT = 3.3V 0.961
50 75 VIN = 12V
fSW = 700kHz L = 3.9µH 0.958
L = 3.9µH LOAD = 2A
40 70 0.955
0.00001 0.0001 0.001 0.01 0.1 1 10 0 500 1000 1500 2000 2500 –55 –25 5 35 65 95 125 155
LOAD CURRENT (A) FREQUENCY (kHz) TEMPERATURE (°C)
8613 G04 8613 G05 8613 G06

EN/UV Pin Thresholds Load Regulation Line Regulation

1.02 0.5 0.10
VOUT = 5V
0.4 0.08 LOAD = 1A
1.01
EN/UV RISING 0.3 0.06
LOAD REGULATION (%)

1.00
EN/UV THRESHOLD (V)

0.2
CHANGE IN VOUT (%)

0.04
0.1 0.02
0.99
0 0
0.98 –0.1 –0.02

0.97 –0.2 –0.04

EN/UV FALLING
–0.3 –0.06
0.96
–0.4 –0.08
0.95 –0.5 –0.10
–55 –25 0 25 50 75 100 125 150 0 1 2 3 4 5 6 0 10 20 30 40 50
TEMPERATURE (°C) OUTPUT LOAD (A) INPUT VOLTAGE (V)
8613 G07 8613 G08 8613 G09

Rev. A

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 LT8613
TYPICAL PERFORMANCE CHARACTERISTICS

No Load Supply Current Top FET Current Limit vs Duty Cycle Top FET Current Limit
3.8 10 11
3.6
10 15% DUTY CYCLE
9
3.4

TOP FET CURRENT LIMIT (A)

9
INPUT CURRENT (µA)

CURRENT LIMIT (A)

3.2 8

3.0 8
7
2.8 7 70% DUTY CYCLE
2.6 6
6
2.4
5
2.2 5
VOUT = 5V
2.0 4 4
0 10 20 30 40 50 0 20 40 60 80 100 –50 –25 0 25 50 75 100 125 150
INPUT VOLTAGE (V) DUTY CYCLE (%) TEMPERATURE (°C)
8613 G10 8613 G11 8613 G12

Minimum On-Time Minimum Off-Time Dropout Voltage

45 100 0.6

95
40 0.5
90
MINIMUM OFF-TIME (ns)
MINIMUM ON-TIME (ns)

DROPOUT VOLTAGE (V)

35 0.4
85
VSYNC = 0V
30 80 0.3

VSYNC = 3.3V 75
25 0.2
70
20 0.1
65

15 60 0
0 1 2 3 4 5 6 –50 –25 0 25 50 75 100 125 150 0 1 2 3 4 5 6
LOAD CURRENT (A) TEMPERATURE (°C) LOAD CURRENT (A)
8613 G13 8613 G14 8613 G15

Minimum Load to Full Frequency

Switching Frequency Burst Frequency (SYNC Hi)
740 800 60
RT = 60.4k VIN = 12V
730 700 VOUT = 5V
L = 3.9µH 50
SWITCHING FREQUENCY (kHz)

SWITCH FREQUENCY (kHz)

720 600
MINIMUM LOAD (mA)

40
710 500

700 400 30

690 300
20
680 200
10
670 100

660 0 0
–50 –25 0 25 50 75 100 125 150 0 100 200 300 400 500 0 10 20 30 40 50
TEMPERATURE (°C) LOAD CURRENT (mA) INPUT VOLTAGE (V)
8613 G16 8613 G17 8613 G18

Rev. A

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LT8613
TYPICAL PERFORMANCE CHARACTERISTICS

Frequency Foldback Soft-Start Tracking Soft-Start Current

800 1.2 2.4
VOUT = 3.3V VSS = 0.5V
700 VIN = 12V 2.3
VSYNC = 0V 1.0
SWITCHING FREQUENCY (kHz)

600 RT = 60.4k 2.2

SS PIN CURRENT (µA)

0.8

FB VOLTAGE (V)
500 2.1

400 0.6 2.0

300 1.9
0.4
200 1.8
0.2
100 1.7

0 0 1.6
0 0.2 0.4 0.6 0.8 1 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 –50 –25 5 35 65 95 125 155
FB VOLTAGE (V) TR/SS VOLTAGE (V) TEMPERATURE (°C)
8613 G19 8613 G20 8613 G21

RT Programmed Switching
PG High Thresholds PG Low Thresholds Frequency
12.0 –7.0 250
11.5 –7.5
PG THRESHOLD OFFSET FROM VREF (%)
PG THRESHOLD OFFSET FROM VREF (%)

225
11.0 –8.0 200

RT PIN RESISTOR (kΩ)

10.5 FB RISING –8.5 175
10.0 –9.0 150
FB FALLING FB RISING
9.5 –9.5 125
9.0 –10.0 FB FALLING 100
8.5 –10.5 75
8.0 –11.0 50
7.5 –11.5 25
7.0 –12.0 0
–55 –25 5 35 65 95 125 155 –55 –25 5 35 65 95 125 155 0.2 0.6 1 1.4 1.8 2.2
TEMPERATURE (°C) TEMPERATURE (°C) SWITCHING FREQUENCY (MHz)
8613 G22 8613 G23 8613 G24

VIN UVLO Switching Waveforms Switching Waveforms

3.6

3.4 IL
IL 1A/DIV
3.2 1A/DIV
INPUT VOLTAGE (V)

3.0
VSW VSW
2.8 5V/DIV 5V/DIV

2.6
5µs/DIV 8613 G26
1µs/DIV 8613 G27

2.4
12VIN TO 5VOUT AT 20mA; FRONT PAGE APP 12VIN TO 5VOUT AT 2A
VSYNC = 0V FRONT PAGE APP
2.2

2.0
–55 –25 5 35 65 95 125 155
TEMPERATURE (°C)
8613 G25

Rev. A

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 LT8613
TYPICAL PERFORMANCE CHARACTERISTICS

Switching Waveforms Transient Response Transient Response

IL
ILOAD ILOAD
1A/DIV
1A/DIV 1A/DIV

VOUT VOUT
VSW 200mV/DIV 200mV/DIV
10V/DIV

500ns/DIV 8613 G28

50µs/DIV 8613 G29
20µs/DIV 8613 G30

36VIN TO 5VOUT AT 2A 0.1A TO 1.1A TRANSIENT 1A TO 2A TRANSIENT

FRONT PAGE APP 12VIN TO 5VOUT 12VIN TO 5VOUT
COUT = 2×47µF COUT = 2×47µF
FRONT PAGE APP FRONT PAGE APP

Transient Response Start-Up Dropout Performance Start-Up Dropout Performance

ILOAD
1A/DIV
VIN VIN
VIN VIN
2V/DIV 2V/DIV
VOUT VOUT VOUT
200mV/DIV VOUT VOUT
2V/DIV 2V/DIV

20µs/DIV 8613 G31

100ms/DIV 8613 G32
100ms/DIV 8613 G33

2.5Ω LOAD 20Ω LOAD

1A TO 3A TRANSIENT (2A IN REGULATION) (250mA IN REGULATION)
12VIN TO 5VOUT
COUT = 2×47µF
FRONT PAGE APP

Rev. A

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LT8613
TYPICAL PERFORMANCE CHARACTERISTICS

ICTRL Voltage VISP-VISN Sense Voltage VISP-VISN Sense Voltage

60 55 55

54 54
50

MAX VISP-VISN VOLTAGE (mV)

53
MAX VISP-VISN VOLTAGE (mV)

MAX VISP-VISN VOLTAGE (mV)

53
52
40 52
VISP = 0V 51
51
30 50
50
VISP = 3V 49
20 49
48
48 47
10
47 46
0 46 45
0 500 1000 1500 2000 –50 –25 0 25 50 75 100 125 150 0 0.5 1 1.5 2 2.5 3 3.5
ICTRL VOLTAGE (mV) TEMPERATURE (°C) ISP-ISN COMMON MODE (V)
8613 G40 8613 G41 8613 G42

IMON Voltage IMON Voltage IMON Voltage

1200 1200 1.10
VSYNC = 3.3V VSYNC = 0V VISP-VISN = 50mV

1000 1000
1.05

IMON VOLTAGE (V)

800 800
VIMON (mV)

VIMON (mV)

600 600 1.00

400 400
0.95
200 200

0 0 0.90
0 10 20 30 40 50 0 10 20 30 40 50 0 0.5 1 1.5 2 2.5 3 3.5
VISP-VISN (mV) VISP-VISN (mV) ISP-ISN COMMON MODE (V)
8613 G43 8613 G44 8613 G45

Rev. A

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 LT8613
PIN FUNCTIONS
SYNC (Pin 1): External Clock Synchronization Input. GND (Pins 11, 12, 13, 14): It is recommended that
Ground this pin for low ripple Burst Mode operation at these be connected to GND so that the exposed pad
low output loads. Tie to a clock source for synchroniza- GND can be run to the top level GND copper to enhance
tion to an external frequency. Apply a DC voltage of 3V or thermal performance.
higher or tie to INTVCC for pulse-skipping mode. When SW (Pins 15–19): The SW pins are the outputs of the
in pulse-skipping mode, the IQ will increase to several internal power switches. Tie these pins together and con-
hundred µA. When SYNC is DC high or synchronized, nect them to the inductor and boost capacitor. This node
frequency foldback will be disabled. Do not float this pin. should be kept small on the PCB for good performance.
TR/SS (Pin 2): Output Tracking and Soft-Start Pin. This BST (Pin 20): This pin is used to provide a drive voltage,
pin allows user control of output voltage ramp rate during higher than the input voltage, to the topside power switch.
start-up. A TR/SS voltage below 0.97V forces the LT8613 Place a 0.1µF boost capacitor as close as possible to
to regulate the FB pin to equal the TR/SS pin voltage. When the IC.
TR/SS is above 0.97V, the tracking function is disabled and
the internal reference resumes control of the error ampli- INTVCC (Pin 21): Internal 3.4V Regulator Bypass Pin.
fier. An internal 2.2μA pull-up current from INTVCC on this The internal power drivers and control circuits are pow-
pin allows a capacitor to program output voltage slew rate. ered from this voltage. INTVCC maximum output cur-
This pin is pulled to ground with an internal 230Ω MOSFET rent is 20mA. Do not load the INTVCC pin with external
during shutdown and fault conditions; use a series resistor circuitry. INTVCC current will be supplied from BIAS if
if driving from a low impedance output. This pin may be VBIAS > 3.1V, otherwise current will be drawn from VIN.
left floating if the tracking function is not needed. Voltage on INTVCC will vary between 2.8V and 3.4V when
VBIAS is between 3.0V and 3.6V. Decouple this pin to
RT (Pin 3): A resistor is tied between RT and ground to power ground with at least a 1μF low ESR ceramic capac-
set the switching frequency. itor placed close to the IC.
EN/UV (Pin 4): The LT8613 is shut down when this pin BIAS (Pin 22): The internal regulator will draw current
is low and active when this pin is high. The hysteretic from BIAS instead of VIN when BIAS is tied to a voltage
threshold voltage is 1.00V going up and 0.96V going higher than 3.1V. For output voltages of 3.3V and above
down. Tie to VIN if the shutdown feature is not used. An this pin should be tied to VOUT. If this pin is tied to a
external resistor divider from VIN can be used to program supply other than VOUT use a 1µF local bypass capacitor
a VIN threshold below which the LT8613 will shut down. on this pin.
VIN (Pins 5, 6, 7): The VIN pins supply current to the PG (Pin 23): The PG pin is the open-drain output of an
LT8613 internal circuitry and to the internal topside power internal comparator. PG remains low until the FB pin is
switch. These pins must be tied together and be locally within ±9% of the final regulation voltage, and there are
bypassed. Be sure to place the positive terminal of the no fault conditions. PG is valid when VIN is above 3.4V,
input capacitor as close as possible to the VIN pins, and regardless of EN/UV pin state.
the negative capacitor terminal as close as possible to
the PGND pins. FB (Pin 24): The LT8613 regulates the FB pin to 0.970V.
Connect the feedback resistor divider tap to this pin. Also,
PGND (Pins 8, 9, 10): Power Switch Ground. These pins connect a phase lead capacitor between FB and VOUT.
are the return path of the internal bottom-side power Typically, this capacitor is 4.7pF to 10pF.
switch and must be tied together. Place the negative ter-
minal of the input capacitor as close to the PGND pins
as possible.

Rev. A

For more information www.analog.com 9

LT8613
PIN FUNCTIONS
ISP (Pin 25): Current Sense (+) Pin. This is the noninvert- ICTRL (Pin 28): Current Adjustment Pin. ICTRL adjusts
ing input to the current sense amplifier. the maximum ISP-ISN drop before the LT8613 reduces
output current. Connect directly to INTVCC or float for full-
ISN (Pin 26): Current Sense (–) Pin. This is the inverting
scale ISP-ISN threshold of 50mV or apply values between
input to the current sense amplifier.
GND and 1V to modulate current limit. There is an internal
IMON (Pin 27): Proportional-to-Current Monitor Output. 1.4µA pull-up current on this pin. Float or tie to INTVCC
This pin sources a voltage 20 times the voltage between when unused.
the ISP and ISN pins such that:
GND (Exposed Pad Pin 29): Ground. The exposed pad
VIMON = 20 • (VISP-VISN). must be connected to the negative terminal of the input
IMON can source 200µA and sink 10µA. Float IMON capacitor and soldered to the PCB in order to lower the
if unused. thermal resistance.

BLOCK DIAGRAM

VIN
VIN
CIN –
INTERNAL 0.97V REF
+ 3.4V BIAS
R3 1V + REG
OPT EN/UV
– SHDN
SLOPE COMP
R4 INTVCC
OPT
CVCC
OSCILLATOR
ERROR BST
PG 200kHz TO 2.2MHz
±9% AMP

+ VC
BURST SWITCH M1
CBST
+ DETECT LOGIC L
VOUT – AND
SW
ANTI-
SHDN SHOOT
C1 R1 THROUGH M2
TSD
INTVCC UVLO
R2 FB VIN UVLO
PGND
CSS SHDN
(OPT) 2.1µA TSD
VIN UVLO R
TR/SS ISP
+
CF RSEN
RT RT – – R ISN
+ VOUT
SYNC 1.0V COUT
+ 20R
1×

1.4µA

GND ICTRL IMON

8613 BD

Rev. A

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 LT8613
OPERATION
The LT8613 is a monolithic, constant frequency, current To optimize efficiency at light loads, the LT8613 operates
mode step-down DC/DC converter. An oscillator, with in Burst Mode operation in light load situations. Between
frequency set using a resistor on the RT pin, turns on bursts, all circuitry associated with controlling the output
the internal top power switch at the beginning of each switch is shut down, reducing the input supply current to
clock cycle. Current in the inductor then increases until 1.7μA. In a typical application, 3μA will be consumed from
the top switch current comparator trips and turns off the the input supply when regulating with no load. The SYNC
top power switch. The peak inductor current at which pin is tied low to use Burst Mode operation and can be
the top switch turns off is controlled by the voltage on tied to a logic high to use pulse-skipping mode. If a clock
the internal VC node. The error amplifier servos the VC is applied to the SYNC pin the part will synchronize to an
node by comparing the voltage on the VFB pin with an external clock frequency and operate in pulse-skipping
internal 0.97V reference. When the load current increases mode. While in pulse-skipping mode the oscillator oper-
it causes a reduction in the feedback voltage relative to ates continuously and positive SW transitions are aligned
the reference leading the error amplifier to raise the VC to the clock. During light loads, switch pulses are skipped
voltage until the average inductor current matches the to regulate the output and the quiescent current will be
new load current. When the top power switch turns off, several hundred µA.
the synchronous power switch turns on until the next To improve efficiency across all loads, supply current to
clock cycle begins or inductor current falls to zero. If over- internal circuitry can be sourced from the BIAS pin when
load conditions result in more than 10A flowing through biased at 3.3V or above. Else, the internal circuitry will draw
the bottom switch (valley current), the next clock cycle current from VIN. The BIAS pin should be connected to
will be delayed until switch current returns to a safe level. VOUT if the LT8613 output is programmed at 3.3V or above.
The LT8613 includes a current control and monitoring Comparators monitoring the FB pin voltage will pull the PG
loop using the ISN, ISP, IMON and ICTRL pins. The ISP/ pin low if the output voltage varies more than ±9% (typ-
ISN pins monitor the voltage across an external sense ical) from the set point, or if a fault condition is present.
resistor such that the VISP-VISN does not exceed 50mV
by limiting the peak inductor current controlled by the The oscillator reduces the LT8613’s operating frequency
VC node. The current sense amplifier inputs (ISP/ISN) when the voltage at the FB pin is low. This frequency
are rail-to-rail such that input, output, or other system foldback helps to control the inductor current when the
currents may be monitored and regulated. The IMON pin output voltage is lower than the programmed value which
outputs a ground-referenced voltage equal to 20 times occurs during start-up or overcurrent conditions. When
the voltage between the ISP-ISN pins for monitoring sys- a clock is applied to the SYNC pin or the SYNC pin is
tem currents. The ICTRL pin can be used to override the held DC high, the frequency foldback is disabled and the
internal 50mV limit between the ISP, ISN pin to a lower switching frequency will slow down only during overcur-
set point for the current control loop. rent conditions.
If the EN/UV pin is low, the LT8613 is shut down and
draws 1µA from the input. When the EN/UV pin is above
1V, the switching regulator will become active.

Rev. A

For more information www.analog.com 11

LT8613
APPLICATIONS INFORMATION
Achieving Ultralow Quiescent Current much higher light load efficiency than for typical convert-
ers. By maximizing the time between pulses, the converter
To enhance efficiency at light loads, the LT8613 oper-
quiescent current approaches 2.5µA for a typical applica-
ates in low ripple Burst Mode operation, which keeps the
tion when there is no output load. Therefore, to optimize
output capacitor charged to the desired output voltage
while minimizing the input quiescent current and mini- the quiescent current performance at light loads, the cur-
rent in the feedback resistor divider must be minimized
mizing output voltage ripple. In Burst Mode operation the
LT8613 delivers single small pulses of current to the out- as it appears to the output as load current.
put capacitor followed by sleep periods where the output While in Burst Mode operation the current limit of the top
power is supplied by the output capacitor. While in sleep switch is approximately 1A resulting in output voltage
mode the LT8613 consumes 1.7μA. ripple shown in Figure 2. Increasing the output capac-
itance will decrease the output ripple proportionally. As
As the output load decreases, the frequency of single cur-
load ramps upward from zero the switching frequency
rent pulses decreases (see Figure 1a) and the percentage
will increase but only up to the switching frequency
of time the LT8613 is in sleep mode increases, resulting in
programmed by the resistor at the RT pin as shown in
Burst Frequency Figure 1a. The output load at which the LT8613 reaches
800 the programmed frequency varies based on input voltage,
VIN = 12V
VOUT = 5V output voltage, and inductor choice.
700
L = 3.9µH
For some applications it is desirable for the LT8613 to
SWITCH FREQUENCY (kHz)

600

500
operate in pulse-skipping mode, offering two major differ-
ences from Burst Mode operation. First is the clock stays
400
awake at all times and all switching cycles are aligned to
300
the clock. In this mode much of the internal circuitry is
200 awake at all times, increasing quiescent current to several
100 hundred µA. Second is that full switching frequency is
0 reached at lower output load than in Burst Mode operation
0 100 200 300
LOAD CURRENT (mA)
400 500
(see Figure 1b). To enable pulse-skipping mode, the SYNC
(1a) 8613 F01a
pin is tied high either to a logic output or to the INTVCC
pin. When a clock is applied to the SYNC pin the LT8613
Minimum Load to Full Frequency (SYNC DC High) will also operate in pulse-skipping mode.
60

50
IL
MINIMUM LOAD (mA)

40 1A/DIV

30 VSW
5V/DIV

20
5µs/DIV 8613 F02

10 FRONT PAGE 12VIN TO 5VOUT AT 20mA; FRONT PAGE APP

APPLICATION VSYNC = 0V

0
0 10 20 30 40 50
Figure 2. Burst Mode Operation
INPUT VOLTAGE (V)
(1b) 8613 F01b

Figure 1. SW Frequency vs Load Information in

Burst Mode Operation (1a) and Pulse-Skipping Mode (1b)
Rev. A

12 For more information www.analog.com

 LT8613
APPLICATIONS INFORMATION
FB Resistor Network where RT is in kΩ and fSW is the desired switching fre-
The output voltage is programmed with a resistor divider quency in MHz.
between the output and the FB pin. Choose the resistor Table 1. SW Frequency vs RT Value
values according to: fSW (MHz) RT (kΩ)

⎛ V ⎞ 0.2 232
R1= R2 ⎜ OUT – 1⎟ (1)
0.3 150
⎝ 0.970V ⎠
0.4 110
Reference designators refer to the Block Diagram. 0.5 88.7
1% resistors are recommended to maintain output 0.6 71.5
voltage accuracy. 0.7 60.4
If low input quiescent current and good light-load effi- 0.8 52.3
ciency are desired, use large resistor values for the FB 1.0 41.2
resistor divider. The current flowing in the divider acts as 1.2 33.2
a load current, and will increase the no-load input current 14 28.0
to the converter, which is approximately: 1.6 23.7
1.8 20.5
⎛ V ⎞⎛ V ⎞⎛ 1⎞
IQ = 1.7µA + ⎜ OUT ⎟⎜ OUT ⎟⎜ ⎟ (2) 2.0 18.2
⎝ R1+R2 ⎠⎝ VIN ⎠⎝ n ⎠ 2.2 15.8

where 1.7µA is the quiescent current of the LT8613 and Operating Frequency Selection and Trade-Offs
the second term is the current in the feedback divider Selection of the operating frequency is a trade-off between
reflected to the input of the buck operating at its light efficiency, component size, and input voltage range. The
load efficiency n. For a 3.3V application with R1 = 1M and advantage of high frequency operation is that smaller
R2 = 412k, the feedback divider draws 2.3µA. With VIN = inductor and capacitor values may be used. The disadvan-
12V and n = 80%, this adds 0.8µA to the 1.7µA quiescent tages are lower efficiency and a smaller input voltage range.
current resulting in 2.5µA no-load current from the 12V
supply. Note that this equation implies that the no-load The highest switching frequency (fSW(MAX)) for a given
current is a function of VIN; this is plotted in the Typical application can be calculated as follows:
Performance Characteristics section. VOUT + VSW(BOT)
fSW(MAX) = (4)
When using large FB resistors, a 4.7pF to 10pF phase-lead (
tON(MIN) VIN – VSW(TOP) + VSW(BOT) )
capacitor should be connected from VOUT to FB.
where VIN is the typical input voltage, VOUT is the output
Setting the Switching Frequency voltage, VSW(TOP) and VSW(BOT) are the internal switch
The LT8613 uses a constant frequency PWM architecture drops (~0.4V, ~0.18V, respectively at maximum load)
that can be programmed to switch from 200kHz to 2.2MHz and tON(MIN) is the minimum top switch on-time (see the
by using a resistor tied from the RT pin to ground. A table Electrical Characteristics). This equation shows that a
showing the necessary RT value for a desired switching slower switching frequency is necessary to accommodate
frequency is in Table 1. a high VIN/VOUT ratio.
The RT resistor required for a desired switching frequency For transient operation, VIN may go as high as the abso-
can be calculated using: lute maximum rating of 42V regardless of the RT value,
however the LT8613 will reduce switching frequency
46.5 as necessary to maintain control of inductor current to
RT = – 5.2 (3)
fSW assure safe operation.
Rev. A

For more information www.analog.com 13

LT8613
APPLICATIONS INFORMATION
The LT8613 is capable of a maximum duty cycle of greater where ∆IL is the inductor ripple current as calculated in
than 99%, and the VIN-to-VOUT dropout is limited by the Equation 9 and ILOAD(MAX) is the maximum output load
RDS(ON) of the top switch. In this mode the LT8613 skips for a given application.
switch cycles, resulting in a lower switching frequency As a quick example, an application requiring 4A output
than programmed by RT. should use an inductor with an RMS rating of greater than
For applications that cannot allow deviation from the pro- 4A and an ISAT of greater than 5A. During long duration
grammed switching frequency at low VIN/VOUT ratios use overload or short-circuit conditions, the inductor RMS is
the following formula to set switching frequency: greater to avoid overheating of the inductor. To keep the
VOUT + VSW(BOT) efficiency high, the series resistance (DCR) should be less
VIN(MIN) = – VSW(BOT) + VSW(TOP) (5) than 0.020Ω, and the core material should be intended
1– fSW • tOFF(MIN) for high frequency applications.
where VIN(MIN) is the minimum input voltage without The LT8613 limits the peak switch current in order to pro-
skipped cycles, VOUT is the output voltage, VSW(TOP) and tect the switches and the system from overload faults. The
VSW(BOT) are the internal switch drops (~0.4V, ~0.18V, top switch current limit (ILIM) is at least 7.5A at low duty
respectively at maximum load), fSW is the switching cycles and decreases linearly to 6A at DC = 0.8. The induc-
frequency (set by RT), and tOFF(MIN) is the minimum tor value must then be sufficient to supply the desired
switch off-time. Note that higher switching frequency will maximum output current (IOUT(MAX)), which is a function
increase the minimum input voltage below which cycles of the switch current limit (ILIM) and the ripple current.
will be dropped to achieve higher duty cycle.
ΔIL
IOUT(MAX) = ILIM – (8)
Inductor Selection and Maximum Output Current 2
The LT8613 is designed to minimize solution size by The peak-to-peak ripple current in the inductor can be
allowing the inductor to be chosen based on the output calculated as follows:
load requirements of the application. During overload or ⎛ ⎞
short-circuit conditions the LT8613 safely tolerates oper- VOUT V
ΔIL = • ⎜⎜1– OUT ⎟⎟ (9)
ation with a saturated inductor through the use of a high L • fSW ⎝ VIN(MAX) ⎠
speed peak-current mode architecture.
where fSW is the switching frequency of the LT8613, and
A good first choice for the inductor value is:
L is the value of the inductor. Therefore, the maximum
VOUT + VSW(BOT) output current that the LT8613 will deliver depends on
L= (6)
fSW the switch current limit, the inductor value, and the input
and output voltages. The inductor value may have to be
where fSW is the switching frequency in MHz, VOUT is increased if the inductor ripple current does not allow
the output voltage, VSW(BOT) is the bottom switch drop sufficient maximum output current (IOUT(MAX)) given the
(~0.18V) and L is the inductor value in μH. switching frequency, and maximum input voltage used in
To avoid overheating and poor efficiency, an inductor must the desired application.
be chosen with an RMS current rating that is greater than The optimum inductor for a given application may differ
the maximum expected output load of the application. from the one indicated by this design guide. A larger value
In addition, the saturation current (typically labeled ISAT) inductor provides a higher maximum load current and
rating of the inductor must be higher than the load current reduces the output voltage ripple. For applications requir-
plus 1/2 of in inductor ripple current: ing smaller load currents, the value of the inductor may
1 be lower and the LT8613 may operate with higher ripple
IL(PEAK) = ILOAD(MAX) + ΔIL (7)
2
Rev. A

14 For more information www.analog.com

 LT8613
APPLICATIONS INFORMATION
current. This allows use of a physically smaller inductor, LT8613. A ceramic input capacitor combined with trace
or one with a lower DCR resulting in higher efficiency. or cable inductance forms a high quality (under damped)
Be aware that low inductance may result in discontin- tank circuit. If the LT8613 circuit is plugged into a live
uous mode operation, which further reduces maximum supply, the input voltage can ring to twice its nominal
load current. value, possibly exceeding the LT8613’s voltage rating.
This situation is easily avoided (see Analog Devices
For more information about maximum output current and
Application Note 88).
discontinuous operation, see Analog Devices Application
Note 44. Output Capacitor and Output Ripple
Finally, for duty cycles greater than 50% (VOUT/VIN > 0.5),
The output capacitor has two essential functions. Along
a minimum inductance is required to avoid sub-harmonic with the inductor, it filters the square wave generated
oscillation. See Application Note 19. by the LT8613 to produce the DC output. In this role it
determines the output ripple, thus low impedance at the
Input Capacitor
switching frequency is important. The second function is
Bypass the input of the LT8613 circuit with a ceramic to store energy in order to satisfy transient loads and sta-
capacitor of X7R or X5R type placed as close as pos- bilize the LT8613’s control loop. Ceramic capacitors have
sible to the VIN and PGND pins. Y5V types have poor very low equivalent series resistance (ESR) and provide
performance over temperature and applied voltage, and the best ripple performance. For good starting values, see
should not be used. A 10μF ceramic capacitor is adequate the Typical Application section.
to bypass the LT8613 and will easily handle the ripple
current. Note that larger input capacitance is required Use X5R or X7R types. This choice will provide low out-
put ripple and good transient response. Transient perfor-
when a lower switching frequency is used. If the input
mance can be improved with a higher value output capac-
power source has high impedance, or there is significant
itor and the addition of a feedforward capacitor placed
inductance due to long wires or cables, additional bulk
between VOUT and FB. Increasing the output capacitance
capacitance may be necessary. This can be provided with
will also decrease the output voltage ripple. A lower value
a low performance electrolytic capacitor.
of output capacitor can be used to save space and cost
Step-down regulators draw current from the input sup- but transient performance will suffer and may cause loop
ply in pulses with very fast rise and fall times. The input instability. See the Typical Applications in this data sheet
capacitor is required to reduce the resulting voltage rip- for suggested capacitor values.
ple at the LT8613 and to force this very high frequency
switching current into a tight local loop, minimizing EMI. When choosing a capacitor, special attention should be
A 10μF capacitor is capable of this task, but only if it is given to the data sheet to calculate the effective capaci-
tance under the relevant operating conditions of voltage
placed close to the LT8613 (see the PCB Layout section).
bias and temperature. A physically larger capacitor or one
A second precaution regarding the ceramic input capac-
with a higher voltage rating may be required.
itor concerns the maximum input voltage rating of the

Rev. A

For more information www.analog.com 15

LT8613
APPLICATIONS INFORMATION
Enable Pin output capacitor to sense the output current or may be
placed between the VIN bypass capacitor and the input
The LT8613 is in shutdown when the EN pin is low and
power source to sense input current. The current loop
active when the pin is high. The rising threshold of the EN
modulates the internal cycle-by-cycle switch current limit
comparator is 1.0V, with 40mV of hysteresis. The EN pin
such that the average voltage across ISP-ISN pins does
can be tied to VIN if the shutdown feature is not used, or
not exceed 50mV.
tied to a logic level if shutdown control is required.
Care must be taken and filters should be used to assure
Adding a resistor divider from VIN to EN programs the
the signal applied to the ISN and ISP pins has a peak-to-
LT8613 to regulate the output only when VIN is above a
peak ripple of less than 30mV for accurate operation. In
desired voltage (see the Block Diagram). Typically, this
addition to high crest factor current waveforms such as
threshold, VIN(EN), is used in situations where the input
the input current of DC/DC regulators, another cause of
supply is current limited, or has a relatively high source
high ripple voltage across the sense resistor is excessive
resistance. A switching regulator draws constant power
resistor ESL. Typically the problem is solved by using a
from the source, so source current increases as source
small ceramic capacitor across the sense resistor or using
voltage drops. This looks like a negative resistance load
a filter network between the ISP and ISN pins.
to the source and can cause the source to current limit or
latch low under low source voltage conditions. The VIN(EN) The ICTRL pin allows the ISP-ISN set point to be lin-
threshold prevents the regulator from operating at source early controlled from 50mV to 0mV as the ICTRL pin is
voltages where the problems might occur. This threshold ramped from 1V down to 0V, respectively and as shown
can be adjusted by setting the values R3 and R4 such that in Figure 3. When this functionality is unused the ICTRL
they satisfy the following equation: pin may be tied to INTVCC or floated. In addition the ICTRL
pin includes a 2µA pull-up source such that a capacitor
⎛ R3 ⎞
VIN(EN) = ⎜ + 1⎟ • 1.0V (10) may be added for soft-start functionality.
⎝ R4 ⎠
The IMON pin is a voltage output proportional to the
where the LT8613 will remain off until VIN is above VIN(EN). voltage across the current sense resistor such that VIMON
Due to the comparator’s hysteresis, switching will not = 20 • (ISP-ISN) as shown in Figure 4. This output can be
stop until the input falls slightly below VIN(EN). used to monitor the input or output current of the LT8613
or may be an input to an ADC for further processing.
When operating in Burst Mode operation for light load
currents, the current through the VIN(EN) resistor network 60
can easily be greater than the supply current consumed
50
by the LT8613. Therefore, the VIN(EN) resistors should be
MAX VISP-VISN VOLTAGE (mV)

large to minimize their effect on efficiency at low loads. 40

Current Control Loop 30

In addition to regulating the output voltage the LT8613 20

includes a current regulation loop for setting the aver-
10
age input or output current limit as shown in the Typical
Applications section. 0
0 500 1000 1500 2000
The LT8613 measures voltage drop across an external ICTRL VOLTAGE (mV)

current sense resistor using the ISP and ISN pins. This 8613 F03

resistor may be connected between the inductor and the Figure 3. LT8613 Sense Voltage vs ICTRL Voltage

Rev. A

16 For more information www.analog.com

 LT8613
APPLICATIONS INFORMATION
1200
VSYNC = 3.3V
capacitor on TR/SS enables soft starting the output to pre-
vent current surge on the input supply. During the soft-
1000
start ramp the output voltage will proportionally track the
800 TR/SS pin voltage. For output tracking applications, TR/SS
can be externally driven by another voltage source. From
VIMON (mV)

600
0V to 0.97V, the TR/SS voltage will override the internal
400
0.97V reference input to the error amplifier, thus regulating
the FB pin voltage to that of TR/SS pin. When TR/SS is
200 above 0.97V, tracking is disabled and the feedback voltage
0
will regulate to the internal reference voltage. The TR/SS
0 10 20 30 40 50 pin may be left floating if the function is not needed.
VISP-VISN (mV)
8613 F04 An active pull-down circuit is connected to the TR/SS pin
Figure 4. LT8613 Sense Voltage vs IMON Voltage which will discharge the external soft-start capacitor in
the case of fault conditions and restart the ramp when the
INTVCC Regulator faults are cleared. Fault conditions that clear the soft-start
capacitor are the EN/UV pin transitioning low, VIN voltage
An internal low dropout (LDO) regulator produces the falling too low, or thermal shutdown.
3.4V supply from VIN that powers the drivers and the
internal bias circuitry. The INTVCC can supply enough cur- Output Power Good
rent for the LT8613’s circuitry and must be bypassed to
When the LT8613’s output voltage is within the ±9% win-
ground with a minimum of 1μF ceramic capacitor. Good
dow of the regulation point, which is a VFB voltage in the
bypassing is necessary to supply the high transient cur-
range of 0.883V to 1.057V (typical), the output voltage
rents required by the power MOSFET gate drivers. To
is considered good and the open-drain PG pin goes high
improve efficiency the internal LDO can also draw current
impedance and is typically pulled high with an external
from the BIAS pin when the BIAS pin is at 3.1V or higher.
resistor. Otherwise, the internal pull-down device will pull
Typically the BIAS pin can be tied to the output of the
the PG pin low. To prevent glitching both the upper and
LT8613, or can be tied to an external supply of 3.3V or
lower thresholds include 1.3% of hysteresis.
above. If BIAS is connected to a supply other than VOUT,
be sure to bypass with a local ceramic capacitor. If the The PG pin is also actively pulled low during several fault
BIAS pin is below 3.0V, the internal LDO will consume conditions: EN/UV pin is below 1V, INTVCC has fallen too
current from VIN. Applications with high input voltage and low, VIN is too low, or thermal shutdown.
high switching frequency where the internal LDO pulls
current from VIN will increase die temperature because Synchronization
of the higher power dissipation across the LDO. Do not To select low ripple Burst Mode operation, tie the SYNC pin
connect an external load to the INTVCC pin. below 0.4V (this can be ground or a logic low output). To
synchronize the LT8613 oscillator to an external frequency
Output Voltage Tracking and Soft-Start connect a square wave (with 20% to 80% duty cycle) to
The LT8613 allows the user to program its output voltage the SYNC pin. The square wave amplitude should have val-
ramp rate by means of the TR/SS pin. An internal 2.2μA leys that are below 0.4V and peaks above 2.4V (up to 6V).
pulls up the TR/SS pin to INTVCC. Putting an external

Rev. A

For more information www.analog.com 17

LT8613
APPLICATIONS INFORMATION
The LT8613 will not enter Burst Mode operation at low Frequency foldback behavior depends on the state of
output loads while synchronized to an external clock, but the SYNC pin: If the SYNC pin is low the switching fre-
instead will pulse skip to maintain regulation. The LT8613 quency will slow while the output voltage is lower than
may be synchronized over a 200kHz to 2.2MHz range. The the programmed level. If the SYNC pin is connected to
RT resistor should be chosen to set the LT8613 switch- a clock source or tied high, the LT8613 will stay at the
ing frequency equal to or below the lowest synchroni- programmed frequency without foldback and only slow
zation input. For example, if the synchronization signal switching if the inductor current exceeds safe levels.
will be 500kHz and higher, the RT should be selected for
There is another situation to consider in systems where
500kHz. The slope compensation is set by the RT value, the output will be held high when the input to the LT8613 is
while the minimum slope compensation required to avoid absent. This may occur in battery charging applications or
subharmonic oscillations is established by the inductor in battery-backup systems where a battery or some other
size, input voltage, and output voltage. Since the syn- supply is diode ORed with the LT8613’s output. If the VIN
chronization frequency will not change the slopes of the
pin is allowed to float and the EN pin is held high (either
inductor current waveform, if the inductor is large enough by a logic signal or because it is tied to VIN), then the
to avoid subharmonic oscillations at the frequency set by LT8613’s internal circuitry will pull its quiescent current
RT, then the slope compensation will be sufficient for all through its SW pin. This is acceptable if the system can
synchronization frequencies.
tolerate several μA in this state. If the EN pin is grounded
For some applications it is desirable for the LT8613 to the SW pin current will drop to near 1µA. However, if
operate in pulse-skipping mode, offering two major differ- the VIN pin is grounded while the output is held high,
ences from Burst Mode operation. First is the clock stays regardless of EN, parasitic body diodes inside the LT8613
awake at all times and all switching cycles are aligned can pull current from the output through the SW pin and
to the clock. Second is that full switching frequency is the VIN pin. Figure 5 shows a connection of the VIN and
reached at lower output load than in Burst Mode oper- EN/UV pins that will allow the LT8613 to run only when
ation. These two differences come at the expense of the input voltage is present and that protects against a
increased quiescent current. To enable pulse-skipping shorted or reversed input.
mode, the SYNC pin is tied high either to a logic output
or to the INTVCC pin. D1
VIN VIN
The LT8613 does not operate in forced continuous mode LT8613
regardless of SYNC signal. Never leave the SYNC pin EN/UV
floating. GND
8613 F05

Shorted and Reversed Input Protection

The LT8613 will tolerate a shorted output. Several features
Figure 5. Reverse VIN Protection
are used for protection during output short-circuit and
brownout conditions. The first is the switching frequency
will be folded back while the output is lower than the set
point to maintain inductor current control. Second, the
bottom switch current is monitored such that if inductor
current is beyond safe levels switching of the top switch
will be delayed until such time as the inductor current
falls to safe levels.

Rev. A

18 For more information www.analog.com

 LT8613
APPLICATIONS INFORMATION
PCB Layout
ISN ISP
For proper operation and minimum EMI, care must be taken ICTRL IMON
GND

during printed circuit board layout. Figure 6 shows the rec-

28 27 26 25
ommended component placement with trace, ground plane
VOUT
and via locations. Note that large, switched currents flow in SYNC 1 24 FB

the LT8613’s VIN pins, PGND pins, and the input capacitor TR/SS 2 23 PG
(C1). The loop formed by the input capacitor should be as
small as possible by placing the capacitor adjacent to the RT 3 22 BIAS

VIN and PGND pins. When using a physically large input EN/UV 4 21 INTVCC
capacitor the resulting loop may become too large in which
5 20 BST
case using a small case/value capacitor placed close to the VIN
VIN and PGND pins plus a larger capacitor further away is 6 19

preferred. These components, along with the inductor and 7 18

output capacitor, should be placed on the same side of the
circuit board, and their connections should be made on 8 17
SW
that layer. Place a local, unbroken ground plane under the GND 9 16
application circuit on the layer closest to the surface layer.
10
The SW and BOOST nodes should be as small as possible. 15

Finally, keep the FB and RT nodes small so that the ground 11 12 13 14

traces will shield them from the SW and BOOST nodes.

The exposed pad on the bottom of the package must be
soldered to ground so that the pad is connected to ground
electrically and also acts as a heat sink thermally. To keep VOUT

thermal resistance low, extend the ground plane as much as

possible, and add thermal vias under and near the LT8613 VOUT LINE TO BIAS LINE TO ISP
OUTLINE OF LOCAL
8613 F06

to additional ground planes within the circuit board and on VOUT LINE TO ISN VIAS TO GROUND PLANE GROUND PLANE

the bottom side.

Figure 6. Recommended PCB Layout for the LT8613
High Temperature Considerations
For higher ambient temperatures, care should be taken in temperature approaches the maximum junction rating.
the layout of the PCB to ensure good heat sinking of the Power dissipation within the LT8613 can be estimated by
LT8613. The exposed pad on the bottom of the package calculating the total power loss from an efficiency mea-
must be soldered to a ground plane. This ground should be surement and subtracting the inductor loss. The die tem-
tied to large copper layers below with thermal vias; these perature is calculated by multiplying the LT8613 power
layers will spread heat dissipated by the LT8613. Placing dissipation by the thermal resistance from junction to
additional vias can reduce thermal resistance further. The ambient. The LT8613 will stop switching and indicate a
maximum load current should be derated as the ambient fault condition if safe junction temperature is exceeded.

Rev. A

For more information www.analog.com 19

LT8613
TYPICAL APPLICATIONS
5V Step-Down with 5A Output Current Limit

VIN
VIN BST
5.8V TO 42V
10µF ON OFF 0.1µF
EN/UV
3.3µH 0.010Ω VOUT
SYNC 5V
LT8613 SW
IMON 1µF 5A

ICTRL ISP
ISN
BIAS
10pF
PG
INTVCC
TR/SS
1M
RT FB
1µF 52.3k PGND GND 243k 100µF

8613 TA02
fSW = 800kHz
L: VISHAY IHLP2525EZ-01

3.3V Step-Down with 1A Input Current Limit

1µF

VIN 0.050Ω ISN ISP

VIN BST
4.1V TO 42V
10µF ON OFF 0.10µF
EN/UV
3.3µH
SYNC VOUT
LT8613 SW 3.3V
IMON BIAS
ICTRL PG
4.7pF
INTVCC
TR/SS
1M
RT FB
PGND GND
1µF 41.2k 412k 100µF

8613 TA03
fSW = 1MHz
L: VISHAY IHLP2525EZ-01

3.3V Step-Down with 1A Input Current Limit and 7V VIN Undervoltage Lockout

VIN 0.050Ω ISN ISP

4.1V TO 42V VIN BST
1µF 604k 0.1µF
EN/UV
3.3µH
SYNC VOUT
LT8613 SW 3.3V
10µF 100k
IMON BIAS
ICTRL PG
4.7pF
INTVCC
TR/SS
1M
RT FB
PGND GND
1µF 60.4k 412k 100µF

8613 TA04
fSW = 700kHz
L: VISHAY IHLP2525EZ-01
Rev. A

20 For more information www.analog.com

 LT8613
TYPICAL APPLICATIONS
Digitally Controlled Current/Voltage Source

VIN
VIN BST
4.1V TO 42V
10µH ON OFF 0.1µF
EN/UV
3.3µH 0.008Ω VOUT
SYNC 3.3V
LT8613 SW
ADC IMON 1µF 6A
µC
DAC ICTRL ISP
ISN
BIAS
INTVCC 4.7pF
PG
TR/SS
1M
RT FB
1µF 60.4k PGND GND 412k 100µF

8613 TA05
fSW = 700kHz
L: VISHAY IHLP2525EZ-01

CCCV Battery Charger

D1
VIN
VIN BST
5V TO 42V
10µH ON OFF 0.1µF
EN/UV
3.3µH 0.010Ω VOUT
SYNC 4.1V
LT8613 SW
IMON 1µF 5A

ICTRL ISP
ISN
BIAS + Li-Ion
10pF
INTVCC PG BATTERY

TR/SS
324k
RT FB
PGND GND
1µF 60.4k 100k 47µF

8613 TA06
fSW = 700kHz
L: VISHAY IHLP2525EZ-01

–3.3V Negative Converter with 2A Output Current Limit

VIN
VIN BST
3.8V TO 38V 0.1µF
10µF 0.1µF EN/UV 4.7µH
SYNC SW

4.7µF 60.4k LT8613 ISP

1µF
IMON ISN
ICTRL BIAS
10pF
INTVCC PG

TR/SS
1M
RT FB
PGND GND
1µF 60.4k 412k 47µF
0.025Ω VOUT
–3.3V
f = 700kHz 8613 TA07 2A
L: COILCRAFT XAL6060

Rev. A

For more information www.analog.com 21

LT8613
TYPICAL APPLICATIONS
2MHz, 3.3V Step-Down with Power Good without Current Sense

VIN
VIN BST
4.1V TO 42V 0.1µF
10µF EN/UV
ON OFF 1µH VOUT
SYNC SW 3.3V
ISP 6A
IMON LT8613
ISN
ICTRL 150k
BIAS
PG PGOOD
4.7pF
INTVCC
TR/SS
1M
RT FB
PGND GND
1µF 18.2k 412k 100µF

f = 2MHz 8613 TA08

L: VISHAY IHLP2525CZ-01

1V Step-Down with 5A Output Current Limit

VIN
VIN BST
3.8V TO 42V 0.1µF
10µF EN/UV
ON OFF 1µH VOUT
0.010Ω
SYNC SW 0.97V
ISP 5A
IMON LT8613
1µF
ICTRL ISN
BIAS
PG
INTVCC FB
TR/SS
RT 2×100µF
PGND GND
1µF 150k

f = 300kHz 8613 TA09

L: VISHAY IHLP2525CZ-01

12V Step-Down with 5A Output Current Limit

VIN
VIN BST
13V TO 42V 0.1µF
10µF EN/UV
ON OFF 10µH VOUT
0.010Ω
SYNC SW 12V
ISP 5A
IMON LT8613
1µF
ICTRL ISN
BIAS
PG 10pF
INTVCC
TR/SS
1M
RT FB
PGND GND
1µF 60.4k 88.7k 22µF

f = 700kHz 8613 TA10

L: COILCRAFT XAL6060

Rev. A

22 For more information www.analog.com

 LT8613
TYPICAL APPLICATIONS

5A LED Driver

VIN
VIN BST
3.8V TO 42V 0.1µF
4.7µF EN/UV
ON OFF 4.7µH 0.010Ω
SYNC SW 5A
LT8613 ISP
IMON D1
1µF
ICTRL ISN
BIAS
PG 10pF
INTVCC
TR/SS
420k
RT FB
PGND GND
1µF 60.4k 100k 10µF

8613 TA11
f = 700kHz
L: COILCRAFT XAL6060

Rev. A

For more information www.analog.com 23

LT8613
PACKAGE DESCRIPTION
UDE Package
28-Lead Plastic QFN (3mm × 6mm)
(Reference LTC DWG # 05-08-1926 Rev Ø)

0.70 ±0.05

3.50 ±0.05
2.10 ±0.05 4.75 ±0.05
1.50 REF
1.70 ±0.05

PACKAGE OUTLINE

0.25 ±0.05
0.50 BSC
4.50 REF
5.10 ±0.05
6.50 ±0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
PIN 1 NOTCH
R = 0.20 OR 0.35
0.75 ±0.05
1.50 REF × 45° CHAMFER
3.00 ±0.10 R = 0.05 TYP
27 28
0.40 ±0.10

PIN 1 1
TOP MARK
(NOTE 6) 2

4.50 REF
6.00 ±0.10
4.75 ±0.10

1.70 ±0.10

(UDE28) QFN 0612 REV Ø

0.200 REF 0.25 ±0.05

R = 0.115
0.00 – 0.05 TYP 0.50 BSC
BOTTOM VIEW—EXPOSED PAD

NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE

Rev. A

24 For more information www.analog.com

 LT8613
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER
A 5/20 Updated note under Order Information 2
Replaced Linear Technology to Analog Devices 15
Updated links for Related Parts 24

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license For more by
is granted information www.analog.com
implication or otherwise under any patent or patent rights of Analog Devices. 25
LT8613
TYPICAL APPLICATION
Coincident Tracking Step-Downs Each with 5A Output Current Limit

VIN
VIN BST
4.1V TO 42V 0.1µF
10µF EN/UV
ON OFF 3.3µH VOUT
0.010Ω
SYNC SW 3.3V
LT8611 ISP 2A
IMON
1µF
ICTRL ISN 16.5k
BIAS
PG 10pF 20k
INTVCC
TR/SS
0.1µF 232k
RT FB
PGND GND
1µF 88.7k 97.6k 100µF

f = 500kHz

VIN BST
10µF 0.1µF
ON OFF EN/UV 2.2µH VOUT
0.010Ω
SYNC SW 1.8V
LT8613 ISP 2A
IMON
1µF
ICTRL ISN
BIAS
PG 4.7pF
INTVCC
TR/SS
80.6k
RT FB
PGND GND 100µF
1µF 88.7k 93.1k
×2
8613 TA12
f = 500kHz
L: VISHAY IHLP2525EZ-01

RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LT8610A/ 42V, 3.5A, 96% Efficiency, 2.2MHz Synchronous MicroPower Step-Down VIN = 3.4V to 42V, VOUT(MIN) = 0.97V, IQ = 2.5µA, ISD < 1µA,
LT8610AB DC/DC Converter with IQ = 2.5µA MSOP-16E Package
LT8610AC 42V, 3.5A, 96% Efficiency, 2.2MHz Synchronous MicroPower Step-Down VIN = 3V to 42V, VOUT(MIN) = 0.8V, IQ = 2.5µA, ISD < 1µA,
DC/DC Converter with IQ = 2.5µA MSOP-16E Package
LT8610 42V, 2.5A, 96% Efficiency, 2.2MHz Synchronous MicroPower Step-Down VIN = 3.4V to 42V, VOUT(MIN) = 0.97V, IQ = 2.5µA, ISD < 1µA,
DC/DC Converter with IQ = 2.5µA MSOP-16E Package
LT8611 42V, 2.5A, 96% Efficiency, 2.2MHz Synchronous MicroPower Step-Down VIN = 3.4V to 42V, VOUT(MIN) = 0.97V, IQ = 2.5µA, ISD < 1µA,
DC/DC Converter with IQ = 2.5µA and Input/Output Current Limit/Monitor 3mm × 5mm QFN-24 Package
LT8620 65V, 2.5A, 96% Efficiency, 2.2MHz Synchronous MicroPower Step-Down VIN = 3.4V to 65V, VOUT(MIN) = 0.97V, IQ = 2.5µA, ISD < 1µA,
DC/DC Converter with IQ = 2.5µA MSOP-16E, 3mm × 5mm QFN-24 Packages
LT8614 42V, 4A, 96% Efficiency, 2.2MHz Synchronous MicroPower Step-Down VIN = 3.4V to 42V, VOUT(MIN) = 0.97V, IQ = 2.5µA, ISD < 1µA,
DC/DC Converter with IQ = 2.5µA 3mm × 4mm QFN-18 Package
LT8612 42V, 6A, 96% Efficiency, 2.2MHz Synchronous MicroPower Step-Down VIN = 3.4V to 42V, VOUT(MIN) = 0.97V, IQ = 3.0µA, ISD < 1µA,
DC/DC Converter with IQ = 2.5µA 3mm × 6mm QFN-28 Package

Rev. A

26
05/20
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