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The Patent Office Journal No. 49/2024, dated 06/12/2024, includes the publication of a patent application (No. 202441092624 A) titled 'Investigations on Phase Frequency Detector and Charge Pump Circuits' filed by Dr. N. K. Anushkannan. The invention features three modified Pass Transistor PFD circuits, an improved CP circuit, and a high-frequency PLL with a high-speed Modified Dynamic PFD circuit. The document contains 21 pages and outlines 4 claims related to the inventions.

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26 views2 pages

Patent

The Patent Office Journal No. 49/2024, dated 06/12/2024, includes the publication of a patent application (No. 202441092624 A) titled 'Investigations on Phase Frequency Detector and Charge Pump Circuits' filed by Dr. N. K. Anushkannan. The invention features three modified Pass Transistor PFD circuits, an improved CP circuit, and a high-frequency PLL with a high-speed Modified Dynamic PFD circuit. The document contains 21 pages and outlines 4 claims related to the inventions.

Uploaded by

anushkannan nk
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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पेटट कायालय

शासक य जनल

OFFICIAL JOURNAL
OF
THE PATENT OFFICE

िनगमन सं. 49/2024 शु वार दनांक: 06/12/2024


ISSUE NO. 49/2024 FRIDAY DATE: 06/12/2024

पेटट कायालय का एक काशन


PUBLICATION OF THE PATENT OFFICE

The Patent Office Journal No. 49/2024 Dated 06/12/2024 114414


(12) PATENT APPLICATION PUBLICATION (21) Application No.202441092624 A
(19) INDIA
(22) Date of filing of Application :27/11/2024 (43) Publication Date : 06/12/2024

(54) Title of the invention : INVESTIGATIONS ON PHASE FREQUENCY DETECTOR AND CHARGE PUMP CIRCUITS

:H03L0007089000, H03L0007099000, (71)Name of Applicant :


(51) International
H03L0007087000, H04W0064000000, 1)Dr. N. K ANUSHKANNAN
classification
H03D0013000000 Address of Applicant :PROFESSOR & HEAD DEPARTMENT OF ECE,
(86) International KATHIR COLLEGE OF ENGINEERING, COIMBATORE. TAMILNADU
:NA
Application No INDIA 641062 Coimbatore ----------- -----------
:NA
Filing Date Name of Applicant : NA
(87) International Address of Applicant : NA
: NA
Publication No (72)Name of Inventor :
(61) Patent of Addition to 1)Dr. N. K ANUSHKANNAN
:NA
Application Number Address of Applicant :PROFESSOR & HEAD DEPARTMENT OF ECE,
:NA
Filing Date KATHIR COLLEGE OF ENGINEERING, COIMBATORE. TAMILNADU
(62) Divisional to INDIA 641062 Coimbatore ----------- -----------
:NA
Application Number
:NA
Filing Date
(57) Abstract :
Investigations on phase frequency detector and charge pump circuits is the proposed invention. The following circuits are proposed, designed, implemented and
analysed in this invention. The first invention is design of three modified Pass Transistor PFD (PTPFD) circuits with reduced dead zone. Second invention is design of
an improved CP circuit with reduced current mismatch. Final invention is implementation of a high-frequency PLL with the design of a high speed Modified Dynamic
PFD (DPFD) circuit with null dead zone.
No. of Pages : 21 No. of Claims : 4

The Patent Office Journal No. 49/2024 Dated 06/12/2024 115119

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