LM161, LM361

www.ti.com SNOSBJ5C – MAY 1999 – REVISED MARCH 2013

LM161/LM361 High Speed Differential Comparators

Check for Samples: LM161, LM361

1FEATURES DESCRIPTION
•
2 Independent strobes The LM161/LM361 is a very high speed differential
input, complementary TTL output voltage comparator
• Ensured high speed: 20 ns max with improved characteristics over the SE529/NE529
• Tight delay matching on both outputs for which it is a pin-for-pin replacement. The device
• Complementary TTL outputs has been optimized for greater speed performance
and lower input offset voltage. Typically delay varies
• Operates from op amp supplies: ±15V
only 3 ns for over-drive variations of 5 mV to 500 mV.
• Low speed variation with overdrive variation It may be operated from op amp supplies (±15V).
• Low input offset voltage Complementary outputs having maximum skew are
• Versatile supply voltage range provided. Applications involve high speed analog to
digital converters and zero-crossing detectors in disk
file systems.

CONNECTION DIAGRAMS

SOIC or PDIP Package

Figure 1. Top View

Package Numbers D0014A, NFF0014A

TO-100 Package

Figure 2. Package Number LME0010C

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2 All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 1999–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
LM161, LM361
SNOSBJ5C – MAY 1999 – REVISED MARCH 2013 www.ti.com

LOGIC DIAGRAM

*Output is low when current is drawn from strobe pin.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.

(1)
Absolute Maximum Ratings
+
Positive Supply Voltage, V +16V
Negative Supply Voltage, V− −16V
Gate Supply Voltage, VCC +7V
Output Voltage +7V
Differential Input Voltage ±5V
Input Common Mode Voltage ±6V
Power Dissipation 600 mW
Storage Temperature Range −65°C to +150°C
Operating Temperature Range TMIN TMAX
LM161 −55°C to +125°C
−25°C to +85°C
LM361 0°C to +70°C
Lead Temp. (Soldering, 10 seconds) 260°C
For Any Device Lead Below V− 0.3V

(1) The device may be damaged by use beyond the maximum ratings.

Operating Conditions
Min Typ Max
LM161 5V 15V
Supply Voltage V+
LM361 5V 15V
LM161 −6V −15V
Supply Voltage V−
LM361 −6V −15V
LM161 4.5V 5V 5.5V
Supply Voltage VCC
LM361 4.75V 5V 5.25V
(1)
ESD Tolerance 1600V
(2)
PDIP Package Soldering (10 seconds) 260°C
(2) SOIC Package Vapor Phase (60 215°C
Soldering Information
seconds)
Infrared (15 seconds) 220°C

(1) Human body model, 1.5 kΩ in series with 100 pF.

(2) See AN-450 “Surface Mounting Methods and Their Effect on Product Reliability” for other methods of soldering surface mount devices.

2 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated

Product Folder Links: LM161 LM361

 LM161, LM361
www.ti.com SNOSBJ5C – MAY 1999 – REVISED MARCH 2013

Electrical Characteristics (1) (2) (1)

(V+ = +10V, VCC = +5V, V− = −10V, TMIN ≤ TA ≤ TMAX, unless noted)
Parameter Conditions Limits Units
LM161 LM361
Min Typ Max Min Typ Max
Input Offset Voltage 1 3 1 5 mV
5 10 μA
Input Bias Current TA=25°C
20 30 μA
2 2 μA
Input Offset Current TA=25°C
3 5 μA
Voltage Gain TA=25°C 3 3 V/mV
Input Resistance TA=25°C, f=1 kHz 20 20 kΩ
VCC=4.75V,
Logical “1” Output Voltage 2.4 3.3 2.4 3.3 V
ISOURCE=−0.5 mA
VCC=4.75V,
Logical “0” Output Voltage 0.4 0.4 V
ISINK=6.4 mA
Strobe Input “1” Current VCC=5.25V,
200 200 μA
(Output Enabled) VSTROBE=2.4V
Strobe Input “0” Current VCC=5.25V,
−1.6 −1.6 mA
(Output Disabled) VSTROBE=0.4V
Strobe Input “0” Voltage VCC=4.75V 0.8 0.8 V
Strobe Input “1” Voltage VCC=4.75V 2 2 V
Output Short Circuit Current VCC=5.25V, VOUT=0V −18 −55 −18 −55 mA
Supply Current I+ V+=10V, V−=−10V, 4.5 mA
VCC=5.25V,
−55°C≤TA≤125°C
Supply Current I+ V+=10V, V−=−10V, 5 mA
VCC=5.25V,
0°C≤TA≤70°C
Supply Current I− V+=10V, V−=−10V, 10 mA
VCC=5.25V,
−55°C≤TA≤125°C
Supply Current I− V+=10V, 10 mA
V−=−10V,VCC=5.25V,
0°C≤TA≤70°C
Supply Current ICC V+=10V, V−=−10V, 18 mA
VCC=5.25V,
−55°C≤TA≤125°C
Supply Current ICC V+=10V, V−=−10V, 20 mA
VCC=5.25V,
0°C≤TA≤70°C
(3)
Transient Response VIN = 50 mV overdrive
Propagation Delay Time (tpd(0)) TA=25°C 14 20 14 20 ns
Propagation Delay Time (tpd(1)) TA=25°C 14 20 14 20 ns
Delay Between Output A and B TA=25°C 2 5 2 5 ns
Strobe Delay Time (tpd(0)) TA=25°C 8 8 ns
Strobe Delay Time (tpd(1)) TA=25°C 8 8 ns

(1) Typical thermal impedances are as follows:

(2) Refer to RETS161X for LM161H and LM161J military specifications.

(3) Measurements using AC Test circuit, Fanout = 1. The devices are faster at low supply voltages.

Copyright © 1999–2013, Texas Instruments Incorporated Submit Documentation Feedback 3

Product Folder Links: LM161 LM361
LM161, LM361
SNOSBJ5C – MAY 1999 – REVISED MARCH 2013 www.ti.com

Typical Performance Characteristics

Input Currents
vs
Ambient
Offset Voltage Temperature

Figure 3. Figure 4.

Supply Current vs
Input Characteristics Ambient Temperature

Figure 5. Figure 6.

Supply Current vs Propagation Delay vs

Supply Voltage Ambient Temperature

Figure 7. Figure 8.

4 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated

Product Folder Links: LM161 LM361

 LM161, LM361
www.ti.com SNOSBJ5C – MAY 1999 – REVISED MARCH 2013

Typical Performance Characteristics (continued)

Strobe Delay
Delay of Output 1 With vs
Respect to Output 2 vs Ambient
Ambient Temperature Temperature

Figure 9. Figure 10.

Common-Mode Propagation Delay vs

Pulse Response Supply Voltage

Figure 11. Figure 12.

Copyright © 1999–2013, Texas Instruments Incorporated Submit Documentation Feedback 5

Product Folder Links: LM161 LM361
LM161, LM361
SNOSBJ5C – MAY 1999 – REVISED MARCH 2013 www.ti.com

AC TEST CIRCUIT

VIN = ±50 mV FANOUT = 1 FANOUT = 4 V− = −10V C=15 pF C = 30 pF

+
V = +10V R = 2.4k R = 680Ω VCC = 5.25V

6 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated

Product Folder Links: LM161 LM361

 LM161, LM361
www.ti.com SNOSBJ5C – MAY 1999 – REVISED MARCH 2013

SCHEMATIC DIAGRAM

LM161

R10, R16: 85
R11, R17: 205

Copyright © 1999–2013, Texas Instruments Incorporated Submit Documentation Feedback 7

Product Folder Links: LM161 LM361
LM161, LM361
SNOSBJ5C – MAY 1999 – REVISED MARCH 2013 www.ti.com

REVISION HISTORY

Changes from Revision B (March 2013) to Revision C Page

• Changed layout of National Data Sheet to TI format ............................................................................................................ 7

8 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated

Product Folder Links: LM161 LM361

 PACKAGE OPTION ADDENDUM

www.ti.com 30-Jul-2024

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

LM361H/NOPB ACTIVE TO-100 LME 10 500 RoHS & Green Call TI Level-1-NA-UNLIM 0 to 70 ( LM361H, LM361H) Samples

LM361M OBSOLETE SOIC D 14 TBD Call TI Call TI 0 to 70 LM361M

LM361M/NOPB ACTIVE SOIC D 14 55 RoHS & Green SN Level-1-260C-UNLIM 0 to 70 LM361M Samples

LM361MX/NOPB ACTIVE SOIC D 14 2500 RoHS & Green SN Level-1-260C-UNLIM 0 to 70 LM361M Samples

LM361N/NOPB ACTIVE PDIP N 14 25 RoHS & Green NIPDAU Level-1-NA-UNLIM 0 to 70 LM361N Samples

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

www.ti.com 30-Jul-2024

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 31-Oct-2024

TAPE AND REEL INFORMATION

REEL DIMENSIONS TAPE DIMENSIONS

K0 P1

B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers

Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Sprocket Holes

Q1 Q2 Q1 Q2

Q3 Q4 Q3 Q4 User Direction of Feed

Pocket Quadrants

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM361MX/NOPB SOIC D 14 2500 330.0 16.4 6.5 9.35 2.3 8.0 16.0 Q1

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 31-Oct-2024

TAPE AND REEL BOX DIMENSIONS

Width (mm)
H
W

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM361MX/NOPB SOIC D 14 2500 367.0 367.0 35.0

Pack Materials-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 31-Oct-2024

TUBE

T - Tube
height L - Tube length

W - Tube
width

B - Alignment groove width

*All dimensions are nominal

Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
LM361M/NOPB D SOIC 14 55 495 8 4064 3.05
LM361N/NOPB N PDIP 14 25 502 14 11938 4.32

Pack Materials-Page 3
 PACKAGE OUTLINE
LME0010A SCALE 0.800
TO-CAN - 5.72 mm max height
TRANSISTOR OUTLINE

8.51
7.75

4.70
1.02 MAX 4.19 5.72 MAX

1.02
STAND-OFF
UNCONTROLLED 0.25
LEAD DIA
1.397 MAX SEATING PLANE

10X 12.7 MIN

0.53
10X
0.41
0.25 C A

( 3.56)
5 STAND-OFF
4 6

2.92 9.40
3 7 8.51
5.84

A 2 8

1 9
10

1.14
0.86 0.74
0.71
36 TYP

4220604/B 09/2024

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Reference JEDEC registration MO-006/TO-100.

www.ti.com
 EXAMPLE BOARD LAYOUT
LME0010A TO-CAN - 5.72 mm max height
TRANSISTOR OUTLINE

SOLDER MASK
OPENING
10
( 1.4)

1 9
0.07 MAX
ALL AROUND
9X ( 1.4)
METAL METAL

10X ( 0.8)
VIA
2 (R0.05) 8
TYP

9X SOLDER MASK
OPENING

9X 0.07 MAX
ALL AROUND

4 6

( 5.84)
5
(36 ) TYP

LAND PATTERN EXAMPLE

NON-SOLDER MASK DEFINED
SCALE: 12X

4220604/B 09/2024

www.ti.com
 PACKAGE OUTLINE
D0014A SCALE 1.800
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

C
6.2
TYP SEATING PLANE
5.8

A PIN 1 ID 0.1 C
AREA
12X 1.27
14
1

8.75 2X
8.55 7.62
NOTE 3

7
8
0.51
14X
4.0 0.31
B 1.75 MAX
3.8 0.25 C A B
NOTE 4

0.25
TYP
0.13
SEE DETAIL A
0.25
GAGE PLANE

0.25
0 -8 1.27 0.10
0.40

DETAIL A
TYPICAL

4220718/A 09/2016

NOTES:

1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm, per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.43 mm, per side.
5. Reference JEDEC registration MS-012, variation AB.

www.ti.com
 EXAMPLE BOARD LAYOUT
D0014A SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

14X (1.55) SYMM

1
14

14X (0.6)

12X (1.27)
SYMM

7 8

(R0.05)
TYP
(5.4)

LAND PATTERN EXAMPLE

SCALE:8X

SOLDER MASK METAL UNDER SOLDER MASK

METAL OPENING
OPENING SOLDER MASK

0.07 MAX 0.07 MIN

ALL AROUND ALL AROUND

NON SOLDER MASK SOLDER MASK

DEFINED DEFINED

SOLDER MASK DETAILS

4220718/A 09/2016
NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

www.ti.com
 EXAMPLE STENCIL DESIGN
D0014A SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

14X (1.55) SYMM

1
14

14X (0.6)

12X (1.27)
SYMM

7 8

(5.4)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL
SCALE:8X

4220718/A 09/2016
NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.

www.ti.com
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