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1.Explain the architecture of the 80386 microprocessor with an appropriate
diagram
Architecture of the 80386 Microprocessor
The architecture of the 80386 can be divided into the following main units:
1. Bus Interface Unit (BIU)
o Manages communication between the CPU and memory or I/O devices.
o Handles address generation, data transfer, and instruction fetching.
o Uses a 32-bit data bus and a 32-bit address bus.
2. Code Prefetch Unit (CPU)
o Fetches instructions from memory to improve execution speed.
o Uses a 16-byte prefetch queue to store upcoming instructions.
3. Instruction Decode Unit (IDU)
o Decodes the prefetched instructions.
o Converts them into micro-instructions for execution.
4. Execution Unit (EU)
o Performs arithmetic and logic operations.
o Contains 32-bit general-purpose registers and a 32-bit ALU (Arithmetic
Logic Unit).
5. Memory Management Unit (MMU)
o Supports segmentation and paging for efficient memory management.
o Can address up to 4 GB of physical memory and 64 TB of virtual
memory.
6. Segmentation Unit
o Divides memory into segments (Code, Data, Stack, and Extra).
o Each segment can be up to 4 GB in size.
7. Paging Unit
o Implements virtual memory by dividing memory into 4 KB pages.
o Supports a two-level page table hierarchy.
8. Control Unit (CU)
o Controls the overall operation of the processor.
o Manages instruction sequencing and execution.
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2.Describe the following addressing modes of 80386 with example
i) Index addressing mode ii) Direct addressing mode iii) Based index mode
Addressing Modes of the 80386 Microprocessor
The 80386 supports various addressing modes to access memory efficiently. Below are
the descriptions and examples of the requested addressing modes:
(i) Index Addressing Mode
In this mode, an index register (SI or DI) is used to determine the memory
location.
The effective address is calculated as:
Effective Address=Base Address+Index Register\text{Effective Address} =
\text{Base Address} + \text{Index
Register}Effective Address=Base Address+Index Register
Used for accessing arrays or tables.
Example:
MOV EAX, [ARRAY + ESI]
Here, ARRAY is the base address, and ESI acts as the index.
The processor adds ESI to ARRAY to get the actual memory address.
(ii) Direct Addressing Mode
The operand's memory address is directly specified in the instruction.
No calculations are needed to determine the address.
Example:
MOV AL, [1000H]
The instruction directly accesses the memory location 1000H.
Useful for accessing fixed memory locations.
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(iii) Based Index Addressing Mode
Uses both a base register (BX, BP) and an index register (SI, DI) to determine the
memory location.
The effective address is calculated as:
Effective Address=Base Register+Index Register\text{Effective Address} =
\text{Base Register} + \text{Index
Register}Effective Address=Base Register+Index Register
Used for accessing complex data structures like arrays of records.
Example:
MOV EAX, [EBX + ESI]
Here, EBX acts as the base register, and ESI is the index register.
The memory location accessed is the sum of EBX and ESI.
3. Describe the use of various 80386 Data Movement Instructions in assembly
language programming with examples.
1. General Data Transfer Instructions
These instructions transfer data between registers, memory, and immediate values.
Instruction Description Example
Moves data between registers or MOV EAX, EBX (Move EBX value
MOV
memory to EAX)
Exchanges values between two XCHG EAX, ECX (Swap EAX and
XCHG
operands ECX)
PUSH Pushes data onto the stack PUSH EAX (Store EAX on stack)
POP EBX (Load value from stack
POP Pops data from the stack
into EBX)
Example: MOV Instruction
MOV EAX, 1234H ; Load immediate value 1234H into EAX
MOV EBX, EAX ; Copy value from EAX to EBX
MOV [VAR], EBX ; Store EBX value in memory location VAR
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2. Stack Data Transfer Instructions
These instructions handle pushing and popping data from the stack.
Instruction Description Example
PUSH Pushes data onto the stack PUSH ECX (Save ECX on stack)
Removes data from the POP EDX (Retrieve last pushed value into
POP
stack EDX)
Example: PUSH and POP
PUSH EAX ; Save EAX on the stack
MOV EAX,5678H ; Change EAX value
POP EAX ; Restore original EAX value
3. I/O Data Transfer Instructions
These instructions transfer data between CPU and I/O ports.
Instruction Description Example
IN Reads data from an I/O port IN AL, 60H (Read from port 60H into AL)
OUT Writes data to an I/O port OUT 70H, AL (Send AL to port 70H)
Example: IN and OUT Instructions
MOV DX, 03F8H ; COM1 serial port
IN AL, DX ; Read byte from the port
OUT DX, AL ; Write byte back to the port
4. Describe the various operating modes of 80386
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1. Real Mode
Description:
Backwards-compatible mode with the 8086/8088 processors.
Only 1 MB of memory is accessible (20-bit addressing: 2^20 = 1 MB).
No memory protection or multitasking support.
Direct hardware access, making it useful for booting and running older software
(like MS-DOS).
Key Features:
✅ 16-bit registers and instructions.
✅ Segmented memory model (each segment max 64 KB).
✅ Can switch to Protected Mode, but requires a system reset to return.
2. Protected Mode
Description:
Fully 32-bit mode, enabling advanced memory management.
Supports multitasking, virtual memory, and memory protection.
Can access up to 4 GB of physical memory (32-bit addressing: 2^32 = 4 GB).
Uses segmentation and paging for efficient memory management.
Key Features:
✅ Memory Protection: Prevents programs from accessing each other’s memory.
✅ Multitasking: Allows multiple programs to run simultaneously.
✅ Virtual Memory: Can use hard disk space as RAM.
✅ Segmentation & Paging: Used for memory management and security.
Example Use Case:
Switching to Protected Mode (Assembly Code Example)
MOV EAX, CR0 ; Load Control Register 0
OR EAX, 1 ; Set the PE (Protection Enable) bit
MOV CR0, EAX ; Enable Protected Mode
JMP CODE_SEG:START ; Far jump to the protected mode code
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3. Virtual 8086 Mode (VM86 Mode)
Description:
Allows running 8086 programs inside a Protected Mode environment.
Provides DOS compatibility while using Protected Mode features.
Each VM86 task has its own 1 MB memory space, simulating real mode
execution.
Key Features:
✅ Runs multiple DOS applications simultaneously.
✅ Uses Protected Mode memory protection for safety.
5. Explain the General Registers and Segment Registers of 80386 with an
appropriate diagram.
1. General-Purpose Registers (GPRs)
These 32-bit registers are used for data storage, arithmetic operations, and
addressing. They can also be accessed as 16-bit and 8-bit registers for backward
compatibility.
List of General-Purpose Registers
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Register Purpose Usage
Stores results of arithmetic and logic MOV EAX,
EAX (Accumulator Register)
operations 1000H
Used for memory addressing and MOV EBX,
EBX (Base Register)
general storage ARRAY
ECX (Counter Register) Loop counter in iteration instructions LOOP label
Used in multiplication and I/O
EDX (Data Register) MUL EDX
operations
Used for string operations (source
ESI (Source Index Register) MOVSB
pointer)
EDI (Destination Index Used for string operations (destination
STOSB
Register) pointer)
MOV EBP,
EBP (Base Pointer Register) Points to stack frame in function calls
ESP
ESP (Stack Pointer
Points to the top of the stack PUSH EAX
Register)
Breakdown of 32-bit, 16-bit, and 8-bit Access
Each register can be accessed in different sizes:
32-bit (Full register): EAX, EBX, ECX, EDX
16-bit (Lower half): AX, BX, CX, DX
8-bit (Lower and upper halves of 16-bit registers):
o Lower: AL, BL, CL, DL
o Upper: AH, BH, CH, DH
2. Segment Registers
The 80386 uses segmentation for memory management. Segment registers store the base
address of memory segments.
List of Segment Registers
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Segment Register Purpose Usage
CS (Code Segment) Points to the segment containing the program code MOV CS, AX
DS (Data Segment) Points to the segment containing data MOV DS, AX
SS (Stack Segment) Points to the segment where stack operations occur MOV SS, AX
ES (Extra Segment) Additional segment used for data MOV ES, AX
FS & GS Extra segment registers for specialized use MOV FS, AX
Diagram of 80386 Registers
