TL3016, TL3016Y

ULTRA-FAST LOW-POWER
PRECISION COMPARATORS
SLCS130D – MARCH 1997 – REVISED MARCH 2000

D Ultrafast Operation . . . 7.6 ns (Typ) D AND PW PACKAGE

(TOP VIEW)
D Low Positive Supply Current
10.6 mA (Typ) VCC+ 1 8 Q OUT
D Operates From a Single 5-V Supply or From IN + 2 7 Q OUT
a Split ± 5-V Supply IN – 3 6 GND
D Complementary Outputs VCC– 4 5 LATCH ENABLE
D Low Offset Voltage
D No Minimum Slew Rate Requirement
D Output Latch Capability
D Functional Replacement to the LT1016
symbol (each comparator)

description IN +
Q OUT

The TL3016 is an ultrafast comparator designed IN – Q OUT

to interface directly to TTL logic while operating
from either a single 5-V power supply or dual
± 5-V supplies. It features extremely tight offset
voltage and high gain for precision applications. It POSITIVE SUPPLY CURRENT
has complementary outputs that can be latched vs
using the LATCH ENABLE terminal. Figure 1 FREE-AIR TEMPERATURE
shows the positive supply current of this 15
ÎÎÎÎÎ
ÎÎÎÎÎ
comparator. The TL3016 only requires 10.6 mA VCC = ± 5 V
(typical) to achieve a propagation delay of 7.6 ns. 14
I CC – Positive Supply Current – mA

The TL3016 is a pin-for-pin functional replace- 13

ment for the LT1016 comparator, offering higher 12
speed operation but consuming half the power.
11
AVAILABLE OPTIONS
PACKAGED DEVICES 10
CHIP
TA SMALL FORM‡ 9
TSSOP
OUTLINE† (Y)
(PW)
(D) 8
0°C to 70°C TL3016CD TL3016CPWLE TL3016Y
7
– 40°C to 85°C TL3016ID TL3016IPWLE —
† The PW packages are available left-ended taped and reeled only. 6
‡ Chip forms are tested at TA = 25°C only.
5
– 50 – 25 0 25 50 75 100 125
TA – Free-Air Temperature – °C
Figure 1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Copyright  2000, Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1

TL3016, TL3016Y
ULTRA-FAST LOW-POWER
PRECISION COMPARATORS
SLCS130D – MARCH 1997 – REVISED MARCH 2000

TL3016Y chip information

This chip displays characteristics similar to the TL3016C. Thermal compression or ultrasonic bonding may be
used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon
preform.

BONDING PAD ASSIGNMENTS VCC+

(5) (1)
LATCH ENABLE

(1) (1) (8) (2) (8)

(1) IN+ + Q OUT
(3)
IN– – Q OUT
(7) (7)
(4)
(2) (6)
VCC –
GND
55
(6)
CHIP THICKNESS: 10 MILS TYPICAL
BONDING PADS: 4 × 4 MILS MINIMUM
(3)
(6) TJ max = 150°C
TOLERANCES ARE ± 10%.
(4) (5) (6) ALL DIMENSIONS ARE IN MILS.
TERMINALS 1 AND 6 CAN BE
CONNECTED TO MULTIPLE PADS.
63

COMPONENT COUNT
Bipolars 53
MOSFETs 49
Resistors 46
Capacitors 14

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 TL3016, TL3016Y
ULTRA-FAST LOW-POWER
PRECISION COMPARATORS
SLCS130D – MARCH 1997 – REVISED MARCH 2000

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 7 V to 7 V
Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI (LATCH ENABLE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to network ground.
2. Differential voltages are at IN+ with respect to IN –.

DISSIPATION RATING TABLE

TA ≤ 25°C DERATING FACTOR TA = 70°C
PACKAGE
POWER RATING ABOVE TA = 25°C POWER RATING
D 725 mW 5.8 mW/°C 464 mW
PW 525 mW 4.2 mW/°C 336 mW

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3

TL3016, TL3016Y
ULTRA-FAST LOW-POWER
PRECISION COMPARATORS
SLCS130D – MARCH 1997 – REVISED MARCH 2000

electrical characteristics at specified operating free-air temperature, VDD = ±5 V, VLE = 0 (unless

otherwise noted)
TL3016C TL3016I
PARAMETER TEST CONDITIONS† UNIT
MIN TYP‡ MAX MIN TYP‡ MAX
TA = 25°C 0.5 3 0.5 3
VIO Input offset voltage mV
TA = full range 3.5 3.5
Temperature coefficient of
αVIO – 4.8 – 4.5 µV/°C
input offset voltage
TA = 25°C 0.1 0.6 0.1 0.6
IIO Input offset current µA
TA = full range 0.9 1.3
TA = 25°C 6 10 6 10
IIB Input bias current µA
TA = full range 10 10
Common-mode input VDD = ± 5 V – 3.75 3.5 – 3.75 3.5
VICR V
voltage range VDD = 5 V 1.25 3.5 1.25 3.5
Common-mode rejection
CMRR –3.75 ≤ VIC ≤ 3.5 V, TA = 25°C 80 97 80 97 dB
ratio
Positive supply: 4.6 V ≤ +VDD ≤ 5.4 V,
60 72 60 72
y g rejection
Supply-voltage j TA = 25°C
kSVR dB
ratio Negative supply: – 7 V ≤ –VDD ≤ – 2 V,
80 100 80 100
TA = 25°C
I(sink) = 4 mA, V+ ≤ 4.6 V,
500 600 500 600
TA = 25°C
VOL Low level output voltage
Low-level mV
I(sink) = 10 mA, V+ ≤ 4.6 V,
750 750
TA = 25°C
V+ ≤ 4.6 V, IO = 1 mA,
3.6 3.9 3.6 3.9
TA = 25°C
VOH High level output voltage
High-level V
V+ ≤ 4.6 V, IO = 10 mA,
3.4 3.7 3.4 3.7
TA = 25°C
Positive supply current 10.6 12.5 10.6 12.5
IDD TA = full range mA
Negative supply current –1.8 –1.3 –2.4 –1.3
Low-level input voltage
VIL 0.8 0.8 V
(LATCH ENABLE)
High-level input voltage
VIH 2 2 V
(LATCH ENABLE)
Low-level input current VLE = 0 0 1 0 1
IIL µA
(LATCH ENABLE) VLE = 2 V 24 39 24 45
† Full range for the TL3016C is TA = 0°C to 70°C. Full range for the TL3016I is TA = – 40°C to 85°C.
‡ All typical values are measures with TA = 25°C.

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 TL3016, TL3016Y
ULTRA-FAST LOW-POWER
PRECISION COMPARATORS
SLCS130D – MARCH 1997 – REVISED MARCH 2000

switching characteristics, VDD = ±5 V, VLE = 0 (unless otherwise noted)

TL3016C TL3016I
PARAMETER TEST CONDITIONS† UNIT
MIN TYP MAX MIN TYP MAX
∆VI = 100 mV,, TA = 25°C 7.8 10 7.8 10
VOD = 5 mV TA = full range 7.8 11.2 7.8 12.2
tpd1
d1 dela time‡
Propagation delay ns
∆VI = 100 mV,, TA = 25°C 7.6 10 7.6 10
VOD = 20 mV TA = full range 7.6 11.2 7.6 12.2
∆VI = 100 mV, VOD = 5 mV,
tsk(p) Pulse skew (|tpd+ – tpd–|) 0.5 0.5 ns
TA = 25°C
tsu Setup time, LATCH ENABLE 2.5 2.5 ns
† Full range for the TL3016C is 0°C to 70°C. Full range for the TL3016I is – 40°C to 85°C.
‡ tpd1 cannot be measured in automatic handling equipment with low values of overdrive. The TL3016 is 100% tested with a 1-V step and 500-mV
overdrive at TA = 25°C only. Correlation tests have shown that tpd1 limits given can be ensured with this test, if additional dc tests are performed
to ensure that all internal bias conditions are correct. For low overdrive conditions, VOS is added to the overdrive.

TYPICAL CHARACTERISTICS

Table of Graphs
FIGURE
vs Input voltage 2
ICC Positive supply current vs Frequency 3
vs Free-air temperature 4
ICC Negative supply current vs Free-air temperature 5
vs Overdrive voltage 6
vs Supply voltage 7
tpd Propagation delay time vs Input impedance 8
vs Load capacitance 9
vs Free-air temperature 10
VIC Common-mode input voltage vs Free-air temperature 11
Input threshold voltage (LATCH ENABLE) vs Free-air temperature 12
vs Output source current 13
VO Output voltage
vs Output sink current 14
II Input current (LATCH ENABLE) vs Input voltage 15

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5

TL3016, TL3016Y
ULTRA-FAST LOW-POWER
PRECISION COMPARATORS
SLCS130D – MARCH 1997 – REVISED MARCH 2000

TYPICAL CHARACTERISTICS

POSITIVE SUPPLY CURRENT POSITIVE SUPPLY CURRENT

vs vs

ÎÎÎÎ ÎÎÎÎÎ
INPUT VOLTAGE FREQUENCY

ÎÎÎÎ ÎÎÎÎÎ
20 22
VCC = ± 5 V VCC = ± 5 V

ÎÎÎÎ ÎÎÎÎÎ
18 TA = 25°C
20 TA = 25°C
I CC – Positive Supply Current – mA

I CC – Positive Supply Current – mA

16
TA = 85°C 18
14
TA = 25°C TA = 85°C
12
16
10 TA = 25°C
14
8
TA = – 40°C
6 12

4 TA = – 40°C
10
2

0 8
1 2 3 4 5 6 7 8 0 101 102
VI – Input Voltage – V f – Frequency – MHz
Figure 2 Figure 3

POSITIVE SUPPLY CURRENT NEGATIVE SUPPLY CURRENT

vs vs
FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
15
ÎÎÎÎÎ 0
ÎÎÎÎÎ
ÎÎÎÎÎ
VCC = ± 5 V
14 VCC = ± 5 V
I CC – Negative Supply Current – mA
I CC – Positive Supply Current – mA

– 0.5
13

12
–1
11

10 – 1.5

9
–2
8

7
– 2.5
6

5 –3
– 50 – 25 0 25 50 75 100 125 – 50 – 25 0 25 50 75 100 125
TA – Free-Air Temperature – °C TA – Free-Air Temperature – °C
Figure 4 Figure 5

6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 TL3016, TL3016Y
ULTRA-FAST LOW-POWER
PRECISION COMPARATORS
SLCS130D – MARCH 1997 – REVISED MARCH 2000

TYPICAL CHARACTERISTICS

PROPAGATION DELAY TIME PROPAGATION DELAY TIME

vs vs

ÎÎÎÎÎ ÎÎÎÎÎ
OVERDRIVE VOLTAGE SUPPLY VOLTAGE

ÎÎÎÎÎ ÎÎÎÎÎ
10 12
VCC = ± 5 V VCC = ± 5 V

ÎÎÎÎÎ ÎÎÎÎÎ
9 TA = 25°C TA = 25°C
10

t pd – Propagation Delay Time – ns

t pd – Propagation Delay Time – ns

7 Falling Edge
8
6 Rising Edge
5 6

4
4
3

2
2
1
0 0
0 10 20 30 40 50 4.4 4.6 4.8 5 5.2 5.4 5.6
Overdrive Voltage – mV VCC – Supply Voltage – V
Figure 6 Figure 7

PROPAGATION DELAY TIME PROPAGATION DELAY TIME

vs vs
INPUT IMPEDANCE LOAD CAPACITANCE

ÎÎÎÎÎ
20
ÎÎÎÎÎ
10

ÎÎÎÎÎ ÎÎÎÎÎ
VCC = ± 5 V VCC = ± 5 V
9 TA = 25°C tPDHL
18 TA = 25°C
t pd – Propagation Delay Time – ns

tPDLH
t pd – Propagation Delay Time – ns

16 8

14 7

12 5 mV 6

10 5

8 4
20 mV

6 3

4 2

2 1

0 0
0 50 100 150 200 250 300 0 10 20 30 40 50
ZO – Input Impedance – Ω CL – Load Capacitance – pF
Figure 8 Figure 9

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7

TL3016, TL3016Y
ULTRA-FAST LOW-POWER
PRECISION COMPARATORS
SLCS130D – MARCH 1997 – REVISED MARCH 2000

TYPICAL CHARACTERISTICS

PROPAGATION DELAY TIME COMMON-MODE INPUT VOLTAGE

vs vs

ÎÎÎÎÎ
FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE

ÎÎÎÎÎ ÎÎÎÎÎÎÎÎ
25 6
VCC = ± 5 V

ÎÎÎÎÎÎÎÎ
VCC = 5 V (Upper Limit)

VIC – Common-Mode Input Voltage – V

VCC = ± 5 V (Upper Limit)
t pd – Propagation Delay Time – ns

4
20

ÎÎÎÎÎÎÎÎ
15

ÎÎÎÎÎÎÎÎ
0 VCC = 5 V (Lower Limit)
10 Rising Edge
–2
Falling Edge

ÎÎÎÎÎÎÎÎ
5
–4

0
– 50 – 25 0 25 50 75 100 125
–6
– 50 – 25 0
ÎÎÎÎÎÎÎÎ
VCC = ± 5 V (Lower Limit)

25 50 75 100 125
TA – Free-Air Temperature – °C TA – Free-Air Temperature – °C
Figure 10 Figure 11

INPUT THRESHOLD VOLTAGE (LATCH ENABLE) OUTPUT VOLTAGE

vs vs
FREE-AIR TEMPERATURE OUTPUT SOURCE CURRENT

ÎÎÎÎ 5
ÎÎÎÎÎ
VIT – Input Threshold Voltage (LATCH ENABLE) – V

ÎÎÎÎÎ
VCC = ± 5 V VCC = ± 5 V
1.8 4.8
TA = 25°C
1.6 4.6
VO – Output Voltage – V

1.4 4.4
TA = 85°C TA = 25°C
1.2 4.2

1 4
TA = – 40°C
0.8 3.8

0.6 3.6

0.4 3.4

0.2 3.2

0 3
–50 –25 0 25 50 75 100 125 150 0 5 10 15 20
TA – Free-Air Temperature – °C IO(source) – Output Source Current – mA
Figure 12 Figure 13

8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 TL3016, TL3016Y
ULTRA-FAST LOW-POWER
PRECISION COMPARATORS
SLCS130D – MARCH 1997 – REVISED MARCH 2000

TYPICAL CHARACTERISTICS

OUTPUT VOLTAGE INPUT CURRENT (LATCH ENABLE)

vs vs

ÎÎÎÎÎ ÎÎÎÎÎ
OUTPUT SINK CURRENT INPUT VOLTAGE

ÎÎÎÎÎ ÎÎÎÎÎ
2 30
VCC = ± 5 V VCC = ± 5 V

ÎÎÎÎÎ ÎÎÎÎÎ
1.8 25 TA = 25°C
TA = 25°C

I I – Input Current (LATCH ENABLE) – µ A

1.6 20
VO – Output Voltage – V

1.4 15

1.2 10

1 TA = 25°C 5
TA = – 40°C
0.8 0

0.6 TA = 85°C –5

0.4 – 10

0.2 – 15
0 – 20
0 5 10 15 20 – 0.5 0 0.5 1 1.5 2
IO(sink) – Output Sink Current – mA VI – Input Voltage – V
Figure 14 Figure 15

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9

 PACKAGE OPTION ADDENDUM

www.ti.com 13-Aug-2021

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

TL3016CD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 3016C

TL3016CDG4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 3016C

TL3016CDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 3016C

TL3016CPW ACTIVE TSSOP PW 8 150 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 T3016

TL3016CPWR ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 T3016

TL3016ID ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 3016I

TL3016IDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 3016I

TL3016IDRG4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 3016I

TL3016IPW ACTIVE TSSOP PW 8 150 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 Z3016

TL3016IPWR ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 Z3016

TL3016IPWRG4 ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 Z3016

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

www.ti.com 13-Aug-2021

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 3-Jun-2022

TAPE AND REEL INFORMATION

REEL DIMENSIONS TAPE DIMENSIONS

K0 P1

B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers

Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Sprocket Holes

Q1 Q2 Q1 Q2

Q3 Q4 Q3 Q4 User Direction of Feed

Pocket Quadrants

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TL3016CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL3016CPWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1
TL3016IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL3016IPWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 3-Jun-2022

TAPE AND REEL BOX DIMENSIONS

Width (mm)
H
W

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TL3016CDR SOIC D 8 2500 350.0 350.0 43.0
TL3016CPWR TSSOP PW 8 2000 356.0 356.0 35.0
TL3016IDR SOIC D 8 2500 350.0 350.0 43.0
TL3016IPWR TSSOP PW 8 2000 367.0 367.0 35.0

Pack Materials-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 3-Jun-2022

TUBE

T - Tube
height L - Tube length

W - Tube
width

B - Alignment groove width

*All dimensions are nominal

Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
TL3016CD D SOIC 8 75 505.46 6.76 3810 4
TL3016CDG4 D SOIC 8 75 505.46 6.76 3810 4
TL3016CPW PW TSSOP 8 150 530 10.2 3600 3.5
TL3016ID D SOIC 8 75 505.46 6.76 3810 4
TL3016IPW PW TSSOP 8 150 530 10.2 3600 3.5

Pack Materials-Page 3
 PACKAGE OUTLINE
D0008A SCALE 2.800
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

SEATING PLANE
.228-.244 TYP
[5.80-6.19]
.004 [0.1] C
A PIN 1 ID AREA
6X .050
[1.27]
8
1

.189-.197 2X
[4.81-5.00] .150
NOTE 3 [3.81]

4X (0 -15 )

4
5
8X .012-.020
B .150-.157 [0.31-0.51]
.069 MAX
[3.81-3.98] .010 [0.25] C A B [1.75]
NOTE 4

.005-.010 TYP
[0.13-0.25]

4X (0 -15 )

SEE DETAIL A
.010
[0.25]

.004-.010
0 -8 [0.11-0.25]
.016-.050
[0.41-1.27] DETAIL A
(.041) TYPICAL
[1.04]

4214825/C 02/2019

NOTES:

1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.

www.ti.com
 EXAMPLE BOARD LAYOUT
D0008A SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

8X (.061 )
[1.55]
SYMM SEE
DETAILS
1
8

8X (.024)
[0.6] SYMM

(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN
SCALE:8X

SOLDER MASK SOLDER MASK

METAL METAL UNDER
OPENING OPENING SOLDER MASK

EXPOSED
METAL EXPOSED
METAL
.0028 MAX .0028 MIN
[0.07] [0.07]
ALL AROUND ALL AROUND

NON SOLDER MASK SOLDER MASK

DEFINED DEFINED

SOLDER MASK DETAILS

4214825/C 02/2019

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

www.ti.com
 EXAMPLE STENCIL DESIGN
D0008A SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

8X (.061 )
[1.55] SYMM

1
8

8X (.024)
[0.6] SYMM

(R.002 ) TYP
5 [0.05]
4
6X (.050 )
[1.27]
(.213)
[5.4]

SOLDER PASTE EXAMPLE

BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X

4214825/C 02/2019

NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.

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 PACKAGE OUTLINE
PW0008A SCALE 2.800
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE

C
6.6 SEATING PLANE
TYP
6.2

A PIN 1 ID 0.1 C
AREA
6X 0.65
8
1

3.1 2X
2.9
NOTE 3 1.95

4
5
0.30
8X
0.19
4.5 1.2 MAX
B 0.1 C A B
4.3
NOTE 4

(0.15) TYP
SEE DETAIL A

0.25
GAGE PLANE

0.75 0.15
0 -8 0.05
0.50

DETAIL A
TYPICAL

4221848/A 02/2015

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-153, variation AA.

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 EXAMPLE BOARD LAYOUT
PW0008A TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE

8X (1.5)
8X (0.45) SYMM
(R0.05)
1 TYP
8

SYMM

6X (0.65)
5
4

(5.8)

LAND PATTERN EXAMPLE

SCALE:10X

SOLDER MASK METAL UNDER SOLDER MASK

METAL OPENING
OPENING SOLDER MASK

0.05 MAX 0.05 MIN

ALL AROUND ALL AROUND

NON SOLDER MASK SOLDER MASK

DEFINED DEFINED

SOLDER MASK DETAILS

NOT TO SCALE

4221848/A 02/2015
NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

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 EXAMPLE STENCIL DESIGN
PW0008A TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE

8X (1.5)
SYMM (R0.05) TYP
8X (0.45)
1
8

SYMM

6X (0.65)
5
4

(5.8)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL
SCALE:10X

4221848/A 02/2015
NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.

www.ti.com
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