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Tda 7491 P

The TDA7491P is a dual BTL class-D audio amplifier providing 10 W + 10 W output power with high efficiency (90%) and a wide supply voltage range (5 V - 18 V). It features selectable gain settings, differential inputs, and built-in protections against short-circuits and thermal overload. Designed for LCD TVs and monitors, it allows filterless operation, reducing external components, and is compatible with other models like TDA7491LP and TDA7491HV.

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0% found this document useful (0 votes)
49 views42 pages

Tda 7491 P

The TDA7491P is a dual BTL class-D audio amplifier providing 10 W + 10 W output power with high efficiency (90%) and a wide supply voltage range (5 V - 18 V). It features selectable gain settings, differential inputs, and built-in protections against short-circuits and thermal overload. Designed for LCD TVs and monitors, it allows filterless operation, reducing external components, and is compatible with other models like TDA7491LP and TDA7491HV.

Uploaded by

Mobile Service
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 42

TDA7491P

2 x 10-watt dual BTL class-D audio amplifier

Features
■ 10 W + 10 W continuous output power:
RL = 6 Ω, THD = 10% at VCC = 11 V
■ 9.5 W + 9.5 W continuous output power:
RL = 8 Ω, THD = 10% at VCC = 12 V
■ Wide range single supply operation (5 V - 18 V)
■ High efficiency (η = 90%)
PowerSSO-36 with
■ Four selectable, fixed gain settings of
exposed pad down
nominally 20 dB, 26 dB, 30 dB and 32 dB
■ Differential inputs minimize common-mode
noise
Description
■ Filterless operation
■ No ‘pop’ at turn-on/off The TDA7491P is a dual BTL class-D audio
amplifier with single power supply designed for
■ Standby and mute features LCD TVs and monitors.
■ Short-circuit protection
Thanks to the high efficiency and
■ Thermal overload protection exposed-pad-down (EPD) package no separate
■ Externally synchronizable heatsink is required.
Furthermore, the filterless operation allows a
reduction in the external component count.
The TDA7491P is pin-to-pin compatible with the
TDA7491LP and TDA7491HV.

Table 1. Device summary


Order code Operating temperature Package Packaging

TDA7491P -40 to 85 °C PowerSSO-36 EPD Tube


TDA7491P13TR -40 to 85 °C PowerSSO-36 EPD Tape and reel

January 2012 Doc ID 13540 Rev 6 1/42


www.st.com 42
Contents TDA7491P

Contents

1 Device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 Pin out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Pin list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

3 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.3 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4 Characterization curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.1 With 4-Ω load at VCC = 10 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.2 With 6-Ω load at VCC = 11 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.3 With 8-Ω load at VCC = 12 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

5 Applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.1 Applications circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.2 Mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.3 Gain setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.4 Input resistance and capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.5 Internal and external clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.5.1 Master mode (internal clock) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.5.2 Slave mode (external clock) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.6 Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
5.6.1 Reconstruction low-pass filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5.6.2 Filterless modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5.7 Protection functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.8 Diagnostic output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.9 Heatsink requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
5.10 Test board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

6 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

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TDA7491P Contents

7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Doc ID 13540 Rev 6 3/42


List of tables TDA7491P

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1


Table 2. Pin description list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 5. Electrical specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 6. Mode settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 7. Gain settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 8. How to set up SYNCLK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 9. PowerSSO-36 EPD dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Table 10. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

4/42 Doc ID 13540 Rev 6


TDA7491P List of figures

List of figures

Figure 1. Internal block diagram (one channel only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7


Figure 2. Pin connection (top view, PCB view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 3. Output power vs. supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 4. THD vs. output power (1 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 5. THD vs. output power (100 Hz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 6. THD vs. output power (15 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 7. THD vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 8. Frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 9. Crosstalk vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. FFT (0 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 11. FFT (-60 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 12. Power supply rejection ratio vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 13. Power dissipation and efficiency vs. output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 14. Attenuation vs. voltage on pin MUTE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 15. Current consumption vs. voltage on pin STBY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 16. Attenuation vs. voltage on pin STBY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 17. Output power vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 18. THD vs. output power (1 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 19. THD vs. output power (100 Hz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 20. THD vs. output power (15 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 21. THD vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 22. Frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 23. Crosstalk vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 24. FFT (0 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 25. FFT (-60 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 26. Power supply rejection ratio vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 27. Power dissipation and efficiency vs. output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 28. Output power vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 29. THD vs. output power (1 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 30. THD vs. output power (100 Hz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 31. THD vs. output power (15 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 32. THD vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 33. Frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 34. Crosstalk vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 35. FFT (0 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 36. FFT (-60 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 37. Power supply rejection ratio vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 38. Power dissipation and efficiency vs. output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 39. Applications circuit for class-D amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 40. Standby and mute circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 41. Turn-on/off sequence for minimizing speaker “pop” . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 42. Device input circuit and frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 43. Master and slave connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 44. Unipolar PWM output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 45. Typical LC filter for an 8-Ω speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 46. Typical LC filter for a 4-Ω speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 47. Filterless application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 48. Behavior of pin DIAG for various protection conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Doc ID 13540 Rev 6 5/42


List of figures TDA7491P

Figure 49. Power derating curves for PCB used as heatsink . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37


Figure 50. Test board (TDA7491P) layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 51. PowerSSO-36 EPD outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

6/42 Doc ID 13540 Rev 6


TDA7491P Device block diagram

1 Device block diagram

Figure 1 shows the block diagram of one of the two identical channels of the TDA7491P.

Figure 1. Internal block diagram (one channel only)

Doc ID 13540 Rev 6 7/42


Pin description TDA7491P

2 Pin description

2.1 Pin out


Figure 2. Pin connection (top view, PCB view)

SUB_GND 1 36 VSS

OUTPB 2 35 SVCC

OUTPB 3 34 VREF

PGNDB 4 33 INNB

PGNDB 5 32 INPB

PVCCB 6 31 GAIN1

PVCCB 7 30 GAIN0

OUTNB 8 29 SVR

OUTNB 9 28 DIAG

OUTNA 10 27 SGND

OUTNA 11 26 VDDS

PVCCA 12 25 SYNCLK

PVCCA 13 24 ROSC

PGNDA 14 EP 23 INNA
exposed pad down
PGNDA 15 Connect to ground 22 INPA

OUTPA 16 21 MUTE

OUTPA 17 20 STBY

PGND 18 19 VDDPW

8/42 Doc ID 13540 Rev 6


TDA7491P Pin description

2.2 Pin list


Table 2. Pin description list
Number Name Type Description

1 SUB_GND POWER Connect to the frame


2,3 OUTPB OUT Positive PWM output for right channel
4,5 PGNDB POWER Power stage ground for right channel
6,7 PVCCB POWER Power supply for right channel
8,9 OUTNB OUT Negative PWM output for right channel
10,11 OUTNA OUT Negative PWM output for left channel
12,13 PVCCA POWER Power supply for left channel
14,15 PGNDA POWER Power stage ground for left channel
16,17 OUTPA OUT Positive PWM output for left channel
18 PGND POWER Power stage ground
3.3-V (nominal) regulator output referred to ground for power
19 VDDPW OUT
stage
20 STBY INPUT Standby mode control
21 MUTE INPUT Mute mode control
22 INPA INPUT Positive differential input of left channel
23 INNA INPUT Negative differential input of left channel
24 ROSC OUT Master oscillator frequency-setting pin
25 SYNCLCK IN/OUT Clock in/out for external oscillator
3.3-V (nominal) regulator output referred to ground for signal
26 VDDS OUT
blocks
27 SGND POWER Signal ground
28 DIAG OUT Open-drain diagnostic output
29 SVR OUT Supply voltage rejection
30 GAIN0 INPUT Gain setting input 1
31 GAIN1 INPUT Gain setting input 2
32 INPB INPUT Positive differential input of right channel
33 INNB INPUT Negative differential input of right channel
34 VREF OUT Half VDDS (nominal) referred to ground
35 SVCC POWER Signal power supply
36 VSS OUT 3.3-V (nominal) regulator output referred to power supply
Exposed pad for ground-plane heatsink, to be connected to
- EP -
GND

Doc ID 13540 Rev 6 9/42


Electrical specifications TDA7491P

3 Electrical specifications

3.1 Absolute maximum ratings


Table 3. Absolute maximum ratings
Symbol Parameter Value Unit

VCC DC supply voltage 20 V


Voltage limits for input pins STBY, MUTE, INNA, INPA,
VI -0.3 to 3.6 V
INNB, INPB, GAIN0, GAIN1
Top Operating temperature -40 to 85 °C
Tj Operating junction temperature -40 to 150 °C
Tstg Storage temperature -40 to 150 °C

3.2 Thermal data


Refer also to Section 5.9: Heatsink requirements on page 37.

Table 4. Thermal data


Symbol Parameter Min Typ Max Unit

Rth j-case Thermal resistance, junction to case - 2 3


°C/W
Rth j-amb Thermal resistance, junction to ambient - 24 -

10/42 Doc ID 13540 Rev 6


TDA7491P Electrical specifications

3.3 Electrical specifications


Unless otherwise stated, the results in Table 5 below are given for the conditions:
VCC = 11 V, RL (load) = 6 Ω, ROSC = R3 = 39 kΩ, C8 = 100 nF, f = 1 kHz, GV = 20 dB, and
Tamb = 25 °C.

Table 5. Electrical specifications


Symbol Parameter Condition Min Typ Max Unit

VCC Supply voltage - 5 - 18 V


Iq Total quiescent current Without LC filter - 26 35 mA
IqSTBY Quiescent current in standby - - - 10 µA
Play mode -100 - 100 mV
VOS Output offset voltage
Mute mode -60 - 60 mV
IOCP Overcurrent protection threshold RL = 0 Ω 3 - - A
Junction temperature at thermal
Tj - - 150 - °C
shutdown
Ri Input resistance Differential input 54 68 - kΩ
Undervoltage protection
VUVP - - - 4.5 V
threshold
High side - 0.2 -
RdsON Power transistor on resistance Ω
Low side - 0.2 -
THD = 10% - 10 -
Po Output power W
THD = 1% - 8.0 -
RL = 8 Ω, THD = 10%,
- 9.5 -
VCC = 12 V
Po Output power W
RL = 8 Ω, THD = 1%,
- 7.2 -
VCC = 12 V
Po = 10 W + 10 W,
PD Dissipated power - 2.0 - W
THD = 10%
Po = 10 W + 10 W,
η Efficiency RL = 8 Ω, THD = 10%, - 90 - %
VCC = 12 V
THD Total harmonic distortion Po = 1 W - 0.1 - %
GAIN0 = L, GAIN1 = L 18 20 22
GAIN0 = L, GAIN1 = H 24 26 28
GV Closed loop gain dB
GAIN0 = H, GAIN1 = L 28 30 32
GAIN0 = H, GAIN1 = H 30 32 34
ΔGV Gain matching - -1 - 1 dB
CT Crosstalk f = 1 kHz, Po = 1 W - 70 - dB
A Curve, GV = 20 dB - 15 -
eN Total input noise µV
f = 22 Hz to 22 kHz - 20 -

Doc ID 13540 Rev 6 11/42


Electrical specifications TDA7491P

Table 5. Electrical specifications (continued)


Symbol Parameter Condition Min Typ Max Unit

fr = 100 Hz, Vr = 1 Vpp,


SVRR Supply voltage rejection ratio - 50 - dB
CSVR = 10 µF
Tr, Tf Rise and fall times - - 40 - ns
Internal oscillator,
fSW Switching frequency 290 320 350 kHz
master mode
(1)
fSWR Switching frequency range 250 - 400 kHz
VinH Digital input high (H) 2.3 - -
- V
VinL Digital input low (L) - - 0.8
VMUTE = low,
AMUTE Mute attenuation - 80 - dB
VSTBY = high
VSTBY < 0.5 V
Standby -
VMUTE = X

Function VSTBY > 2.9 V


Standby, mute and play modes Mute -
mode VMUTE < 0.8 V
VSTBY > 2.9 V
Play -
VMUTE > 2.9 V
1. Refer to Section 5.5: Internal and external clocks on page 32.

12/42 Doc ID 13540 Rev 6


TDA7491P Characterization curves

4 Characterization curves

The following characterization curves were made using the TDA7491P demo board. The
LC filter for the 4-Ω load uses components of 15 µH and 470 nF, whilst that for the 6-Ω load
uses 22 µH and 220 nF and that for the 8-Ω load uses 33 µH and 220 nF.

4.1 With 4-Ω load at VCC = 10 V


Figure 3. Output power vs. supply voltage
Output Power (W)
Test Condition : 12
Vcc = 5~10V, 11
RL = 4 ohm, 10
Rosc = 39kΩ, 9

Cosc =100nF, 8
7
f =1kHz,
6
Gv = 30dB,
5
Tamb = 25℃
4
Specification Limit: 3
Typical: 2
1
Po = 10W @THD =10%
0
Po =8W @THD =1%
5 6 7 8 9 10
Supply Voltage (V)

Figure 4. THD vs. output power (1 kHz)


THD (%)

Test Conditions:

Vcc = 10V
Rl = 4 ohm
Rosc = 39k ohm
Cosc = 100nF
f = 1kHz
Gv = 20 dB
Tamb. = 25 ˚C

Specification limits:
Typical:
Po = 12W, THD = 10%

Output Power (W)

Doc ID 13540 Rev 6 13/42


Characterization curves TDA7491P

Figure 5. THD vs. output power (100 Hz)


THD (%)

Test Conditions:

Vcc = 10V
Rl = 4 ohm
Rosc = 39k ohm
Cosc = 100nF
f = 100Hz
Gv = 20 dB
Tamb. = 25 ˚C

Specification limits:
Typical:
Po = 12W, THD = 10%

Output Power (W)

Figure 6. THD vs. output power (15 kHz)


THD (%)

Test Conditions:

Vcc = 10V
Rl = 4 ohm
Rosc = 39k ohm
Cosc = 100nF
f = 15kHz
Gv = 20 dB
Tamb. = 25 ˚C

Specification limits:
Typical:
Po = 12W, THD = 2%

Output Power (W)

14/42 Doc ID 13540 Rev 6


TDA7491P Characterization curves

Figure 7. THD vs. frequency


THD (%)
1

Test Condition:
0.5
Vcc=10V,
RL=4 ohm,
Rosc=39kΩ, Cosc=100nF, 0.2

f = 1kHz,
0.1
Gv=30dB,
Po=1W 0.05

Tamb=25℃

0.02

Specification Limit: 0.01

Typical: THD <0.5%


0.005
20 50 100 200 500 1k 2k 5k 10k 20k

Frequency (Hz)

Figure 8. Frequency response


Ampl (dB)
+2

Test Condition:
Vcc =10V, +1

RL= 4 ohm,
-0
Rosc=39kΩ, Cosc=100nF,
f = 1kHz,
-1
Gv = 30dB,
Po =1W
-2
Tamb = 25℃
-3
Specification Limit:
Max: +/-3dB -4

@20Hz to 20kHz
-5
10 20 50 100 200 500 1k 2k 5k 10k 30k

Frequency (Hz)

Figure 9. Crosstalk vs. frequency


Crosstalk (dB)

Test Conditions:

Vcc = 10V
Rl = 4 ohm
Rosc = 39k ohm
Cosc = 100nF
Po = 1W
Gv = 20 dB
Tamb. = 25 ˚C

Specification limits:
Typical:
Crosstalk < -73 dB

Frequency (Hz)

Doc ID 13540 Rev 6 15/42


Characterization curves TDA7491P

Figure 10. FFT (0 dB)


FFT (dB)
+10
+0
Test Condition:
-10
Vcc =10V, -20

RL= 4 ohm, -30

Rosc = 39kΩ, Cosc =100nF, -40

-50
f =1kHz,
-60
Gv = 30dB, -70

Po = 1W -80

-90
Tamb = 25℃
-100

-110
Specification Limit: -120

Typical: >60dB -130

-140
for the harmonic frequency
-150
20 50 100 200 500 1k 2k 5k 10k 20k

Frequency (Hz)

Figure 11. FFT (-60 dB)

FFT (dB)
+0

-10
Test Condition:
-20
Vcc =10V,
-30
RL= 4 ohm, -40

Rosc = 39kΩ, Cosc = 100nF, -50

f = 1kHz, -60

-70
Gv=30dB,
-80
Po= -60dB (@ 1W =0dB)
-90
Tamb=25℃ -100

-110

Specification Limit: -120

-130
Typical: > 90dB
-140
for the harmonic frequency
-150
20 50 100 200 500 1k 2k 5k 10k 20k
Frequency (Hz)

Figure 12. Power supply rejection ratio vs. frequency


+0

-10
Test Condition:
-20
Vcc =10V,
RL= 4 ohm, -30 Ripple frequency=100Hz
Rosc = 39kΩ, Cosc = 100nF,
-40 Ripple voltage=500mV
Vin=0, d
B
Gv=30dB, r -50

0dB refers to 500mV, 100Hz, A


-60
Tamb=25℃
-70

-80

-90

-100
20 50 100 200 500 1k 2k 5k 10k 20k
Hz
4 ohm 10 v PSRR.at27

16/42 Doc ID 13540 Rev 6


TDA7491P Characterization curves

Figure 13. Power dissipation and efficiency vs. output power

Power di ssi pat i on & Ef f i ci ency vs Out put power

Test Condition: 90 5

Vcc =10V, 80 4. 5

RL= 4 ohm, 4
70

Power di ssi pat i on ( W)


Rosc = 39kΩ, Cosc = 100nF, 3. 5
60

Ef f i ci ency ( %)
f = 1kHz,
3
Gv=30dB, 50
2. 5
Tamb=25℃ 40 Vcc=10V
Rload=4ohm 2
30 Gain=30dB 1. 5
20 f=1kHz
1
10 0. 5

0 0
0 2 4 6 8 10 12
Out put power per channel ( W)

Figure 14. Attenuation vs. voltage on pin MUTE

10
Test Condition:
0
Vcc =10V,
RL= 4 ohm, -10

Rosc = 39kΩ, Cosc = 100nF, -20


Vcc=10V
Attenuation (dB)

0dB@f=1kHz,Po=1w, -30 Rload=4ohm


Gv=30dB, -40 Gain=30dB
Tamb=25℃ 0dB@f=1kHz, Po=1w
-50

-60
-70

-80
-90
0 1 2 3 4
Mute voltage (V)

Figure 15. Current consumption vs. voltage on pin STBY

40
Test Condition:
Vcc =10V, 35

RL= 4 ohm, 30
Iquiescent (mA)

Rosc = 39kΩ, Cosc = 100nF, Vcc=10V


25 Rload=4ohm
Vin=0,
20 Gain=30dB
Gv=30dB,
Vin=0
Tamb=25℃ 15

10

0
0 0.5 1 1.5 2 2.5 3 3.5
Standby voltage (V)

Doc ID 13540 Rev 6 17/42


Characterization curves TDA7491P

Figure 16. Attenuation vs. voltage on pin STBY

Test Condition:
Vcc =10V,
0
RL= 4 ohm,
Rosc = 39kΩ, Cosc = 100nF, -20
Vcc=10V
0dB@f=1kHz,Po=1w,

Attenuation (dB)
-40 Rload=4ohm
Gv=30dB, Gain=30dB
Tamb=25℃ -60 0dB@f=1kHz, Po=1w

-80

-100

-120
0 0.5 1 1.5 2 2.5 3 3.5
Standby voltage (V)

4.2 With 6-Ω load at VCC = 11 V


Figure 17. Output power vs. supply voltage

Test Condition :
Vcc = 5~11V, 12
RL = 6 ohm, 11
Rosc = 39kO, Cosc = 100nF, 10
9
Output Power (W)

f =1kHz, THD =10%


Gv = 30dB, 8
Tamb = 25℃ 7
6
Rl =6 ohm
5 f =1kHz THD =1%
4
Specification Limit: 3
Typical: 2
Vs =11V,Rl =6 ohm 1
Po =10W @THD=10% 0
Po =8W @THD=1% 5 6 7 8 9 10 11
Supply Voltage (V)

18/42 Doc ID 13540 Rev 6


TDA7491P Characterization curves

Figure 18. THD vs. output power (1 kHz)


THD (%)

Test Conditions:

Vcc = 11V
Rl = 6 ohm
Rosc = 39k ohm
Cosc = 100nF
f = 1kHz
Gv = 20 dB
Tamb. = 25 ˚C

Specification limits:
Typical:
Po = 10W, THD = 10%

Output Power (W)

Figure 19. THD vs. output power (100 Hz)


THD (%)

Test Conditions:

Vcc = 11V
Rl = 6 ohm
Rosc = 39k ohm
Cosc = 100nF
f = 100Hz
Gv = 20 dB
Tamb. = 25 ˚C

Specification limits:
Typical:
Po = 10W, THD = 10%

Output Power (W)

Doc ID 13540 Rev 6 19/42


Characterization curves TDA7491P

Figure 20. THD vs. output power (15 kHz)


THD (%)

Test Conditions:

Vcc = 11V
Rl = 6 ohm
Rosc = 39k ohm
Cosc = 100nF
f = 15kHz
Gv = 20 dB
Tamb. = 25 ˚C

Specification limits:
Typical:
Po = 10W, THD = 1%

Output Power (W)

Figure 21. THD vs. frequency


THD(%)

Test Conditions:

Vcc = 11V
Rl = 6 ohm
Rosc = 39k ohm
Cosc = 100nF
Po = 1W
Gv = 20 dB
Tamb. = 25 ˚C

Specification limits:
Typical:
THD <2%

Frequency(Hz)

20/42 Doc ID 13540 Rev 6


TDA7491P Characterization curves

Figure 22. Frequency response


Amplitude(dB)

Test Conditions:

Vcc = 11V
Rl = 6 ohm
Rosc = 39k ohm
Cosc = 100nF
Po = 1W
Gv = 20 dB
Tamb. = 25 ˚C

Specification limits:
Typical:
Max: +/- 3 dB @20 -
20kHz

Frequency(Hz)

Figure 23. Crosstalk vs. frequency


Crosstalk (dB)

Test Conditions:

Vcc = 11V
Rl = 6 ohm
Rosc = 39k ohm
Cosc = 100nF
Po = 1W
Gv = 20 dB
Tamb. = 25 ˚C

Specification limits:
Typical:
Crosstalk < - 85 dB

Frequency (Hz)

Doc ID 13540 Rev 6 21/42


Characterization curves TDA7491P

Figure 24. FFT (0 dB)


FFT (dB)

Test Conditions:

Vcc = 11V
Rl = 6 ohm
Rosc = 39k ohm
Cosc = 100nF
Ref. Po = 1W
Gv = 20 dB
Tamb. = 25 ˚C

Specification limits:
Typical:
Harmonics < - 50 dB

Frequency (Hz)

Figure 25. FFT (-60 dB)


FFT (dB)

Test Conditions:

Vcc = 11V
Rl = 6 ohm
Rosc = 39k ohm
Cosc = 100nF
Ref. Po = 1W
Gv = 20 dB
Tamb. = 25 ˚C

Specification limits:
Typical:
Harmonics < - 90 dB

Frequency (Hz)

22/42 Doc ID 13540 Rev 6


TDA7491P Characterization curves

Figure 26. Power supply rejection ratio vs. frequency


+0

-10
Test Condition:
Vcc =11V, -20

RL= 6 ohm, Ripple frequency=100Hz


-30
Rosc =39kΩ, Cosc =100nF,
Ripple voltage=500mV
Vin=0, -40
d
Gv =30dB, B
r -50
0dB refers to 500mV, 100Hz,
A
-60
Tamb =25℃

-70

-80

-90

-100
20 50 100 200 500 1k 2k 5k 10k 20k
Hz
6ohm 11v PSRR.at27

Figure 27. Power dissipation and efficiency vs. output power

Test Condition: 100 3


Vcc =11V, 90
RL= 6 ohm, 2.5
80
Rosc =39kΩ, Cosc =100nF,

Power dissipation (W)


70
2
F=1kHz,
Efficiency (%)

60
Gv =30dB,
50 1.5
Tamb =25℃ Vcc=11V
40 Rload=6ohm
1
30 Gain=30dB

20 f=1kHz
0.5
10
0 0
0 2 4 6 8 10 12
Output power per channel (W)

Doc ID 13540 Rev 6 23/42


Characterization curves TDA7491P

4.3 With 8-Ω load at VCC = 12 V


Figure 28. Output power vs. supply voltage

Test Condition :
Vcc = 5~12V, 10
RL = 8 ohm, 9
Rosc =39kO, Cosc =100nF, 8 THD =10%

Output Power (W)


f =1kHz, 7
Gv =30dB, 6
Tamb =25℃ Rl =8 ohm
5 f =1kHz
THD =1%
4
Specification Limit: 3
Typical: 2
Vs =12V,Rl = 8 ohm 1
Po =9.5W @THD =10% 0
Po =7.2W @THD =1% 5 6 7 8 9 10 11 12
Supply Voltage (V)

Figure 29. THD vs. output power (1 kHz)


THD (%)

Test Conditions:

Vcc = 12V
Rl = 8 ohm
Rosc = 39k ohm
Cosc = 100nF
f = 1kHz
Gv = 20 dB
Tamb. = 25 ˚C

Specification limits:
Typical:
Po = 9.5W
@THD =10%

Output Power (W)

24/42 Doc ID 13540 Rev 6


TDA7491P Characterization curves

Figure 30. THD vs. output power (100 Hz)


THD (%)

Test Conditions:

Vcc = 12V
Rl = 8 ohm
Rosc = 39k ohm
Cosc = 100nF
f = 100Hz
Gv = 20 dB
Tamb. = 25 ˚C

Specification limits:
Typical:
Po = 9.5W
@THD =10%

Output Power (W)

Figure 31. THD vs. output power (15 kHz)

THD (%)

Test Conditions:

Vcc = 12V
Rl = 8 ohm
Rosc = 39k ohm
Cosc = 100nF
f = 15kHz
Gv = 20 dB
Tamb. = 25 ˚C

Specification limits:
Typical:
Po = 9.5W
@THD =1%

Output Power (W)

Doc ID 13540 Rev 6 25/42


Characterization curves TDA7491P

Figure 32. THD vs. frequency


THD (%)
1

Test Condition:
0.5
Vcc =12V,
RL= 8 ohm,
Rosc =39kΩ, Cosc =100nF, 0.2

f =1kHz,
0.1
Gv =30dB,
Po =1W 0.05

Tamb =25℃

0.02

Specification Limit: 0.01

Typical: THD<0.5%
0.005
20 50 100 200 500 1k 2k 5k 10k 20k

Frequency (Hz)

Figure 33. Frequency response


Amplitude (dB)

Test Conditions:

Vcc = 12V
Rl = 8 ohm
Rosc = 39k ohm
Cosc = 100nF
Po = 1W
Gv = 20 dB
Tamb. = 25 ˚C

Specification limits:
Typical:
Max: +/- 3 dB
@20—20kHz

Frequency (Hz)

26/42 Doc ID 13540 Rev 6


TDA7491P Characterization curves

Figure 34. Crosstalk vs. frequency


Crosstalk (dB)
Test Conditions:

Vcc = 12V
Rl = 8 ohm
Rosc = 39k ohm
Cosc = 100nF
Po = 1W
Gv = 20 dB
Tamb. = 25 ˚C

Specification limits:
Typical:
Crosstalk < -83 dB

Frequency (Hz)

Figure 35. FFT (0 dB)


FFT (dB)
+10
+0
Test Condition:
-10
Vcc =12V, -20

RL= 8 ohm, -30


-40
Rosc =39kΩ, Cosc =100nF,
-50
f = 1kHz, -60
Gv =30dB, -70

Po =1W -80
-90
Tamb =25℃
-100
-110
Specification Limit: -120

Typical: >60dB -130


-140
for the harmonic frequency
-150
20 50 100 200 500 1k 2k 5k 10k 20k

Frequency (Hz)

Doc ID 13540 Rev 6 27/42


Characterization curves TDA7491P

Figure 36. FFT (-60 dB)


FFT (dB)
+0

-10
Test Condition:
-20
Vcc =12V,
-30
RL= 8 ohm, -40

Rosc =39kΩ, Cosc =100nF, -50

f =1kHz, -60

-70
Gv =30dB,
-80
Po = -60dB (@ 1W =0dB)
-90
Tamb =25℃ -100

-110

Specification Limit: -120

Typical: > 90dB -130

-140
for the harmonic frequency
-150
20 50 100 200 500 1k 2k 5k 10k 20k

Frequency (Hz)

Figure 37. Power supply rejection ratio vs. frequency


+0

-10

Test Condition:
-20
Vcc =12V,
RL= 8 ohm, -30
Ripple frequency=100Hz
Rosc =39kΩ, Cosc =100nF,
-40 Ripple voltage=500mV
f =1kHz, d
B
Gv =30dB, r -50

0dB refers to 500mV, 100Hz, A


-60
Tamb =25℃
-70

-80

-90

-100
20 50 100 200 500 1k 2k 5k 10k 20k
Hz
8ohm 12v PSRR.at27

Figure 38. Power dissipation and efficiency vs. output power

Test Condition:
100 2.5
Vcc =12V,
90
RL= 8 ohm,
80 2
Rosc =39kΩ, Cosc =100nF,
Dissipation Power (W)

70
f =1kHz,
Efficiency (%)

60 1.5
Gv =30dB,
Tamb =25℃ 50
Vcc=12V
40 Rload=8ohm
1
30 Gain=30dB
f=1kHz
20 0.5
10
0 0
0 2 4 6 8 10
Output power per channel (W)

28/42 Doc ID 13540 Rev 6


TDA7491P Applications information

5 Applications information

5.1 Applications circuit


Figure 39. Applications circuit for class-D amplifier
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Doc ID 13540 Rev 6 29/42


Applications information TDA7491P

5.2 Mode selection


The three operating modes, defined below, of the TDA7491P are set by the two inputs STBY
(pin 20) and MUTE (pin 21) as shown in Table 6.
● Standby mode: all circuits are turned off, very low current consumption.
● Mute mode: inputs are connected to ground and the positive and negative PWM
outputs are at 50% duty cycle.
● Play mode: the amplifiers are active.
The protection functions of the TDA7491P are implemented by pulling down the voltages of
the STBY and MUTE inputs shown in Figure 40. The input current of the corresponding pins
must be limited to 200 µA.

Table 6. Mode settings


Mode Voltage level on pin STBY Voltage level on pin MUTE

Standby L (1) X (don’t care)


(1)
Mute H L
Play H H
1. Refer to VSTBY and VMUTE in Table 5: Electrical specifications on page 11 for the drive levels for L and H

Figure 40. Standby and mute circuits

Standby STBY
3.3 V R2 C7
0V 30 kΩ 2.2 µF TDA7491P
Mute MUTE
3.3 V R4 C15
0V 30 kΩ 2.2 µF

Figure 41. Turn-on/off sequence for minimizing speaker “pop”

30/42 Doc ID 13540 Rev 6


TDA7491P Applications information

5.3 Gain setting


The gain of the TDA7491P is set by the two inputs, GAIN0 (pin 30) and GAIN1 (pin 31).
Internally, the gain is set by changing the feedback resistors of the amplifier.

Table 7. Gain settings


Voltage level on pin GAIN0 Voltage level on pin GAIN1 Nominal gain, Gv (dB)

L(1) L(1) 20
L H 26
H L 30
H H 32
1. Refer to VinL and VinH in Table 5: Electrical specifications on page 11 for the drive levels for L and H

5.4 Input resistance and capacitance


The input impedance is set by an internal resistor Ri = 68 kΩ (typical). An input capacitor
(Ci) is required to couple the AC input signal.
The equivalent circuit and frequency response of the input components are shown in
Figure 42. For Ci = 220 nF the high-pass filter cut-off frequency is below 20 Hz:

fc = 1 / (2 * π * Ri * Ci)

Figure 42. Device input circuit and frequency response

Rf

Input
signal Input Ri
Ci
pin

Doc ID 13540 Rev 6 31/42


Applications information TDA7491P

5.5 Internal and external clocks


The clock of the class-D amplifier can be generated internally or can be driven by an
external source.
If two or more class-D amplifiers are used in the same system, it is recommended that all
devices operate at the same clock frequency. This can be implemented by using one
TDA7491P as master clock, while the other devices are in slave mode, that is, externally
clocked. The clock interconnect is via pin SYNCLK of each device. As explained below,
SYNCLK is an output in master mode and an input in slave mode.

5.5.1 Master mode (internal clock)


Using the internal oscillator, the output switching frequency, fSW, is controlled by the
resistor, ROSC, connected to pin ROSC:

fSW = 106 / ((16 * ROSC + 182) * 4) kHz


where ROSC is in kΩ.
In master mode, pin SYNCLK is used as a clock output pin, whose frequency is:

fSYNCLK = 2 * fSW
For master mode to operate correctly then resistor ROSC must be less than 60 kΩ as given
below in Table 8.

5.5.2 Slave mode (external clock)


In order to accept an external clock input, pin ROSC must be left open, that is, floating. This
forces pin SYNCLK to be internally configured as an input as given in Table 8.
The output switching frequency of the slave devices is:
fSW = fSYNCLK / 2

Table 8. How to set up SYNCLK


Mode ROSC SYNCLK

Master ROSC < 60 kΩ Output


Slave Floating (not connected) Input

Figure 43. Master and slave connection


Master Slave
TDA7491P TDA7491P

ROSC SYNCLK SYNCLK ROSC

Output Input

Cosc Rosc
100 nF 39 kΩ

32/42 Doc ID 13540 Rev 6


TDA7491P Applications information

5.6 Modulation
The output modulation scheme of the BTL is called unipolar pulse width modulation (PWM).
The differential output voltages change between 0 V and +VCC and between 0 V and -VCC.
This is in contrast to the traditional bipolar PWM outputs which change between +VCC
and -VCC.
An advantage of this scheme is that it effectively doubles the switching frequency of the
differential output waveform on the load then reducing the current ripple accordingly. The
OUTP and OUTN are in the same phase almost overlapped when the input is zero under
this condition, then the switching current is low and the related losses in the load are low. In
practice, a short delay is introduced between these two outputs in order to avoid the BTL
outputs switching simultaneously when the input is zero.
Figure 44 shows the resulting differential output voltage and current when a positive, zero
and negative input signal is applied. The resulting differential voltage on the load has a
double frequency with respect to outputs OUTP and OUTN then resulting in reduced current
ripple.

Figure 44. Unipolar PWM output

INP
INN

OUTP

OUTN

Differential
OUT

Doc ID 13540 Rev 6 33/42


Applications information TDA7491P

5.6.1 Reconstruction low-pass filter


Standard applications use a low-pass filter before the speaker. The cut-off frequency should
be higher than 22 kHz and much lower than the output switching frequency. It is necessary
to choose the L-C component values depending on the loud speaker impedance. Some
typical values, which give a cut-off frequency of 27 kHz, are shown in Figure 45 and
Figure 46 below.

Figure 45. Typical LC filter for an 8-Ω speaker

Figure 46. Typical LC filter for a 4-Ω speaker

5.6.2 Filterless modulation


TDA7491P can be used without a filter at the IC outputs, because the frequency of the
TDA7491P output is beyond the audio frequency, the audio signal can be recovered by the
inherent inductance of the speaker and natural filter of the human ear.
The reconstruction of the audio signal on the load is usually achieved using a complete LC
filter (such as a Butterworth) solution that guarantees good audio performance, high
efficiency and EMI suppression. The LC component values should be computed by
considering the target audio band and the PWM switching frequency. The cut-off frequency
must lie well below the switching frequency and above the upper audio frequency. In
particular, the following schematic gives a guideline for a cut-off frequency of about 30 kHz
for both 6- and 8-Ω speakers.
Thanks to its advanced modulation approach, aimed to improve both driving efficiency and
radiating emissions, the device is even able to drive a load with a very low component count.
With this cost-saving filtering scheme the TDA7491P complies with the EMI specifications
FCC class B. Figure 47 on page 35 shows the simplified schematic adopted for the test and
the relevant emission curve at full output power.

34/42 Doc ID 13540 Rev 6


TDA7491P Applications information

Emission tests have been performed with a 1-m length of twisted speaker wire with ferrite
beads. Changing the type of the ferrite bead requires care due to factors such as its
effectiveness in the EMC frequency range and impedance stability over the rated current
range. An output snubber network further improves the emissions and this should be tuned
according to the actual PCB, layout and component characteristics.

Figure 47. Filterless application schematic

AM045140v1

Doc ID 13540 Rev 6 35/42


Applications information TDA7491P

5.7 Protection functions


The TDA7491P is fully protected against undervoltages, overcurrents and thermal overloads
as explained here.

Undervoltage protection (UVP)


If the supply voltage drops below the value of VUVP given in Table 5: Electrical specifications
on page 11 the undervoltage protection is activated which forces the outputs to the
high-impedance state. When the supply voltage recovers the device restarts.

Overcurrent protection (OCP)


If the output current exceeds the value of IOCP given in Table 5: Electrical specifications on
page 11 the overcurrent protection is activated which forces the outputs to the
high-impedance state. Periodically, the device attempts to restart. If the overcurrent
condition is still present then the OCP remains active. The restart time, TOC, is determined
by the R-C components connected to pin STBY.

Thermal protection (OTP)


If the junction temperature, Tj, reaches 145 °C (nominal), the device goes to mute mode and
the positive and negative PWM outputs are forced to 50% duty cycle. If the junction
temperature reaches the value for Tj given in Table 5: Electrical specifications on page 11
the device shuts down and the output is forced to the high impedance state. When the
device cools sufficiently the device restarts.

5.8 Diagnostic output


The output pin DIAG is an open drain transistor. When the protection is activated it is in the
high-impedance state. The pin can be connected to a power supply (<18 V) by a pull-up
resistor whose value is limited by the maximum sinking current (200 µA) of the pin.

Figure 48. Behavior of pin DIAG for various protection conditions


VDD

TDA7491P
R1

DIAG

Protection logic

VDD
Restart Restart

Overcurrent UV, OT
protection protection

36/42 Doc ID 13540 Rev 6


TDA7491P Applications information

5.9 Heatsink requirements


Due to the high efficiency of the class-D amplifier a 2-layer PCB can easily provide the
heatsinking capability for low to medium power outputs.
Using such a PCB with a copper ground layer of 3 x 3 cm2 and 16 vias connecting it to the
contact area for the exposed pad, a thermal resistance, junction to ambient (in natural air
convection), of 24 °C/W can be achieved.
The dissipated power within the device depends primarily on the supply voltage, load
impedance and output modulation level. With the TDA7491P driving 2 x 6 Ω with a supply of
11 V then the maximum device dissipation is approximately 2 W.
When this power is dissipated at the maximum ambient temperature of 85 °C and the device
is mounted on the above PCB then the junction temperature could reach:
Tj = Tamb + Pd * Rj-amb = 85 + 2 * 24 = 133 °C
However, this temperature is sufficiently low to avoid triggering thermal warning.
With a musical program the dissipated power is about 40% less than the above maximum
value. This leads to a junction temperature of around only 115 °C with the 9 cm2 copper
ground. A commensurately smaller heatsink can thus be used.
Figure 49 shows the power derating curve for the PowerSSO-36 package on PCBs with
copper areas of 2 x 2 cm2 and 3 x 3 cm2.

Figure 49. Power derating curves for PCB usedgas heatsink

Pd (W) 8
7
Copper Area 3x3 cm
6 and via holes

5 TDA7491P
TDA7491P
PowerSSO-36
PSSO36
4
3
Copper Area 2x2 cm
2 and via holes

1
0
0 20 40 60 80 100 120 140 160
Tamb ( °C)

Doc ID 13540 Rev 6 37/42


Applications information TDA7491P

5.10 Test board


Figure 50. Test board (TDA7491P) layout

38/42 Doc ID 13540 Rev 6


TDA7491P Package mechanical data

6 Package mechanical data

The TDA7491P comes in a 36-pin PowerSSO package with exposed pad down (EPD).
Figure 51 below shows the package outline and Table 9 gives the dimensions.

Table 9. PowerSSO-36 EPD dimensions


Dimensions in mm Dimensions in inches
Symbol
Min Typ Max Min Typ Max

A 2.15 - 2.47 0.085 - 0.097


A2 2.15 - 2.40 0.085 - 0.094
a1 0.00 - 0.10 0.000 - 0.004
b 0.18 - 0.36 0.007 - 0.014
c 0.23 - 0.32 0.009 - 0.013
D 10.10 - 10.50 0.398 - 0.413
E 7.40 - 7.60 0.291 - 0.299
e - 0.5 - - 0.020 -
e3 - 8.5 - - 0.335 -
F - 2.3 - - 0.091 -
G - - 0.10 - - 0.004
H 10.10 - 10.50 0.398 - 0.413
h - - 0.40 - - 0.016
k 0 - 8 degrees 0 - 8 degrees
L 0.60 - 1.00 0.024 - 0.039
M - 4.30 - - 0.169 -
N - - 10 degrees - - 10 degrees
O - 1.20 - - 0.047 -
Q - 0.80 - - 0.031 -
S - 2.90 - - 0.114 -
T - 3.65 - - 0.144 -
U - 1.00 - - 0.039 -
X 4.10 - 4.70 0.161 - 0.185
Y 6.50 - 7.10 0.256 - 0.280

In order to meet environmental requirements, ST offers these devices in different grades of


ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.

Doc ID 13540 Rev 6 39/42


TDA7491P Package mechanical data
h x 45°
Figure 51. PowerSSO-36 EPD outline drawing
Doc ID 13540 Rev 6 40/42
TDA7491P Revision history

7 Revision history

Table 10. Document revision history


Date Revision Changes

02-Jul-2007 1 Initial release.


15-Oct-2008 2 Updated characterization curves.
Updated text concerning oscillator R and C in Section 3.3:
Electrical specifications on page 11
Updated condition for Iq test, added VUVP maximum value,
updated THD maximum value, updated STBY and MUTE
23-Jun-2009 3 voltages in Table 5: Electrical specifications on page 11
Updated equation for fSW on page 11 and on page 32
Updated Figure 39: Applications circuit for class-D amplifier on
page 29
Updated Section 5.7: Protection functions on page 36.
Added text for exposed pad in Figure 2 on page 8
Added text for exposed pad in Table 2 on page 9
04-Sep-2009 4 Updated exposed pad Y (Min) dimension in Table 9 on page 39
Updated supply voltage for pin DIAG pull-up resistor in
Section 5.8 on page 36.
Updated operating temperature range in Table 1 on page 1
Modified description of pins 10, 11 in Table 2 on page 9
Added VI and updated operating temperature range in Table 3:
Absolute maximum ratings on page 10
Updated Table 4: Thermal data on page 10
Updated Table 5: Electrical specifications on page 11
Updated introduction and characterization curves in Section 4
on page 13
Moved test board layout to Section 5.10 on page 38
07-Mar-2011 5
Moved package mechanical data toSection 6 on page 39
Updated applications circuit in Figure 39 on page 29
Updated Table 7: Gain settings on page 31
Updated Section 5.6: Modulation on page 33
Added Figure 47: Filterless application schematic on page 35
Removed overvoltage protection from Section 5.7: Protection
functions on page 36
Updated Section 5.9: Heatsink requirements on page 37
Updated exposed pad dimension Y in Table 9 on page 39
18-Jan-2012 6 Updated Table 7: Gain settings

Doc ID 13540 Rev 6 41/42


TDA7491P

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42/42 Doc ID 13540 Rev 6

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