Product Sample & Technical Tools & Support &

Folder Buy Documents Software Community

TL7702A, TL7705A, TL7709A, TL7712A, TL7715A

SLVS028K – APRIL 1983 – REVISED SEPTEMBER 2016

TL77xxA Supply-Voltage Supervisors

1 Features 3 Description
•
1 Power-On Reset Generator The TL77xxA family of integrated-circuit supply-
voltage supervisors is designed specifically for use as
• Automatic Reset Generation After Voltage Drop reset controllers in microcomputer and
• Wide Supply-Voltage Range microprocessor systems. The supply-voltage
• Precision Voltage Sensor supervisor monitors the supply for undervoltage
• Temperature-Compensated Voltage Reference conditions at the SENSE input. During power up, the
RESET output becomes active (low) when VCC
• Externally Adjustable Pulse Duration attains a value approaching 3.6 V. At this point
(assuming that SENSE is above VIT+), the delay timer
2 Applications function activates a time delay, after which outputs
• Computers RESET and RESET go inactive (high and low,
respectively). When an undervoltage condition occurs
• Tablets during normal operation, RESET and RESET go
• Smart Phones active.
• Servers
Device Information(1)
• Music Players
PART NUMBER PACKAGE BODY SIZE (NOM)
SOIC (8) 4.90 mm × 3.91 mm
TL77xxA
PDIP (8) 9.81 mm × 6.35 mm
TL7705A SO (8) 6.20 mm × 5.30 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.

Three-Supply Monitoring

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SLVS028K – APRIL 1983 – REVISED SEPTEMBER 2016 www.ti.com

Table of Contents
1 Features .................................................................. 1 8.4 Device Functional Modes.......................................... 9
2 Applications ........................................................... 1 9 Application and Implementation ........................ 10
3 Description ............................................................. 1 9.1 Application Information............................................ 10
4 Revision History..................................................... 2 9.2 Typical Application .................................................. 10
9.3 System Examples ................................................... 12
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4 10 Power Supply Recommendations ..................... 14
6.1 Absolute Maximum Ratings ...................................... 4 11 Layout................................................................... 14
6.2 ESD Ratings.............................................................. 4 11.1 Layout Guidelines ................................................. 14
6.3 Recommended Operating Conditions....................... 4 11.2 Layout Example .................................................... 14
6.4 Thermal Information .................................................. 5 12 Device and Documentation Support ................. 15
6.5 Electrical Characteristics........................................... 5 12.1 Related Links ........................................................ 15
6.6 Switching Characteristics .......................................... 5 12.2 Receiving Notification of Documentation Updates 15
6.7 Typical Characteristics .............................................. 6 12.3 Community Resources.......................................... 15
7 Parameter Measurement Information .................. 7 12.4 Trademarks ........................................................... 15
12.5 Electrostatic Discharge Caution ............................ 15
8 Detailed Description .............................................. 8
12.6 Glossary ................................................................ 15
8.1 Overview ................................................................... 8
8.2 Functional Block Diagram ......................................... 8 13 Mechanical, Packaging, and Orderable
8.3 Feature Description................................................... 9
Information ........................................................... 15

4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision J (January 2015) to Revision K Page

• Added SO (8) to Device Information table.............................................................................................................................. 1

• Changed RESET to RESET in Timing Diagram..................................................................................................................... 6
• Added Receiving Notification of Documentation Updates section ....................................................................................... 15

Changes from Revision I (July 2009) to Revision J Page

• Added Applications, Device Information table, Pin Functions table, ESD Ratings table, Thermal Information table,
Typical Characteristics, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1
• Deleted Ordering Information table. ....................................................................................................................................... 1

2 Submit Documentation Feedback Copyright © 1983–2016, Texas Instruments Incorporated

Product Folder Links: TL7702A TL7705A TL7709A TL7712A TL7715A

 TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
www.ti.com SLVS028K – APRIL 1983 – REVISED SEPTEMBER 2016

5 Pin Configuration and Functions

TL7702A, TL7709A, TL77012A, TL7715A D or P Package

TL7705A D, P, or PS Package
8-Pin SOIC, PDIP, or SO
Top View

REF 1 8 VCC

RESIN 2 7 SENSE

CT 3 6 RESET

GND 4 5 RESET

Not to scale

Pin Functions
PIN
TYPE DESCRIPTION
NAME NO.
CT 3 I/O External timing-capacitor pin
GND 4 — Device ground
REF 1 O Voltage reference output
RESET 6 O Supervisor reset signal output
RESET 5 O Supervisor reset signal output (inverted)
RESIN 2 I Reset input
SENSE 7 I Sense input
VCC 8 — Power Supply

Copyright © 1983–2016, Texas Instruments Incorporated Submit Documentation Feedback 3

Product Folder Links: TL7702A TL7705A TL7709A TL7712A TL7715A
TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SLVS028K – APRIL 1983 – REVISED SEPTEMBER 2016 www.ti.com

6 Specifications
6.1 Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VCC Supply voltage (2) 20 V
VI Input voltage, RESIN –0.3 20 V
TL7702A (3) –0.3 6 V
TL7705A –0.3 20 V
VI Input voltage range SENSE
TL7709A –0.3 20 V
TL7712A, TL7715A –0.3 20 V
IOH High-level output current, IOH, RESET –30 mA
IOL Low-level output current, IOL, RESET 30 mA
TJ Operating virtual junction temperature 150 °C
Tstg Storage temperature –65 150 °C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) For proper operation of the TL7702A, the voltage applied to the SENSE terminal should not exceed VCC − 1 V or 6 V, whichever is less
(3) All voltage values are with respect to GND.

6.2 ESD Ratings

VALUE UNIT
(1)
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 1000
V(ESD) Electrostatic discharge V
Charged device model (CDM), per JEDEC specification JESD22-C101 (2) 1000

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VCC Supply Voltage 3.5 18 V
VIH High-level input voltage at RESIN 2 V
VIL Low-level input voltage at RESIN 0.6 V
TL7702A 0 See (1)
TL7705A 0 10
VI Input voltage, SENSE TL7709A 0 15 V
TL7712A 0 20
TL7715A 0 20
IOH High-level output current, RESET –16 mA
IOL Low-level output current, RESET 16 mA
TL77xxAC 0 70
TA Operating free-air temperature °C
TL77xxAI –40 85

(1) For proper operation of the TL7702A, the voltage applied to the SENSE terminal should not exceed VCC − 1 V or 6 V, whichever is less.

4 Submit Documentation Feedback Copyright © 1983–2016, Texas Instruments Incorporated

Product Folder Links: TL7702A TL7705A TL7709A TL7712A TL7715A

 TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
www.ti.com SLVS028K – APRIL 1983 – REVISED SEPTEMBER 2016

6.4 Thermal Information

TL77xxA
THERMAL METRIC (1) D P PS UNIT
8 PINS 8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 97 85 95 °C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.

6.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
TL77xxAC
PARAMETER TEST CONDITIONS (1) TL77xxAI UNIT
MIN TYP MAX
VOH High-level output voltage, RESET IOH = –16 mA VCC – 1.5 V
VOL Low-level output voltage, RESET IOL = 16 mA 0.4 V
Vref Reference Voltage TA = 25°C 2.48 2.53 2.58 V
TL7702A 2.48 2.53 2.58
TL7705A 4.5 4.55 4.6
Negative-going input
VIT– TL7709A TA = 25°C 7.5 7.6 7.7 V
threshold voltage, SENSE
TL7712A 10.6 10.8 11
TL7715A 13.2 13.5 13.8
TL7702A 10
TL7705A 15
Hysteresis, SENS (VIT+ –
Vhys TL7709A TA = 25°C 20 mV
VIT–)
TL7712A 35
TL7715A 45
VI = 2.4 V to VCC 20
RESIN
II Input current VI = 0.4 V –100 µA
SENSE TL7702A Vref < VI < VCC – 1.5 V 0.5 2
IOH High-level output current, RESET VO = 18 V 50 µA
IOL Low-level output current, RESET VO = 0 –50 µA
ICC Supply current All inputs and outputs open 1.8 3 mA

(1) All electrical characteristics are measured with 0.1-µF capacitors connected at REF, CT, and VCC to GND.

6.6 Switching Characteristics

over operating free-air temperature range (unless otherwise noted)
TL77xxAC
PARAMETER TEST CONDITIONS (1) TL77xxAI UNIT
MIN TYP MAX
Output pulse duration CT = 0.1 µF 0.65 1.2 2.6 msec
Input pulse duration at RESIN 0.4 µs
Pulse duration at sense input to switch VIH = VIT− + 200 mV, VIL = VIT− − 200
tw(S) 2 µs
outputs mV
tpd propagation delay time, RESIN to RESET VCC = 5V 1 µs
RESET 0.2
tr Rise time VCC = 5 V (2) µs
RESET 3.5
RESET 3.5
tf Fall time VCC = 5 V (2) µs
RESET 0.2

(1) All switching characteristics are measured with 0.1-µF capacitors connected at REF and VCC to GND.
(2) The rise and fall times are measured with a 4.7-kΩ load resistor at RESET and RESET.

Copyright © 1983–2016, Texas Instruments Incorporated Submit Documentation Feedback 5

Product Folder Links: TL7702A TL7705A TL7709A TL7712A TL7715A
TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SLVS028K – APRIL 1983 – REVISED SEPTEMBER 2016 www.ti.com

VCC and SENSE

Threshold Voltage
VCC ~ 3.6 V
VCC ~ 2 V

RESET td
td

Output
Undefined Output
Undefined

Figure 1. Timing Diagram

6.7 Typical Characteristics

Figure 2. Assertion Time vs Load Resistance Figure 3. Deassertion Time vs Load Resistance

Figure 4. Assertion Time vs Load Capacitance Figure 5. De-assertion Time vs Load Capacitance

6 Submit Documentation Feedback Copyright © 1983–2016, Texas Instruments Incorporated

Product Folder Links: TL7702A TL7705A TL7709A TL7712A TL7715A

 TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
www.ti.com SLVS028K – APRIL 1983 – REVISED SEPTEMBER 2016

7 Parameter Measurement Information

Figure 6. Voltage Waveform

Copyright © 1983–2016, Texas Instruments Incorporated Submit Documentation Feedback 7

Product Folder Links: TL7702A TL7705A TL7709A TL7712A TL7715A
TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SLVS028K – APRIL 1983 – REVISED SEPTEMBER 2016 www.ti.com

8 Detailed Description

8.1 Overview
The TL77xxA family of integrated-circuit supply-voltage supervisors is designed specifically for use as reset
controllers in microcomputer and microprocessor systems. The supply-voltage supervisor monitors the supply for
undervoltage conditions at the SENSE input. During power up, the RESET output becomes active (low) when
VCC attains a value approaching 3.6 V. At this point (assuming that SENSE is above VIT+), the delay timer
function activates a time delay, after which outputs RESET and RESET go inactive (high and low, respectively).
When an undervoltage condition occurs during normal operation, RESET and RESET go active. To ensure that a
complete reset occurs, the reset outputs remain active for a time delay after the voltage at the SENSE input
exceeds the positive-going threshold value.
During power down and when SENSE is below VIT−, the outputs remain active until VCC falls below 2 V. After
this, the outputs are undefined. An external capacitor (typically 0.1 μF) must be connected to REF to reduce the
influence of fast transients in the supply voltage.
Five versions of this circuit are available:
• TL7705A (Vt = 4.55 V): Application in TTL-systems and microcomputer systems which require a 5 volt supply
(for example, TMS7000)
• TL7709A (Vt = 7.6 V): Application in microcomputer systems using the TMS1XXXNLL
• TL7712A (Vt = 10.8 V): Application in CMOS, microprocessor, and memory circuits with a 12 volt supply.
• TL7715A (Vt = 13.5 V): Application in circuits which operate with a supply voltage of 15 V, as is found often in
analog circuits.
• TL7702A (Vt = 2.5 V): Application in systems where other supply voltages are used. The required trigger level
my be adjusted with an external resistor divider at the SENSE input.

8.2 Functional Block Diagram

The functional block diagram is shown for illustrative purposes only; the actual circuit includes a trimming
network to adjust the reference voltage and sense-comparator trip point.

~100 µA

A. TL7702A: R1 = 0 Ω, R2 = open
TL7705A: R1 = 7.8 kΩ, R2 = 10 kΩ
TL7709A: R1 = 19.7 kΩ, R2 = 10 kΩ
TL7712A: R1 = 32.7 kΩ, R2 = 10 kΩ
TL7715A: R1 = 43.4 kΩ, R2 = 10 kΩ
B. Resistor values shown are nominal.

8 Submit Documentation Feedback Copyright © 1983–2016, Texas Instruments Incorporated

Product Folder Links: TL7702A TL7705A TL7709A TL7712A TL7715A

 TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
www.ti.com SLVS028K – APRIL 1983 – REVISED SEPTEMBER 2016

8.3 Feature Description

8.3.1 Wide Supply-Voltage Range
Th TL77xxA family operates of a wide supply voltage range of 3.5 V to 18 V.

8.3.2 Externally Adjustable Pulse Duration

The time delay is determined by the value of the external capacitor CT: td = 1.3 × 104 × CT, where CT is in farads
(F) and td is in seconds (s).

8.3.3 Temperature-Compensated Voltage Reference

The series TL77xxA incorporates an extremely stable reference voltage source. This voltage source can also be
used in applications where a constant voltage source is required. The reference voltage varies less than 10 mV
over the supply voltage range of 3.5 V to 18 V. The same stability of the reference voltage is maintained, when
the ambient temperature is changed. The reference's voltage varies only 16 mV when the ambient temperature is
changed from –40°C to +85°C.

8.4 Device Functional Modes

Figure 7 shows the timing of the various signals. In this example the SENSE input is connected to the supply
voltage VCC as in typical applications of this device. The minimum supply voltage for which the function of this
device is guaranteed is 3.6 V. After power-on, the outputs are undefined until the minimum supply voltage Vres is
reached. For the TL77xxA the minimum supply voltage is Vres = 3 V (typical 2.5 V). Beyond the voltage Vres the
capacitor CT is first kept discharged, and the outputs stay in the active state (RESET = High, RESET = Low).
When the input voltage becomes higher than the threshold voltage Vt, the thyristor is turned off and the capacitor
is charged. After a delay, td, the voltage at the capacitor passes the trigger level of the output comparator and the
outputs become inactive. The circuit to be initialized is now set to a defined state and starts the correct operation.

A. Note: SENSE Input connected to VCC

Figure 7. Timing Diagram

Copyright © 1983–2016, Texas Instruments Incorporated Submit Documentation Feedback 9

Product Folder Links: TL7702A TL7705A TL7709A TL7712A TL7715A
TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SLVS028K – APRIL 1983 – REVISED SEPTEMBER 2016 www.ti.com

9 Application and Implementation

NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.

9.1 Application Information

This application shows the initialization circuit diagrams for a microprocessor system with supply voltage Vcc = 5
V. The external components required are the decoupling capacitor Cref for the reference voltage and the timing
capacitor CT. The outputs of the TL77xxA are open collector outputs. In Figure 8 therefore a pull-up resistor is
shown at the RESET output to ensure the correct HIGH level.

9.2 Typical Application

µC
=

Figure 8. Reset Controller Schematic for a Microprocessor

9.2.1 Design Requirements

• 5-V microprocessor supply voltage
• td = 1.3 ms

9.2.2 Detailed Design Procedure

• Select reasonable values for pull-up/pull-down resistors for RESET and RESET. This design uses 10 kΩ.
• Choose CT = 0.1 µF to achieve td = 1.3 ms
• This design uses only the active-low reset output (RESET) because the example microcontroller resets when
the input is Low.

10 Submit Documentation Feedback Copyright © 1983–2016, Texas Instruments Incorporated

Product Folder Links: TL7702A TL7705A TL7709A TL7712A TL7715A

 TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
www.ti.com SLVS028K – APRIL 1983 – REVISED SEPTEMBER 2016

Typical Application (continued)

9.2.3 Application Curves

5 5
4.5 4.5
4 4

RESET Voltage (V)

RESET Voltage (V)

3.5 3.5
3 3
2.5 2.5
2 2
1.5 1.5
1 1
0.5 0.5
0 0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
VCC (V) D005
VCC (V) D006
Figure 9. Supervisor RESET Output Voltage vs VCC Figure 10. Supervisor RESET Output Voltage vs VCC

5 5
4.5 4.5
4 4
RESET Voltage (V)
RESET Voltage (V)

3.5 3.5
3 3
2.5 2.5
2 2
1.5 1.5
1 1
0.5 0.5
0 0
4.5 4.52 4.54 4.56 4.58 4.6 4.5 4.52 4.54 4.56 4.58 4.6
VCC (V) D007
VCC (V) D008
Figure 11. Supervisor RESET Output Voltage vs VCC at Figure 12. Supervisor RESET Output Voltage vs VCC at
Transition Transition

Copyright © 1983–2016, Texas Instruments Incorporated Submit Documentation Feedback 11

Product Folder Links: TL7702A TL7705A TL7709A TL7712A TL7715A
TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SLVS028K – APRIL 1983 – REVISED SEPTEMBER 2016 www.ti.com

9.3 System Examples

Figure 13. Multi Power-Supply System Reset Generation Schematic

Figure 14. Eliminating Undefined States Using a P-Channel JFET Schematic

12 Submit Documentation Feedback Copyright © 1983–2016, Texas Instruments Incorporated

Product Folder Links: TL7702A TL7705A TL7709A TL7712A TL7715A

 TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
www.ti.com SLVS028K – APRIL 1983 – REVISED SEPTEMBER 2016

System Examples (continued)

Figure 15. Eliminating Undefined States Using PNP Transistor Schematic

Copyright © 1983–2016, Texas Instruments Incorporated Submit Documentation Feedback 13

Product Folder Links: TL7702A TL7705A TL7709A TL7712A TL7715A
TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SLVS028K – APRIL 1983 – REVISED SEPTEMBER 2016 www.ti.com

10 Power Supply Recommendations

The TL77xxA devices operate within the specifications from the Recommended Operating Conditions between
3.5 V and 18 V.

CAUTION
These devices risk being damaged when powered by more than 20 V.

11 Layout

11.1 Layout Guidelines

The voltage monitor should be placed on the printed circuit board, where there are no neighboring circuits in the
which switch high currents (like bus interface circuits and power switches). When laying out the layout of the
printed circuit board, take special care with the interconnects which carry analog signals. Beside the SENSE
input these are the CT and Vref terminals. Noise coupled into the CT input will lead to a reduction of the output
pulse width. Noise coupled into the Vref input or into the filter capacitor at this input may lead to undesired
triggering of the circuit and by this to an undesired RESET pulse. Practice shows, that this malfunction when high
currents flow over the interconnects of these capacitors to the GND terminal of the voltage monitor. To avoid
these effects, the GND terminals of these capacitors must be connected by the shortest way to the GND terminal
of the voltage monitor in so that no currents caused by other circuits flow over these wires. Figure 16 show a
layout proposal for the printed circuit board. Furthermore the resistors of the voltage divider at the SENSE input
of the TL7702 (R2 and R3 in Figure 16) have to be placed in so, that no noise may be coupled into this circuit.

11.2 Layout Example

1 8
2 7
3 6
4 5

Figure 16. Printed Circuit Layout for the Supply Voltage Supervisor

14 Submit Documentation Feedback Copyright © 1983–2016, Texas Instruments Incorporated

Product Folder Links: TL7702A TL7705A TL7709A TL7712A TL7715A

 TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
www.ti.com SLVS028K – APRIL 1983 – REVISED SEPTEMBER 2016

12 Device and Documentation Support

12.1 Related Links

The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.

Table 1. Related Links

TECHNICAL TOOLS & SUPPORT &
PARTS PRODUCT FOLDER SAMPLE & BUY
DOCUMENTS SOFTWARE COMMUNITY
TL7702A Click here Click here Click here Click here Click here
TL7705A Click here Click here Click here Click here Click here
TL7709A Click here Click here Click here Click here Click here
TL7712A Click here Click here Click here Click here Click here
TL7715A Click here Click here Click here Click here Click here

12.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.

12.3 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.

12.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

12.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.

13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

Copyright © 1983–2016, Texas Instruments Incorporated Submit Documentation Feedback 15

Product Folder Links: TL7702A TL7705A TL7709A TL7712A TL7715A
 PACKAGE OPTION ADDENDUM

www.ti.com 30-Jun-2025

PACKAGING INFORMATION

Orderable part number Status Material type Package | Pins Package qty | Carrier RoHS Lead finish/ MSL rating/ Op temp (°C) Part marking
(1) (2) (3) Ball material Peak reflow (6)
(4) (5)

TL7702ACD Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM 0 to 70 7702AC
TL7702ACD.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM 0 to 70 7702AC
TL7702ACDR Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM 0 to 70 7702AC
TL7702ACDR.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM 0 to 70 7702AC
TL7702ACP Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type 0 to 70 TL7702ACP
TL7702ACP.A Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type 0 to 70 TL7702ACP
TL7702AID Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 7702AI
TL7702AID.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 7702AI
TL7702AIDR Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 7702AI
TL7702AIDR.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 7702AI
TL7702AIP Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type -40 to 85 TL7702AIP
TL7702AIP.A Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type -40 to 85 TL7702AIP
TL7705ACD Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM 0 to 70 7705AC
TL7705ACD.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM 0 to 70 7705AC
TL7705ACDR Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM 0 to 70 7705AC
TL7705ACDR.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM 0 to 70 7705AC
TL7705ACP Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type 0 to 70 TL7705ACP
TL7705ACP.A Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type 0 to 70 TL7705ACP
TL7705ACPSR Active Production SO (PS) | 8 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM 0 to 70 T7705A
TL7705ACPSR.A Active Production SO (PS) | 8 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM 0 to 70 T7705A
TL7705AID Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 7705AI
TL7705AID.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 7705AI
TL7705AIDR Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 7705AI
TL7705AIDR.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 7705AI
TL7705AIP Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type -40 to 85 TL7705AIP
TL7705AIP.A Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type -40 to 85 TL7705AIP
TL7709ACD Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM 0 to 70 7709AC
TL7709ACD.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM 0 to 70 7709AC
TL7709ACDR Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM 0 to 70 7709AC

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

www.ti.com 30-Jun-2025

Orderable part number Status Material type Package | Pins Package qty | Carrier RoHS Lead finish/ MSL rating/ Op temp (°C) Part marking
(1) (2) (3) Ball material Peak reflow (6)
(4) (5)

TL7709ACDR.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM 0 to 70 7709AC
TL7709ACP Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type 0 to 70 TL7709ACP
TL7709ACP.A Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type 0 to 70 TL7709ACP
TL7712ACD Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM 0 to 70 7712AC
TL7712ACD.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM 0 to 70 7712AC
TL7712ACDR Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM 0 to 70 7712AC
TL7712ACDR.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM 0 to 70 7712AC
TL7712ACP Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type 0 to 70 TL7712ACP
TL7712ACP.A Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type 0 to 70 TL7712ACP
TL7712AIDR Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM - 7712AI
TL7712AIDR.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM 0 to 70 7712AI
TL7715ACD Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM 0 to 70 7715AC
TL7715ACD.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM 0 to 70 7715AC
TL7715ACP Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type 0 to 70 TL7715ACP
TL7715ACP.A Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type 0 to 70 TL7715ACP

(1)
Status: For more details on status, see our product life cycle.

(2)
Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance,
reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional
waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind.

(3)
RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition.

(4)
Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum
column width.

(5)
MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown.
Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board.

(6)
Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part.

Addendum-Page 2
 PACKAGE OPTION ADDENDUM

www.ti.com 30-Jun-2025

Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two
combined represent the entire part marking for that device.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and
makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative
and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers
and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 3
 PACKAGE MATERIALS INFORMATION

www.ti.com 24-Jul-2025

TAPE AND REEL INFORMATION

REEL DIMENSIONS TAPE DIMENSIONS

K0 P1

B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers

Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Sprocket Holes

Q1 Q2 Q1 Q2

Q3 Q4 Q3 Q4 User Direction of Feed

Pocket Quadrants

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TL7702ACDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL7702AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL7705ACDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL7705ACPSR SO PS 8 2000 330.0 16.4 8.35 6.6 2.4 12.0 16.0 Q1
TL7705AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL7709ACDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL7712ACDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL7712AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 24-Jul-2025

TAPE AND REEL BOX DIMENSIONS

Width (mm)
H
W

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TL7702ACDR SOIC D 8 2500 353.0 353.0 32.0
TL7702AIDR SOIC D 8 2500 353.0 353.0 32.0
TL7705ACDR SOIC D 8 2500 353.0 353.0 32.0
TL7705ACPSR SO PS 8 2000 353.0 353.0 32.0
TL7705AIDR SOIC D 8 2500 353.0 353.0 32.0
TL7709ACDR SOIC D 8 2500 353.0 353.0 32.0
TL7712ACDR SOIC D 8 2500 353.0 353.0 32.0
TL7712AIDR SOIC D 8 2500 353.0 353.0 32.0

Pack Materials-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 24-Jul-2025

TUBE

T - Tube
height L - Tube length

W - Tube
width

B - Alignment groove width

*All dimensions are nominal

Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
TL7702ACD D SOIC 8 75 507 8 3940 4.32
TL7702ACD D SOIC 8 75 506.6 8 3940 4.32
TL7702ACD.A D SOIC 8 75 506.6 8 3940 4.32
TL7702ACD.A D SOIC 8 75 507 8 3940 4.32
TL7702ACP P PDIP 8 50 506 13.97 11230 4.32
TL7702ACP.A P PDIP 8 50 506 13.97 11230 4.32
TL7702AID D SOIC 8 75 507 8 3940 4.32
TL7702AID.A D SOIC 8 75 507 8 3940 4.32
TL7702AIP P PDIP 8 50 506 13.97 11230 4.32
TL7702AIP.A P PDIP 8 50 506 13.97 11230 4.32
TL7705ACD D SOIC 8 75 507 8 3940 4.32
TL7705ACD.A D SOIC 8 75 507 8 3940 4.32
TL7705ACP P PDIP 8 50 506 13.97 11230 4.32
TL7705ACP.A P PDIP 8 50 506 13.97 11230 4.32
TL7705AID D SOIC 8 75 507 8 3940 4.32
TL7705AID.A D SOIC 8 75 507 8 3940 4.32
TL7705AIP P PDIP 8 50 506 13.97 11230 4.32
TL7705AIP.A P PDIP 8 50 506 13.97 11230 4.32
TL7709ACD D SOIC 8 75 507 8 3940 4.32
TL7709ACD.A D SOIC 8 75 507 8 3940 4.32
TL7709ACP P PDIP 8 50 506 13.97 11230 4.32
TL7709ACP.A P PDIP 8 50 506 13.97 11230 4.32
TL7712ACD D SOIC 8 75 507 8 3940 4.32
TL7712ACD.A D SOIC 8 75 507 8 3940 4.32
TL7712ACP P PDIP 8 50 506 13.97 11230 4.32
TL7712ACP.A P PDIP 8 50 506 13.97 11230 4.32
TL7715ACD D SOIC 8 75 507 8 3940 4.32
TL7715ACD.A D SOIC 8 75 507 8 3940 4.32
TL7715ACP P PDIP 8 50 506 13.97 11230 4.32

Pack Materials-Page 3
 PACKAGE MATERIALS INFORMATION

www.ti.com 24-Jul-2025

Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
TL7715ACP.A P PDIP 8 50 506 13.97 11230 4.32

Pack Materials-Page 4
 PACKAGE OUTLINE
D0008A SCALE 2.800
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

SEATING PLANE
.228-.244 TYP
[5.80-6.19]
.004 [0.1] C
A PIN 1 ID AREA
6X .050
[1.27]
8
1

.189-.197 2X
[4.81-5.00] .150
NOTE 3 [3.81]

4X (0 -15 )

4
5
8X .012-.020
B .150-.157 [0.31-0.51]
.069 MAX
[3.81-3.98] .010 [0.25] C A B [1.75]
NOTE 4

.005-.010 TYP
[0.13-0.25]

4X (0 -15 )

SEE DETAIL A
.010
[0.25]

.004-.010
0 -8 [0.11-0.25]
.016-.050
[0.41-1.27] DETAIL A
(.041) TYPICAL
[1.04]

4214825/C 02/2019

NOTES:

1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.

www.ti.com
 EXAMPLE BOARD LAYOUT
D0008A SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

8X (.061 )
[1.55]
SYMM SEE
DETAILS
1
8

8X (.024)
[0.6] SYMM

(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN
SCALE:8X

SOLDER MASK SOLDER MASK

METAL METAL UNDER
OPENING OPENING SOLDER MASK

EXPOSED
METAL EXPOSED
METAL
.0028 MAX .0028 MIN
[0.07] [0.07]
ALL AROUND ALL AROUND

NON SOLDER MASK SOLDER MASK

DEFINED DEFINED

SOLDER MASK DETAILS

4214825/C 02/2019

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

www.ti.com
 EXAMPLE STENCIL DESIGN
D0008A SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

8X (.061 )
[1.55] SYMM

1
8

8X (.024)
[0.6] SYMM

(R.002 ) TYP
5 [0.05]
4
6X (.050 )
[1.27]
(.213)
[5.4]

SOLDER PASTE EXAMPLE

BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X

4214825/C 02/2019

NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.

www.ti.com
 IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, regulatory or other requirements.
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these
resources.
TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with
such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for
TI products.
TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2025, Texas Instruments Incorporated