PD - 91813

SMPS MOSFET IRFIB6N60A

HEXFET® Power MOSFET
Applications
l Switch Mode Power Supply ( SMPS )
VDSS Rds(on) max ID
l Uninterruptable Power Supply 600V 0.75W 5.5A
l High speed power switching
l High Voltage Isolation = 2.5KVRMS†

Benefits
l Low Gate Charge Qg results in Simple
Drive Requirement
l Improved Gate, Avalanche and dynamic
dv/dt Ruggedness
l Fully Characterized Capacitance and
Avalanche Voltage and Current G DS
TO-220 FULLPAK

Absolute Maximum Ratings

Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 5.5
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 3.5 A
IDM Pulsed Drain Current  37
PD @TC = 25°C Power Dissipation 60 W
Linear Derating Factor 0.48 W/°C
VGS Gate-to-Source Voltage ± 30 V
dv/dt Peak Diode Recovery dv/dt ƒ 5.0 V/ns
TJ Operating Junction and -55 to + 150
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torqe, 6-32 or M3 screw 10 lbf•in (1.1N•m)

Typical SMPS Topologies:

l Single Transistor Forward

l Active Clamped Forward

Notes  through †are on page 8

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IRFIB6N60A
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 600 ––– ––– V VGS = 0V, ID = 250µA
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 0.75 W VGS = 10V, ID = 3.3A „
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
––– ––– 25 VDS = 600V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– ––– 250 VDS = 480V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 V GS = 30V
IGSS nA
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -30V

Dynamic @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 5.5 ––– ––– S VDS = 25V, ID = 5.5A
Qg Total Gate Charge ––– ––– 49 ID = 9.2A
Qgs Gate-to-Source Charge ––– ––– 13 nC VDS = 400V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 20 VGS = 10V, See Fig. 6 and 13 „
td(on) Turn-On Delay Time ––– 13 ––– VDD = 300V
tr Rise Time ––– 25 ––– ns ID = 9.2A
td(off) Turn-Off Delay Time ––– 30 ––– RG = 9.1W
tf Fall Time ––– 22 ––– RD = 35.5W,See Fig. 10 „
Ciss Input Capacitance ––– 1400 ––– VGS = 0V
Coss Output Capacitance ––– 180 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 7.1 ––– pF ƒ = 1.0MHz, See Fig. 5
Coss Output Capacitance ––– 1957 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss Output Capacitance ––– 49 ––– VGS = 0V, VDS = 480V, ƒ = 1.0MHz
Coss eff. Effective Output Capacitance ––– 96 ––– VGS = 0V, VDS = 0V to 480V …
Avalanche Characteristics
Parameter Typ. Max. Units
EAS Single Pulse Avalanche Energy‚ ––– 290 mJ
IAR Avalanche Current ––– 9.2 A
EAR Repetitive Avalanche Energy ––– 6.0 mJ
Thermal Resistance
Parameter Typ. Max. Units
RqJC Junction-to-Case ––– 2.1
RqJA Junction-to-Ambient ––– 65 °C/W

Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
D
IS Continuous Source Current MOSFET symbol
––– ––– 5.5
(Body Diode) showing the
A
ISM Pulsed Source Current integral reverse G

––– ––– 37
(Body Diode)  p-n junction diode. S

VSD Diode Forward Voltage ––– ––– 1.5 V TJ = 25°C, IS = 9.2A, VGS = 0V „
trr Reverse Recovery Time ––– 530 800 ns TJ = 25°C, IF = 9.2A
Qrr Reverse RecoveryCharge ––– 3.0 4.4 µC di/dt = 100A/µs „
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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 IRFIB6N60A

100 100
VGS VGS
TOP 15V TOP 15V
10V 10V

I D , Drain-to-Source Current (A)

8.0V 8.0V
I D , Drain-to-Source Current (A)

7.0V 7.0V
6.0V 6.0V
5.5V 5.5V
5.0V 5.0V
BOTTOM 4.7V BOTTOM 4.7V
10

10

4.7V
4.7V

20µs PULSE WIDTH 20µs PULSE WIDTH

TJ = 25 °C TJ = 150 °C
0.1 1
0.1 1 10 100 1 10 100
VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

100 3.0
ID = 9.2A
RDS(on) , Drain-to-Source On Resistance
I D , Drain-to-Source Current (A)

2.5

TJ = 150 ° C
10 2.0
(Normalized)

1.5
TJ = 25 ° C

1 1.0

0.5

V DS = 50V
20µs PULSE WIDTH VGS = 10V
0.1 0.0
4.0 5.0 6.0 7.0 8.0 9.0 10.0 -60 -40 -20 0 20 40 60 80 100 120 140 160
VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature ( °C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance

Vs. Temperature
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IRFIB6N60A

2400 20
V GS = 0V, f = 1MHz ID = 9.2A
C iss = Cgs + C gd , Cds SHORTED
400V
VDS = 480V

VGS , Gate-to-Source Voltage (V)

C rss = C gd
2000 C oss = C ds + C gd VDS = 300V
16
VDS = 120V
Ciss
C, Capacitance (pF)

1600
Coss 12

1200

8
800

Crss 4
400

FOR TEST CIRCUIT

SEE FIGURE 13
0 A 0
1 10 100 1000 0 10 20 30 40 50
VDS , Drain-to-Source Voltage (V) QG , Total Gate Charge (nC)

Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs.

Drain-to-Source Voltage Gate-to-Source Voltage

100 1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
ISD , Reverse Drain Current (A)

100
I D , Drain Current (A)

10

TJ = 150 ° C 10us

10
100us

1 1ms
TJ = 25 ° C 1
10ms
TC = 25 ° C
TJ = 150 ° C
V GS = 0 V Single Pulse
0.1 0.1
0.2 0.5 0.7 1.0 1.2 10 100 1000 10000
VSD ,Source-to-Drain Voltage (V) VDS , Drain-to-Source Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area

Forward Voltage
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 IRFIB6N60A

6.0 RD
VDS

VGS
5.0 D.U.T.
RG
+
ID , Drain Current (A)

-V DD
4.0
10V
Pulse Width £ 1 µs
3.0 Duty Factor £ 0.1 %

2.0 Fig 10a. Switching Time Test Circuit

VDS
1.0
90%

0.0
25 50 75 100 125 150
TC , Case Temperature ( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs. td(on) tr t d(off) tf
Case Temperature
Fig 10b. Switching Time Waveforms

10
Thermal Response (Z thJC )

D = 0.50
1

0.20

0.10
P DM
0.05
0.1
t1
0.02
t2
0.01
SINGLE PULSE Notes:
(THERMAL RESPONSE) 1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.01
0.00001 0.0001 0.001 0.01 0.1 1 10
t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRFIB6N60A

600
ID

EAS , Single Pulse Avalanche Energy (mJ)

TOP 4.1A
15V 500 5.8A
BOTTOM 9.2A

L DRIVER 400
VDS

300
RG D.U.T +
- VDD
IAS A
20V 200
tp 0.01Ω

Fig 12a. Unclamped Inductive Test Circuit 100

0
25 50 75 100 125 150
V(BR)DSS Starting TJ , Junction Temperature ( °C)
tp

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

I AS
Current Regulator
Fig 12b. Unclamped Inductive Waveforms Same Type as D.U.T.

50KΩ

12V .2µF
QG .3µF

10 V +
V
QGS QGD D.U.T. - DS

VGS
VG
3mA

IG ID
Charge Current Sampling Resistors

Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit

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 IRFIB6N60A

Peak Diode Recovery dv/dt Test Circuit

+ Circuit Layout Considerations

D.U.T
· Low Stray Inductance
· Ground Plane
ƒ
· Low Leakage Inductance
Current Transformer
-

+
‚
„
- +
-


RG · dv/dt controlled by RG +
· Driver same type as D.U.T. VDD
-
· ISD controlled by Duty Factor "D"
· D.U.T. - Device Under Test

Driver Gate Drive

P.W.
Period D=
P.W. Period

VGS=10V *

D.U.T. ISD Waveform

Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD

Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 14. For N-Channel HEXFETS

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IRFIB6N60A
Package Outline
TO-220 Fullpak Outline
Dimensions are shown in millimeters (inches)
10.60 (.417) 3.40 (.133)
ø 4.80 (.189)
10.40 (.409) 3.10 (.123) 4.60 (.181)
2.80 (.110)
-A- 2.60 (.102)
3.70 (.145) LEAD ASSIGNMENTS
3.20 (.126) 7.10 (.280) 1 - GATE
6.70 (.263) 2 - DRAIN
3 - SOURCE
16.00 (.630)
15.80 (.622)
1.15 (.045) NOTES:
MIN.
1 DIMENSIONING & TOLERANCING
PER ANSI Y14.5M, 1982
1 2 3
2 CONTROLLING DIMENSION: INCH.
3.30 (.130)
3.10 (.122)
-B-
13.70 (.540)
13.50 (.530)
C
D

A
0.48 (.019) B
0.90 (.035) 3X
1.40 (.055) 3X 0.44 (.017)
3X 0.70 (.028)
1.05 (.042) 2.85 (.112)
0.25 (.010) M A M B 2.65 (.104) MINIMUM CREEPAGE
2.54 (.100) DISTANCE BETWEEN
2X A-B-C-D = 4.80 (.189)

Part Marking Information

TO-220 Fullpak
EXAMPLE : THIS IS AN IRFI840G
WITH ASSEMBLY
A
LOT CODE E401
INTERNATIONAL PART NUMBER
RECTIFIER IRFI840G
LOGO
E401 9245
ASSEMBLY DATE CODE
LOT CODE (YYWW)
YY = YEAR
Notes: WW = WEEK
 Repetitive rating; pulse width limited by „ Pulse width £ 300µs; duty cycle £ 2%.
max. junction temperature. ( See fig. 11 )
‚ Starting TJ = 25°C, L = 6.8mH … Coss eff. is a fixed capacitance that gives the same charging time
RG = 25W, IAS = 9.2A. (See Figure 12) as Coss while VDS is rising from 0 to 80% VDSS
† t=60s, f=60Hz
ƒ ISD £ 9.2A, di/dt £ 50A/µs, VDD £ V(BR)DSS,
TJ £ 150°C

WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
IR GREAT BRITAIN: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
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IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 838 4630
IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673, Taiwan Tel: 886-2-2377-9936
http://www.irf.com/ Data and specifications subject to change without notice. 5/99
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