#
iq
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VU13P FPGA ADDA 调试与验证框架：UART/SPI boot、ADC IQ DSP、DAC 2× DDR、PySide6（SI5340 / AD9640 / AD9117）
python fpga dsp verilog spi xilinx adc vivado uart iq adda hardware-testing dac fpga-development pyside6 sensor-validation si5340 xilinx-ultrascale vu13p sensor-test-framework
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Updated
Jun 26, 2026 - Verilog
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