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Samsung Semiconductor India Research
- Bangalore
-
03:48
(UTC +05:30) - https://www.linkedin.com/in/balaji-renganathan-computervision-developer/
- @Balaji_mcr
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Balajimcr / Demosaic
Forked from masterAllen/DemosaicUse Python to implement some demosaic algorithms
The agent that grows with you
A computer vision research tool for evaluating grid-based image remapping pipelines with geometric transform composition.
AI agents running research on single-GPU nanochat training automatically
Your own personal AI assistant. Any OS. Any Platform. The lobster way. 🦞
Interactive architecture diagrams for codebases
Open-source context retrieval layer for AI agents
End-to-end, code-first tutorials for building production-grade GenAI agents. From prototype to enterprise deployment.
A comprehensive collection of PyTorch tutorials covering essential concepts and applications
Build computer vision models in a fraction of the time and with less data.
Darwin Gödel Machine: Open-Ended Evolution of Self-Improving Agents
A gallery that showcases on-device ML/GenAI use cases and allows people to try and use models locally.
Balajimcr / LeRF-PyTorch
Forked from ddlee-cn/LeRF-PyTorch[CVPR 2023] Learning Steerable Function for Efficient Image Resampling
Legacy Python library for Agentic Document Extraction (ADE). Use the landingai-ade library for all new projects.
[CVPR 2023 & T-PAMI 2025] Learning Resampling Function for Adaptive and Efficient Image Interpolation
Official repo for CVPR 2025 paper AutoLUT: LUT-Based Image Super-Resolution with Automatic Sampling and Adaptive Residual Learning
Lightweight coding agent that runs in your terminal
Repo to accompany my mastering LLM engineering course
Image Restoration Toolbox (PyTorch). Training and testing codes for DPIR, USRNet, DnCNN, FFDNet, SRMD, DPSR, BSRGAN, SwinIR
Plug-and-Play Image Restoration with Deep Denoiser Prior (IEEE TPAMI 2021) (PyTorch)
[ICCP'22] Rethinking Learning-based Demosaicing, Denoising, and Super-Resolution Pipeline
A Python based fixed-point implementation of the Infinite-ISP design for ASIC and FPGA design and verification.
A camera ISP (image signal processor) pipeline that contains modules with simple to complex algorithms implemented at the application level.
This is a collection of our zero-cost NAS and efficient vision applications.
Software engineering salaries (india) from leetcode compensation
LLM story writer with a focus on high-quality long output based on a user provided prompt.