i8080 precise replica in Verilog, based on reverse engineering of real die

Supplemental materials (in russian) to the book PROFESSIONAL VERIFICATION: A Guide to Advanced Functional Verification

The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of booting Linux.

Учебные материалы Альянса RISC-V

VCD file viewer for Neovim

Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.

SCR1 is a high-quality open-source RISC-V MCU core in Verilog

Verilog Matrix ALU

Исходные коды к главам книги "Цифровой синтез: практический курс" (под ред. А.Ю. Романова и Ю.В. Панчула)

TangPrimer-20K-example project

List of awesome open source hardware tools, generators, and reusable designs

human-in-the-loop HDL training tool

Arithmetic in floating-point format according to the IEEE 754 standard. Without Nan and inf.

Микропроцессорные устройства

The UVM written in Python

DekatronPC - vacuum tube and cold-cathode tube based computer

Build your hardware, easily!

Linux on LiteX-VexRiscv

Tetris on Tang-Nano FPGA

Verilog module for LCD1602 (HD44780)

SystemVerilog language-oriented exercises

Открытое RISC-V процессорное ядро MIRISCV для образовательных целей

A Verilog synthesis flow for Minecraft redstone circuits