Open-source high-performance RISC-V processor

Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server

FuseSoC and Verible integration demo

An Emacs framework for the stubborn martian hacker

Binarized Convolutional Neural Networks on Software-Programmable FPGAs (FPGA'17)

FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)

CoreScore

RISC-V Nexus Trace TG documentation and reference code

A companion repository for the io_uring by Example article series

TeleBench™ is a suite of benchmarks that allows the users to approximate the performance of processors in modem and related fixed-telecom applications.

VeeR EH1 core

Containing dozens of real-world and synthetic tests, CoreMark®-PRO (2015) is an industry-standard benchmark that measures the multi-processor performance of central processing units (CPU) and embed…

CoreMark® is an industry-standard benchmark that measures the performance of central processing units (CPU) and embedded microcrontrollers (MCU).

Novel Coronavirus (COVID-19) Cases, provided by JHU CSSE

The fastai book, published as Jupyter Notebooks

Mirror of the PipeWire repository (see https://gitlab.freedesktop.org/pipewire/pipewire/)

☕ GDBFrontend is an easy, flexible and extensible gui debugger.

educational microarchitectures for risc-v isa

Nidhugg is a bug-finding tool which targets bugs caused by concurrency and relaxed memory consistency in concurrent programs. It is particularly useful for programs written in C/pthreads. Currently…

Effortlessly write inline C functions in Python

OS for z80 calculators

The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of booting Linux.

This is the top-level project for the PULP Platform. It instantiates a PULP open-source system with a PULP SoC (microcontroller) domain accelerated by a PULP cluster with 8 cores.

NumPy aware dynamic Python compiler using LLVM

Python for the Epiphany co-processor

Run Time for AIE and FPGA based platforms

Compiler for Neural Network hardware accelerators

Parallel Programming for FPGAs -- An open-source high-level synthesis book