zkSNARK implementation in JavaScript & WASM

Breakthrough AES Performance on CUDA Devices

Weak keys for reduced round AES

State-of-the-Art Deep Learning scripts organized by models - easy to train and deploy with reproducible accuracy and performance on enterprise-grade infrastructure.

NVIDIA Federated Learning Application Runtime Environment

A curated list of amazingly awesome Cybersecurity datasets

TFHE-rs: A Pure Rust implementation of the TFHE Scheme for Boolean and Integer Arithmetics Over Encrypted Data.

CUDA Library Samples

Deployments of fancy cryptography

✨ Awesome - A curated list of amazing Homomorphic Encryption libraries, software and resources

Official repository of the AWS EC2 FPGA Hardware and Software Development Kit

An open-source static random access memory (SRAM) compiler.

Versatile framework for multi-party computation

SOCI is a Secure Outsourced Computation on Integers based on the Paillier cryptosystem and a twin-server architecture

An Implementation of the Fully Homomorphic Smart-Vercauteren Cryptosystem

Homomorphic Encryption demos

Device: Zedboard xc7z020clg484-1, Clock Rate: 319 MHz, Tool: Vivado 2018.3, Language: Verilog

Kasırga Sayısal Görüntü İşleme Kategorisi Hızlandırıcı Tasarımı

The official gpt4free repository | various collection of powerful language models | opus 4.6 gpt 5.3 kimi 2.5 deepseek v3.2 gemini 3

Open-Sora: Democratizing Efficient Video Production for All

🙌 OpenHands: AI-Driven Development

Devika is the first open-source implementation of an Agentic Software Engineer. Initially started as an open-source alternative to Devin.

KASIRGA - KIZIL Takımı Teknofest 2023 Çip Tasarımı - KIZIL İşlemci Projesi

CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional cache…

Matrak Verilog ile yazılmış bir RISC-V işlemcidir.

https://caravel-user-project.readthedocs.io

synthesiseable ieee 754 floating point library in verilog