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23 stars written in Verilog
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OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/

Verilog 2,255 727 Updated Nov 7, 2025

An Open-source FPGA IP Generator

Verilog 1,012 180 Updated Nov 7, 2025

Z80 open-source silicon clone. Goal is to become a silicon proven, pin compatible, open-source replacement for classic Z80.

Verilog 696 28 Updated Oct 3, 2025

Project Apicula 🐝: bitstream documentation for Gowin FPGAs

Verilog 595 79 Updated Oct 28, 2025

A Pi emulating a GameBoy sounds cheap. What about an FPGA?

Verilog 506 61 Updated Dec 10, 2022

Verilog SDRAM memory controller

Verilog 348 102 Updated May 13, 2017

FPGA cores compatible with multiple arcade game machines and KiCAD schematics of arcade games. Working on MiSTer FPGA/Analogue Pocket

Verilog 278 46 Updated Nov 6, 2025

Super Nintendo Entertainment System for Tang FPGA boards

Verilog 265 33 Updated Sep 13, 2025

IceChips is a library of all common discrete logic devices in Verilog

Verilog 149 24 Updated Oct 2, 2025

FM sound source written in Verilog, fully compatible with YM2612, YM3438 (JT12), YM2203 (JT03) and YM2610 (JT10)

Verilog 126 25 Updated Aug 25, 2025

Verilog project that takes the digital video and audio from a Neo Geo MVS before going through the DACs and outputs the signals over HDMI

Verilog 110 20 Updated May 19, 2015

An FPGA implementation of a classic 80ies speech synthesizer. Done for the Retro Challenge 2017/10.

Verilog 78 15 Updated May 2, 2019

"What comes next? Super Mario 128? Actually, that's what I want to do."

Verilog 74 4 Updated Jan 23, 2024

Reverse-engineering of SEGA chips

Verilog 56 6 Updated Oct 11, 2025

Verilog re-implementation of the famous CAPCOM arcade game

Verilog 29 1 Updated Jan 25, 2019

VGA1306 (VGA-out for DIY Arduboys implemented on an FPGA!)

Verilog 28 9 Updated Jun 19, 2021

NES/Famicom/Famiclones Mappers Research

Verilog 27 6 Updated Jan 29, 2025

Gate array reverse engineering

Verilog 26 5 Updated May 1, 2025

A Verilog based Fractal Set Generator for the Xilinx Artix 7

Verilog 9 3 Updated Dec 10, 2021

Classic 1980s arcade video game implemented in an FPGA using Verilog

Verilog 9 2 Updated May 14, 2021

FPGA implementation of Gaplus(Galaga 3) arcade game

Verilog 6 1 Updated Oct 26, 2019

Third-party bitstream documentation for Altera MAX7000 CPLDs

Verilog 6 Updated Jul 12, 2024

TinyTapeout submission with the SAA1099 a 6-voice programmable sound generator (PSG) chip from Philips.

Verilog 5 Updated Nov 20, 2023