🚀 Verification Engineer | Formal Verification | AI + Hardware Enthusiast
📍 Bangalore, India 📧 gkt2work@gmail.com
I am a Verification Engineer with strong expertise in SystemVerilog, UVM, and Formal Verification (SVA). I enjoy working at the intersection of hardware verification and AI, building intelligent tools that improve productivity and verification quality.
- 🔍 Passionate about formal verification & assertion-based design
- 🤖 Exploring Agentic AI + RAG for hardware automation
- 🛠️ Building tools that simplify RTL verification workflows
- 📚 Currently pursuing Executive M.Tech in VLSI Design
- SystemVerilog
- UVM (Universal Verification Methodology)
- Formal Verification (SVA, Property Checking)
- SystemVerilog, Verilog, VHDL
- Python, TCL
- Xcelium
- Jasper
- vManager
- Generative AI (GenAI)
- LLMs & Agentic AI
- Retrieval-Augmented Generation (RAG)
- Model Context Protocol (MCP)
- Linux, Git, GitHub, GitLab
- Jira, Bitbucket, Confluence
- VS Code, Eclipse
- Working on IP-level verification (FIFO, FSM, protocols like AHB)
- Developed UVM-based testbenches and SVA-based formal properties
- Performed debugging, regression, and coverage closure
- Built automation scripts for regression workflows
- Developed Agentic AI chatbot systems
- Implemented RAG-based pipelines for improved LLM outputs
- Integrated applications using Model Context Protocol (MCP)
- Built a GUI-based platform for SymbiYosys
- Simplifies formal verification workflows for engineers
- AI-powered system to generate RTL & testbenches
- Uses RAG + LLM agents for intelligent code generation
- Designed SV-UVM testbench from scratch
- Created SVA-based formal verification suite
- Achieved functional & coverage closure
- 🎓 Executive M.Tech in VLSI Design (Ongoing)
- 🎓 B.Tech in Electronics & Communication Engineering
- 🧪 Advanced formal verification workflows
- 🤖 AI-powered tools for hardware design & verification
- 🔓 Open-source contributions in EDA & verification tools
I'm always open to collaboration, discussions, and opportunities in:
- Formal Verification
- VLSI Design
- AI in Hardware
⭐ If you find my work interesting, feel free to connect or collaborate!