Composable HLS library for rapid development of LLM accelerators. FlexLLM enables spatial-temporal hybrid architectures, with parameterized modulet templates customized for the prefill and decode s…

Claude Code Methodology | GAAC=Github-as-a-Context | LLM IS AS GOOD AS YOUR ARE | 胸有成码

FPGA 2025 SAT Accel: A modern SAT Solver on FPGA Repository

An MLIR Complier for PyTorch/C/C++ Codes into HLS Dataflow Designs

Try the active community-maintained version with binary releases at https://github.com/tuna/tapa . This is the UCLA publication version.

Lake is a framework for generating synthesizable memory modules from a high-level behavioral specification and widely-available memory macros.