This is a from scratch rewrite of the original RTIC framework. The goal is to make it more maintainable, extensible, and easily portable to new hardware architectures (including multicore) in order to to reduce the barrier of entry for contributors and maintainers who wish to introduce newer syntax features and hardware ports.
The main idea is to breakdown RTIC's monolithic codebase by separating the generic proc-macro logic (RTIC syntax) from target-specific details (Interrupt handling, system initialization.. etc). Furthermore, the proc-macro logic is split to core and addons, where the core logic captures only the SRP Tasks/Resources model and the rest will be external addons like software tasks and async/await..etc.
The result is a small core framework (rticx-core) plus a growing ecosystem of compilation passes and distributions:
- Compilation passes are independent crates that transform and expand user application syntax.
- Distributions are target-specific crates that implement backend traits, register the passes they want, and expose the final
#[<distro>::app]macro.
In addition, the user application syntax (Referred to now as RTICX syntax) has been refactored to provide less magic and more idiomatic Rust experience while preserving the core concepts of the original RTIC framework (Tasks and Resources model).
This repository maintains the core framework and a set of reference distributions. New hardware distributions and fancier syntax extensions are developed as out-of-tree crates and are not hosted here.
rticx-coreprovides the parser, resource-ceiling analysis (SRP), code generation for tasks/resources/init/idle, and theRticMacroBuilderAPI for chaining passes.- Compilation passes implement the
RticPasstrait and run before or after the core pass as pure syntax-to-syntax transformations. - Distributions provide the low-level hardware bindings via the
CorePassBackendtrait (and optional pass-specific backends), select which passes to use, and re-export the generated#[<distro>::app]macro.
Full user and distributor guides are available in the project wiki.
| Path | Crate / Directory | Role |
|---|---|---|
rticx-core/ |
rticx-core |
Core parser, analysis, codegen, and RticMacroBuilder. |
rticx-spsc/ |
rticx-spsc |
no_std single-producer single-consumer queue used by the software tasks pass. |
rticx-async/ |
rticx-async |
no_std async runtime: ExecSlot future storage, make_channel! macro, MPSC channels, waker infrastructure. |
compilation-passes/rticx-async-pass/ |
rticx-async-pass |
Async/Await software tasks pass: executors, message queues, spawn, spawn_from. |
compilation-passes/rticx-sw-pass/ |
rticx-sw-pass |
Vanilla software tasks pass: dispatchers, message queues, spawn, spawn_from. |
compilation-passes/rticx-auto-assign/ |
rticx-auto-assign |
Automatic core = N assignment based on shared resource usage. |
compilation-passes/rticx-deadline-pass/ |
rticx-deadline-pass |
Converts deadline = D attributes into RTICX priorities. |
distributions/rticx-cortex-m/ |
rticx-cortex-m |
Single-core Cortex-M (armv6-m and armv7-m and above) distribution. |
distributions/rticx-riscv/ |
rticx-riscv |
Single-core riscv with generic SLIC interrupt controller/ esp32c3/ esp32c6 |
distributions/rticx-rp2040/ |
rticx-rp2040 |
Raspberry Pi Pico / RP2040 dual-core Cortex-M0+ distribution. |
| Distribution | Target | Link |
|---|---|---|
rticx-cortex-m |
Single-core Cortex-M (armv6-m and armv7-m and above) | https://github.com/rticx-rs/rticx/tree/main/distributions/rticx-cortex-m |
rticx-riscv |
Single-core riscv with generic SLIC interrupt controller/ esp32c3/ esp32c6 | https://github.com/rticx-rs/rticx/tree/main/distributions/rticx-riscv |
rticx-rp2040 |
Raspberry Pi Pico / RP2040 (dual-core Cortex-M0+) | https://github.com/rticx-rs/rticx/tree/main/distributions/rticx-rp2040 |
rticx-hippo |
Single-core RISC-V Hippomenes MCU | https://github.com/rticx-rs/rticx/tree/main/distributions/rticx-hippo |
rticx-atalanta |
Single-core RISC-V Atalanta MCU | https://github.com/rticx-rs/rticx/tree/main/distributions/rticx-atalanta |
The fastest way to see the framework in action is the rticx-cortex-m QEMU playground, which exercises real Cortex-M core-peripheral
init (SysTick), a hardware task bound to the SysTick exception, and a software task on an NVIC dispatcher that acquires a shared resource
through RTIC's SRP lock.
# Prereqs: qemu-system-arm and the two Cortex-M Rust targets
sudo apt-get install -y qemu-system-arm
rustup target add thumbv7m-none-eabi thumbv6m-none-eabi
make qemu-armv7mThe examples are located in distributions/rticx-cortex-m/example-apps. You can modify them, rebuild and run on qemu: