Low level access to RISC-V processors

Ocelot: The Berkeley Out-of-Order Machine With V-EXT support

linux kernel for k3 upstream prepare

Multicore SoC based on the serv core

Communication framework for RTL simulation and emulation.

Run x86 and x86-64 games on RISC-V Linux

A runtime code generator for RISC-V

A modern x86/ARM bootloader supporting both BIOS and UEFI

CMSIS-DAP compatible wireless debugger for various ESP chips such as ESP8266, ESP32. Optional 40MHz SPI acceleration, etc. 适配多种ESP芯片的无线调试器

Open source minimal stack for the ch32 line of WCH processors, including the ch32v003, a 10¢ 48 MHz RISC-V Microcontroller - as well as many other chips within the ch32v/x line.

Acidanthera UEFI Development Kit based on EDK II edk2-stable202502

#![no-std] Rust library for serialize/deserialize IPMI / ASF / RMCP data

Home Assistant modbus integration for Sigenergy inverters such as SigenStor, Sigen PV and Sigen Hybrid.

OASIS Virtual I/O Device TC: Source code for the VIRTIO (Virtual I/O) Specification maintained by the OASIS Virtual I/O Device (VIRTIO) Technical Committee

RISC-V Online Help

RISC-V Open Source Supervisor Binary Interface — Frienldy fork emulating ISA extensions relevant to RVA22, RVB23 and RVA23

Collection of Documents related to EIC7700/P550

TEMPEST-LoRa: Cross-Technology Covert Communication

Implementation of iLnk/iLnkP2P/PPPP protocol for X5/A9 cameras

Rednex Game Boy Development System - An assembly toolchain for the Nintendo Game Boy and Game Boy Color

Small SERV-based SoC primarily for OpenMPW tapeout

SERV - The SErial RISC-V CPU

📝 An ARC assembler and interpreter written in Node.JS.

Page-per-day calendar generator for Remarkable tablet

Cramium Test SoC

A List of Free and Open Source Hardware Verification Tools and Frameworks

A debugging toolset and library for debugging embedded ARM and RISC-V targets on a separate host

Farpatch debugger software layer, backed by Black Magic

oreboot is a fork of coreboot, with C removed, written in Rust.