This repository contains my Linux builds and projects for ZYBO Zynq dev board
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Jan 22, 2017 - Tcl
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zynq-7000
Here are 9 public repositories matching this topic...
A BRAM-based digital function generator implemented in Verilog on the ZedBoard. Generates sine, square, triangular, and sawtooth waveforms using BRAM lookup tables.
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Dec 22, 2025 - Tcl
A repository of example projects for the Red Pitaya (Xilinx Zynq-7010) to complement a series of blog posts.
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Feb 13, 2022 - Tcl
A test IP that receives a packet from the NoC, increments its the payload, and sends the packet back to the source
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Jul 25, 2020 - Tcl
Zynq Book Tutorials adapted for the Digilent PYNQ-Z1
fpga zynq xilinx pynq xilinx-fpga xilinx-vivado digilent pynq-z1 zynq-7000 xilinx-zynq zynq-example-project zynq-7020 digilent-pynq-z1 zynq-book
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Feb 11, 2023 - Tcl
A demonstrator of Hermes network-on-chip communicating with the ARM processor
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Aug 10, 2020 - Tcl
A practical implementation of AXI DMA on Zynq-7000 (Cora Z7) using High-Performance (HP) Slave port. Includes a guide on polling mode configuration and manual L1/L2 cache coherency management.
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Mar 26, 2026 - Tcl
A practical implementation of AXI DMA on Zynq-7000 (Cora Z7) using High-Performance (HP) Slave port. Includes a guide on interrupt mode configuration and debug setup using ILA.
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Apr 1, 2026 - Tcl
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