zynq-7000

Here are 3 public repositories matching this topic...

AXI support for Migen/MiSoC

hdl misoc migen zynq-7000

Fpga thesis project. An intelligent hardware scheduling algorithm focused on common signal chains.

fpga zynq python3 rtl verilog systemverilog fpga-soc zynq-7000 fpga-programming

Petalinux project integrating Xilinx DPU v3.0 for Avnet Zedboard Zynq-7000 SoC

zedboard petalinux zynq-7000 dpu

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