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rtl

Here are 62 public repositories matching this topic...

Nuand / bladeRF-wiphy

bladeRF-wiphy is an open-source IEEE 802.11 compatible software defined radio VHDL modem

vhdl rtl hdl ofdm bladerf ofdm-wireless-communications 80211 dsss

Updated Apr 15, 2024
VHDL

hdl-modules

hdl-modules / hdl-modules

A collection of reusable, high-quality, peer-reviewed VHDL building blocks.

Updated Apr 6, 2026
VHDL

boxlambda

epsilon537 / boxlambda

FPGA based microcomputer sandbox for software and RTL experimentation

fpga retro rtl microcomputer

Updated Apr 8, 2026
VHDL

varunnagpaal / Digital-Hardware-Modelling

Digital Hardware Modelling using VHDL, Verilog, SystemVerilog, SystemC, HLS(C++, OpenCL)

fpga hls hardware opencl vhdl rtl verilog systemverilog systemc vlsi digital-systems digital-hardware hardware-models

Updated Feb 13, 2025
VHDL

chili-chips-ba / uberClock

Digital systems are clocked. This project is about constructing a high-Q clock by simmering an ordinary quartz crystal in a heavy numerical sauce. The best of all is that the sauce is not secret, but fully open to the public.

crystal fpga dsp rtl verilog risc-v clock-generator stratum-2

Updated Apr 8, 2026
VHDL

dominiksalvet / risc63

Custom 64-bit pipelined RISC processor

Updated Dec 8, 2025
VHDL

areberoto / Image-Conv-VHDL

Implementation of a 2D Convolutional Filter using VHDL for FPGAs.

fpga vhdl image-processing rtl convolution filters

Updated Aug 21, 2022
VHDL

dominiksalvet / limen-alpha

Dual-core 16-bit RISC processor

Updated Jul 21, 2024
VHDL

abdelazeem201 / LEON2

The LEON2 is a synthesisable VHDL model of a 32-bit processor conforming to the IEEE-1754 (SPARC V8) architecture.

arm asic fpga simulation vhdl rtl verilog systemverilog soc asic-verification asic-design

Updated May 6, 2023
VHDL

davemuscle / 96band_msa

Music spectrum analyzer implemented on a 7-series FPGA with novel DSP algorithms written in VHDL to accurately bin piano keys to frequency ranges and display in real-time

music spectrum fpga dsp matlab vhdl rtl spectrum-analyzer fast-fourier-transform fft vga cqt constant-q-transform downsampling

Updated Feb 20, 2022
VHDL

NabilChouba / luxAlgoHDL

VHDL implemetation of LUX algorithm

vhdl rtl hdl lux

Updated Mar 11, 2017
VHDL

PLC2 / Solution-StopWatch

Professional VHDL Class Solution - StopWatch

training simulation stopwatch vhdl class rtl xilinx synthesis vivado ghdl plc2

Updated Jun 2, 2022
VHDL

nselvara / HDL-Core-Library

Reusable HDL modules, packages, and testbench utilities for FPGA and ASIC development, supporting both VHDL and Verilog.

simulation vhdl rtl hdl testbenches osvvm vunit vhdl-modules vhdl-code vhdl2008 vhdl-testbench vhdl-2008 eda-playground

Updated Jan 5, 2026
VHDL

NabilChouba / tetriseAlteraVHDL

play Tetris Video game using PS2-keyboard and VGA monitor and Altera PS2 board

game fpga tetris vhdl rtl vga ps2-keyboard

Updated Mar 10, 2017
VHDL

sumio-morioka / cqpic

PIC16F84 soft-core RTL

vhdl pic rtl verilog pic16f84 softcore

Updated Jul 23, 2022
VHDL

NabilChouba / UARTrx-tx

VHDL : RS232 TX/RX - FPGA ( used for teaching full ppt included )

tutorial fpga vhdl rtl rs232

Updated Mar 9, 2017
VHDL

kenobi314159 / cellular-automaton-fpga

RTL design of Cellular Automaton for FPGA

fpga vhdl rtl cellular-automaton fpga-board hardware-software-codesign

Updated Dec 30, 2024
VHDL

dominiksalvet / tine-alpha

8-bit MISC processor with pipelining

Updated Dec 13, 2021
VHDL

nselvara / VHDL-Utils

A VHDL code base that contains Utility Packages for both HDL and Testbenches

simulation vhdl rtl hdl testbenches osvvm vunit vhdl-modules vhdl-code vhdl2008 vhdl-testbench vhdl-2008 eda-playground vhdl-2019 vhdl2019

Updated Aug 19, 2025
VHDL

KudeyarDesign / Sorcerer

Configurable RISC-V core

core vhdl riscv rtl ip risc-v

Updated Jun 18, 2020
VHDL

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