Starred repositories
Real-time MikroTik RouterOS v7 dashboard. Streams live CPU, traffic, wireless clients, DHCP, WireGuard, firewall & geo connection data direct from the router API to your browser via Socket.IO. Self…
Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核
Digital logic design tool and simulator
perf-event: a Rust interface to Linux performance monitoring
CPU timer, traces and support type for Rust to instrument code
A fork of the now-unmaintained https://gitlab.com/leogx9r/ryzen_smu with merge requests and my own updates applied.
Open-source high-performance RISC-V processor
Display, extract, and manipulate PSP firmware inside UEFI images
🦀 How to minimize Rust binary size 📦 https://github.com/johnthagen/min-sized-rust
A digital logic designer and circuit simulator.
This projects contains Veriolg code and timing analysis of a asynchronous FIFO. The README.md document is maintained, which explains every aspects of the code.
Chisel: A Modern Hardware Design Language
Very Holy Core - A HOLY CORE reimplementation in Veryl
This repository contains a RISC-V System-on-Chip (SoC) design files implemented in SystemVerilog
A Virtual Machine Monitor for modern Cloud workloads. Features include CPU, memory and device hotplug, support for running Windows and Linux guests, device offload with vhost-user and a minimal com…
Rusty wrapper for the Unified Extensible Firmware Interface (UEFI). This crate makes it easy to develop Rust software that leverages safe, convenient, and performant abstractions for UEFI functiona…
A Rust crate for cooking up terminal user interfaces (TUIs) 👨🍳🐀 https://ratatui.rs
A RISC-V Symmetric Multiprocessor(SMP) based on TileLink and can run Linux OS
A book-in-progress about the Linux kernel and its insides.
Beautiful diagnostic reporting for text-based programming languages.
Apache Kafka® compatible broker with S3, PostgreSQL, SQLite, Apache Iceberg and Delta Lake