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ciflow/xpu/4535

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Merge branch 'pytorch:main' into enable-low-bit-optim-in-xpu-ci

ciflow/xpu/4512

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[xpu][float8] changed ccl_log level to warn

ciflow/xpu/4511

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[xpu][float8] changed ccl_log level to warn

ciflow/xpu/4526

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Add more cases in intel gpu ci

ciflow/xpu/4548

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Fix XPU blockwise _scaled_mm: scale reshape + output dtype

Two related fixes for the XPU blockwise path (PerBlock[1,128] act,
PerBlock[128,128] wt) routed through torch._scaled_mm:

1. input_scale reshape: preprocess_scale flattens the 3D scale
   (1, seq, K/128) into (M*K/128, 1), and .reshape(-1, scale.shape[-1])
   was a no-op because shape[-1]==1. Use inpt_data.shape[0] to
   reconstruct the correct (M, K/128) shape.

2. output_dtype: the refactored code passed input_scale.dtype (float32
   after preprocess_scale) to _scaled_mm, producing float32 output.
   Restore input_tensor.dtype (bfloat16) to match the non-blockwise
   path and the original fe6c37f behavior.

ciflow/xpu/4530

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apply code review comments

ciflow/xpu/4524

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apply code review comments

ciflow/xpu/4523

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apply code review comments

ciflow/xpu/4384

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use torch.acceraltor.current_accelerator()

ciflow/xpu/4532

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[xpu][mx][test] Enable multicard tests for xpu

Signed-off-by: Ula Golowicz <urszula.golowicz@intel.com>