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TWRP device tree for Xiaomi 13 (fuxi)

C++ 19 9 Updated Sep 3, 2023

ChipWhisperer - the complete open-source toolchain for side-channel power analysis and glitching attacks

C 1,546 367 Updated Aug 12, 2026

RISC-V eXtension interface that provides a generalized framework suitable to implement custom coprocessors and ISA extensions

SystemVerilog 91 31 Updated Apr 1, 2026

Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.

SystemVerilog 631 170 Updated Jul 24, 2026

KT06xx系列芯片相关资料和代码收集 ( resources collection for kt06xx chips including datasheet and software )

C 42 26 Updated Jun 18, 2026

朱雀仿宋/朱雀宋朝/Zhuque Fangsong: An open-source Fangsong typeface project

3,458 49 Updated Jul 23, 2026

pYIN implementation for fundamental frequency estimation

C 32 14 Updated Jan 24, 2020

CVE-2021-4034 1day

C 2,044 507 Updated Jun 8, 2022

A webpage with utility tools for huawei routers

JavaScript 64 45 Updated Feb 13, 2021

Experiments with Antiderivative Antialiasing

C++ 125 7 Updated Nov 29, 2021

VyOS command definitions, scripts, and utilities

Python 490 450 Updated Aug 11, 2026

VST/DSSI/LV2 emulator of the YM2414, the FM synthesizer of the Yamaha DX11 and TX81Z. Warning: WIP, does not compile yet.

C++ 20 3 Updated Sep 25, 2019

A physical model of the human vocal tract using literate programming, based on Pink Trombone.

CWeb 155 13 Updated Jan 12, 2019

various tools that convert game data into MIDI files

C 144 16 Updated Jan 25, 2026

VT220-compatible console on Cyclone IV EP4CE55F23I7

SystemVerilog 43 9 Updated Jun 28, 2018

MAME

C++ 10,399 2,475 Updated Aug 13, 2026

NonTrivial-MIPS is a synthesizable superscalar MIPS processor with branch prediction and FPU support, and it is capable of booting linux.

SystemVerilog 608 101 Updated Jul 7, 2020

Windows XP themes

CSS 482 47 Updated Jan 23, 2025

JTAGulator: Assisted discovery of on-chip debug interfaces

Propeller Spin 798 115 Updated Jul 29, 2025

Ibex is a small 32-bit RISC-V CPU core with high-level of verification (previously known as zero-riscy)

SystemVerilog 2,007 785 Updated Aug 11, 2026

Addons to Code::Blocks to support Arduinos and ATtinys

Python 94 44 Updated Nov 8, 2019

PulseRain FP51 MCU, with peripherals

Verilog 17 11 Updated Mar 20, 2018

PulseRain Reindeer - RISCV RV32I[M] Soft CPU

Verilog 127 31 Updated Aug 28, 2019

PulseRain Reindeer RISC-V Soft CPU for Efinix Trion T20 BGA256 Development Kit

Verilog 9 4 Updated May 25, 2019

Markdown and LaTeX online editor - create text for web with equations and diagrams

JavaScript 384 48 Updated Feb 19, 2026

misc things

ActionScript 8 2 Updated Dec 24, 2020

RISC-V Formal Verification Framework

Verilog 633 105 Updated Apr 6, 2022

USB-Blaster instance on CH55x MCU.

C 59 24 Updated Jul 8, 2019

A directory of Western Digital’s RISC-V SweRV Cores

SystemVerilog 882 134 Updated Mar 26, 2020
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