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The main repo of Penglai Enclave based on RISC-V Trapped Virtual Memory (TVM).

Makefile 43 8 Updated Jun 5, 2023

This is the main repo for Penglai.

73 13 Updated Oct 12, 2023

Freedom U540-C000 Bootloader Code

C 5 5 Updated Aug 27, 2021

Keystone Enclave (QEMU + HiFive Unleashed)

C 536 170 Updated Aug 3, 2026

RISC-V Rocket Core on Parallella & ZedBoard Zynq FPGA Boards

SystemVerilog 109 29 Updated Nov 14, 2018

The official Linux kernel from Xilinx

C 1,554 1,616 Updated Aug 19, 2026

A small, light weight, RISC CPU soft core

Verilog 1,573 182 Updated Aug 19, 2026

Build Customized FPGA Implementations for Vivado

Java 382 132 Updated Aug 17, 2026

Pure Python PXE (DHCP-(Proxy)/TFTP/HTTP/NBD) Server

Python 564 127 Updated Feb 10, 2023

The PoC Library has been forked to github.com/VHDL/PoC. See new address below

VHDL 607 114 Updated Jul 30, 2025

FOS - FPGA Operating System

VHDL 74 13 Updated Oct 22, 2020

Migrate XAPP1292 from KC705 to VCU128, with LWIP211

C 1 Updated Oct 24, 2020

The OpenPiton Platform

Assembly 810 277 Updated Feb 25, 2026

Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)

C++ 951 312 Updated Aug 3, 2026

Framework providing operating system abstractions and a range of shared networking and memory services for common modern heterogeneous platforms.

SystemVerilog 443 119 Updated Aug 3, 2026

XLS: Accelerated HW Synthesis

C++ 1,819 269 Updated Aug 19, 2026

Random instruction generator for RISC-V processor verification

Python 1,344 391 Updated Apr 3, 2026

OpenBMC Documentation

TeX 350 321 Updated Aug 19, 2026

OpenBMC is an open software framework to build a complete Linux image for a Board Management Controller (BMC).

C 683 307 Updated Aug 19, 2026

Common SystemVerilog components

SystemVerilog 786 201 Updated Aug 19, 2026

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

SystemVerilog 1,662 367 Updated Aug 19, 2026

This is the code porting record of the xapp1292 case of Xilinx We tried to transplant part of the reconfigurable project based on tftp from the KC705 of the kintex7 platform to the VCU128 board of …

Tcl 1 Updated Aug 4, 2020

HLS-based Graph Processing Framework on FPGAs

C++ 151 32 Updated Oct 11, 2022

training labs and examples

SystemVerilog 467 178 Updated Aug 1, 2022

Berkeley's Spatial Array Generator

Scala 1,434 284 Updated Jun 30, 2026

Open Machine Learning Compiler Framework

Python 13,671 3,960 Updated Aug 19, 2026

Microarchitecture implementation of the decoupled vector-fetch accelerator

Scala 166 43 Updated Jan 25, 2024

Open source FPGA-based NIC and platform for in-network compute

Verilog 2,425 548 Updated Jul 5, 2024

Xilinx Embedded Software (embeddedsw) Development

HTML 1,225 1,148 Updated Aug 19, 2026

A fast and scalable x86-64 multicore simulator

C++ 399 193 Updated Nov 27, 2023
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