SANA: Efficient High-Resolution Image Synthesis with Linear Diffusion Transformer

OpenHPC Integration, Packaging, and Test Repo

Tools for SiFive's Freedom Platform

Extremely Simple Microbenchmarks

Microprobe: Microbenchmark generation framework

An EDA toolchain for interval thermal simulations of 2D multi-/many-cores in an open system.

Research starter kit for Armv8-A system modeling and benchmarking using the gem5 simulator (education, research)

gem5 configuration for intel's skylake micro-architecture

Spike, a RISC-V ISA Simulator

A wrapper for the SPEC CPU2006 benchmark suite.

Vim-fork focused on extensibility and usability

The official Vim repository

Working draft of the proposed RISC-V V vector extension

Verilator open-source SystemVerilog simulator and lint system

Chisel: A Modern Hardware Design Language

Rocket Chip Generator

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

SiFive's LLVM working tree

CoreMark® is an industry-standard benchmark that measures the performance of central processing units (CPU) and embedded microcrontrollers (MCU).

"DHRYSTONE" Benchmark Program by Reinhold P. Weicker

Historical versions of Reinhold P. Weicker's Dhrystone benchmark

Modeling Architectural Platform

The official repository for the gem5 computer-system architecture simulator.

Exercises for exploring the Fibertree, Timeloop and Accelergy tools

Compiler for Neural Network hardware accelerators

cuDF - GPU DataFrame Library

Distributed multigrid linear solver library on GPU

THIS REPOSITORY HAS MOVED TO github.com/nvidia/thrust

[ARCHIVED] The C++ parallel algorithms library. See https://github.com/NVIDIA/cccl