Stars
This repository contains the artifact for the paper "GTPin: Enhancing Intel GPU Profiling With High-Level Binary Instrumentation" accepted to 2026 IEEE International Symposium on Performance Analys…
A toy simulator for multi-chiplet GPU
Official code for controllable generation via logit steering
TeamKorea agent-reasoning solution for the MLSys 2026 scheduling contest (Track B)
Artifacts for "Phoenix: Rowhammer Attacks on DDR5 with Self-Correcting Synchronization" (IEEE S&P '26)
[MLSys '26] GriNNder: Breaking the Memory Capacity Wall in Full-Graph GNN Training with Storage Offloading
Tartan: Evaluating Modern GPU Interconnect via a Multi-GPU Benchmark Suite
FlexNoC: Fast and Flexible Analytical Framework for Network-on-Chip Topologies with Hybrid Arbitration
MEEP FPGA Shell project, currently supporting Alveos u280 and u55c
A novel architecture for peer-to-peer DMA between GPUs and FPGAs in datacenter environments (presented at EuroSys'26).
Reverse engineering NVIDIA SASS instruction dictionary, kernel audits and pattern recognition across GPU architectures.
Linux source code for ISCA 2020 paper "Enhancing and Exploiting Contiguity for Fast Memory Virtualization"
The Task Parallel System Composer (TaPaSCo)
Overleaf CLI, library & MCP server — pull, push, sync, compile LaTeX projects. Use from terminal, import as TypeScript library, or connect AI agents via Model Context Protocol.
Unofficial description of the CUDA assembly (SASS) instruction sets.
Nvidia Instruction Set Specification Generator