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49th ESSCIRC 2023: Lisbon, Portugal
- 49th IEEE European Solid State Circuits Conference, ESSCIRC 2023, Lisbon, Portugal, September 11-14, 2023. IEEE 2023, ISBN 979-8-3503-0420-6
- Yuying Li, Yijie Li
, Hao Li, Zhiliang Hong, Jiawei Xu:
A 11GΩ-Input-Impedance 700mVpp-Input-Signal- Range 87dB-SNDR Direct-Digitization AFE for Wearable EEG Recording. 1-4 - Tian Dong, Tianxiang Qu
A 3.5MHz-BW 128nTrms Resolution TMR Readout Using Ping-Pong Auto-Zeroing and SAR-Assisted Offset Calibration for Contactless Current Sensing. 1-4 - Renze Gan, Liangjian Lyu, Chuanjin Richard Shi:
A 7-Channel Bio-Signal Analog Front End Employing Single-End Chopping Amplifier Achieving 1.48 NEF. 5-8 - Islam Mostafa, Eva-Maria Korek
A 2.2 fA/√Hz, 120 dB Dynamic Range, 12 GΩ Hybrid Readout Interface for Various Ionic Spectroscopy Applications. 9-12 - Ying-Jie Huang, Yu-Chiao Huang, Yu-Hao Chiu, Wen-Pin Tsai, Yu-Te Liao
A 13 × W, 94 mK Resolution, CMOS PD ΔΣ M Temperature-to-Digital Converter With Power-Gating Technique. 17-20 - Peter Deaville, Bonan Zhang, Naveen Verma:
A 256-kb Fully Row/Column-parallel 22nm MRAM In-Memory-Computing Macro with Differential Readout for Robust Parallelization and Scale-up. 21-24 - Saion K. Roy, Han-Mo Ou, Mostafa Gamal Ahmed, Peter Deaville, Bonan Zhang, Naveen Verma, Pavan Kumar Hanumolu, Naresh R. Shanbhag:
Compute SNR-boosted 22 nm MRAM-based In-memory Computing Macro using Statistical Error Compensation. 25-28 - Lei Zhang
A FeFET In-Memory-Computing Core with Offset Cancellation for Mitigating Computational Errors. 29-32 - Sudarshan Sharma, Wei Chun Wang, Coleman DeLude, Minah Lee, Nael Mizanur Rahman, Narasimha Vasishta Kidambi, Justin Romberg, Saibal Mukhopadhyay:
AFE-CIM: A Current-Domain Compute-In-Memory Macro for Analog-to-Feature Extraction. 33-36 - Rishabh Sehgal, Rishab Mehra, Can Ni, Jaydeep P. Kulkarni:
Compute-MLROM: Compute-in-Multi Level Read Only Memory for Energy Efficient Edge AI Inference Engines. 37-40 - Maryam Dodangeh, Mark S. Oude Alink
A 50μW 2.45GHz Direct-Conversion RX with On-Chip LO with -84dBm Sensitivity for 1Mb/s GFSK. 41-44 - Elbert Bechthum, Erwin Allebes, Paul Mateman, Yiyu Shen, Peter Vis, Yao-Hong Liu, Christian Bachmann:
A 380μW IEEE 802.15.4z IR-UWB pulse-mixing transmitter featuring enable-locking RFDCO with extensive duty-cycling in 22nm FDSOI. 45-48 - Karim Ali Ahmed, Ruiyuan Yang, Praveenakumar Shivappa Salamani, Viveka Konandur Rajanna, Massimo Alioto:
Single-Antenna Backscattered BLE5 Transmitter with up to 97m Range, 10.6 μW Peak Power for Purely-Harvested Green Systems. 49-52 - Yunzhao Nie, Woogeun Rhee, Zhihua Wang:
A 17.3mW IEEE 802.15.4/4z Coherent Quadrature Hybrid Correlation UWB Receiver in 65nm CMOS. 53-56 - Simone Lecchi, Danilo Manstretta, Rinaldo Castello:
An Interferer-Tolerant RX with Translational Positive Feedback for 5G NR Applications Achieving 3.4 dB NF and 18 dBm OOB IIP3. 57-60 - Erik Olieman, Helmut Kranabenter, Mark Stoopman, Alberto Dei, Christophe Pinatel, Jan van Sinderen:
A worldwide-compliant 802.15.4/4z IR-UWB RFDAC transmitter in 28nm CMOS with 12dBm peak output power. 61-64 - Lorenzo Piotto
A 20mW 130-175GHz Phase Shifter with Meandered λ/2 TLINEs in BiCMOS 55nm. 65-68 - Chenxin Liu, Ibrahim Abdo, Chun Wang, Hiroyuki Sakai, Atsushi Shirane, Kenichi Okada:
A Dual-Mode Bi-Directional CMOS Mixer Using Push-Push Doubler for 300GHz-Band Transceivers. 69-72 - Dongwon Lee, Jeongsoo Park, Kyung-Sik Choi, Yuqi Liu, Hua Wang:
A 137-GHz Ultra-Wide Bandwidth High-Linearity CMOS Distributed Amplifier for High-Speed Communication. 73-76 - Everett O'Malley, James F. Buckwalter:
An Automated Approach to Power Amplifier Design Demonstrated with a SiGe Process at 140 GHz. 77-80 - Huanhuan Zhang, Alexander Lyakhov, Arvind Raghavan:
A 4nm FinFET 0.8V 13ppm/°C Switched Capacitor Based Current Mode Bandgap Reference. 81-84 - Asaf Feldman
A 0.0106 mm2 8nW Resistor-Less BJT Bandgap Reference in 65nm. 85-88 - Yimai Peng, Ashwin Bhat, Sanjay Wadhwa, David T. Blaauw, Dennis Sylvester:
A 4.6nW Subthreshold Voltage Reference with 400× Current Variation Reduction and 64-Step 0.11% Output Voltage Programmability. 89-92 - Hongyu Tian, Tianxiang Qu
A 1.9μVrms 7.7ppm/°C ADC Reference with 20mA Output Current and Single-Trim Inaccuracy of ±0.03%(3σ) from -40°C to 125°C. 93-96 - Massimo Gottardi, Luca Parmesan, Pietro Tosato, Evgeny Demenev, Enrico Manuzzato, Leonardo Gasparini:
A 500 × 500 Pixel Image Sensor with Arbitrary Number of RoIs per Frame and Image Filtering for Center of Mass Estimation. 97-100 - Rubén Gómez-Merchán, Juan A. Leñero-Bardallo, Rafael de la Rosa-Vidal
A 64×64 SPAD-based 3D Image Sensor with Adaptive Pixel Sensitivity and Asynchronous Readout. 101-104 - Massimo Gandola
A 100x100 CMOS SPAD Array with In-Pixel Correlation Techniques for Fast Quantum Ghost Imaging Applications. 105-108 - Dong-Woo Jee, Seong-Min Ko, Kishore Kasichainula, Injune Yeo
A Time-Memory-based CMOS Vision Sensor with In-Pixel Temporal Derivative Computing for Multi-Mode Image Processing. 109-112 - Haotao Lin, Haibiao Zuo, Qiaozhou Peng, Xiaojin Zhao:
A 690fJ/Bit ML-Attack-Resilient Strong PUF Based on Subthreshold Voltage Attenuator Ring with Closed-Loop Feedback. 113-116 - Fan Zhang, Wangxin He, Injune Yeo
A 65nm RRAM Compute-in-Memory Macro for Genome Sequencing Alignment. 117-120 - Xinhang Xu, Linxiao Shen, Siyuan Ye, Jiayi Wu, Zhuoyi Chen, Jihang Gao, Jiajia Cui, Yihan Zhang, Ru Huang, Le Ye:
A 12.5-ppm/°C 1.086-nW/kHz Relaxation Oscillator with Clock-Gated Discrete-Time Comparator in 22nm CMOS Technology. 121-124 - Sriram Balamurali, Giovanni Mangraviti, Zhiwei Zhong, Piet Wambacq, Jan Craninckx:
A 13-16 GHz Low-Noise Oscillator with Enhanced Tank Energy in 22-nm FDSOI. 125-128 - Shuo Tian, Xiaolong Liu:
A 18.5-to-22.4GHz Class-F23 VCO Achieving 189.1dBc/Hz FoM Without 2nd/3rd-Harmonic Tuning in 65nm CMOS. 129-132 - Yue Liang, Qin Chen, Xuexue Zhang, Xu Wu, Xiangning Fan, Lianming Li:
A Compact 240 GHz Differential Fundamental Oscillator with -94.2dBc/Hz Phase Noise and 5.4% DC-to-RF Efficiency in 22nm FDSOI. 133-136 - Japesh Vohra
A 0.4V 12b Comparator Offset Injection Assisted SAR ADC achieving 0.425 fJ/conv-step. 137-140 - Jonathan Ungethüm, Michael Pietzko, Ahmed Abdelaal, John G. Kauffman, Maurits Ortmanns:
A Chopped 6-bit 1.6 GS/s SAR ADC Utilizing Slow Decision Information in 22 nm FDSOI. 141-144 - Mingyang Gu, Yunsong Tao
A 3.7mW 11b 1GS/s Time-Interleaved SAR ADC with Robust One-Stage Correlation-Based Background Timing-Skew Calibration. 145-148 - Mathias Schulz, Stefan Keil, Simon Löhlein, Sourish Banerjee, Nicolai Simon
On the Noise Contribution of Dielectric Interfaces in Biochemical CMOS Sensor Chips. 149-152 - Y. Sprunger, L. Capua, Thomas Ernst, S. Barraud, Adrian Mihai Ionescu, A. Saeidi:
Ultra-High Sensitivity Silicon Nanowire Array Biosensor Based on a Constant-Current Method for Continuous Real-Time pH and Protein Monitoring in Interstitial Fluid. 153-156 - Baptiste Jadot, Marcos Zurita, Gérard Billiot, Yvain Thonnart, Loïck Le Guevel, Mathieu Darnas, Candice Thomas, Jean Charbonnier, Tristan Meunier, Maud Vinet, Franck Badets, Gaël Pillonnet:
A Cryogenic Active Router for Qubit Array Biasing from DC to 320 MHz at 100 nm Gate Pitch. 157-160 - Lea Schreckenberg, René Otten, Patrick Vliex
SiGe Qubit Biasing with a Cryogenic CMOS DAC at mK Temperature. 161-164 - Rob A. Damsteegt
A Benchmark of Cryo-CMOS 40-nm Embedded SRAM/DRAMs for Quantum Computing. 165-168 - Jaeho Lee, Kiseo Kang, Donggyu Minn, Jae-Yoon Sim:
A 7-10b Programmable Cryo-CMOS TI-SAR ADC for Multichannel Qubit Readout with On-Chip Background Inter-Channel Mismatch Calibrations. 169-172 - Jaya Deepthi Bandarupalli, Saurabh Saxena:
A 0.49-9.8 Gb/s 0.1-1V Output Swing Transmitter with 38.4MHz Reference and <30 ns Turn-On Time. 173-176 - Zhaoyu Zhang, Zhao Zhang, Yong Chen, Guoqing Wang, Xinyu Shen, Nan Qi, Guike Li, Shuangming Yu, Jian Liu, Nanjian Wu, Liyuan Liu:
A 0.0035-mm2 0.42-pJ/bit 8-32-Gb/s Reference-Less CDR Incorporating Adaptively-Biased ChargeSharing Integrator, Alexander PFD, and 1-Tap DFE. 177-180 - Hanho Choi, Ha-Il Song, Hyosup Won, Jun Young Yoo, Woohyun Kwon, Huxian Jin, Konan Kwon, Cheong Min Lee, Gain Kim, Jake Eu, Sean Park, Hyeon-Min Bae:
An 86.71875GHz RF transceiver for 57.8125Gb/s waveguide links with a CDR-assisted carrier synchronization loop in 28nm. 181-184 - Zhi-Jing Lin, Ti-Yu Chen, Tzi-Dar Chiueh:
A Multi-Overloading-Factor Sparse Code Multiple Access Decoder for 5G Communications. 185-188 - Shutao Zhang, Tobias Gemmeke:
A 22-nm 1,287-MOPS/W Structured Data-Path Array for Binary Ring-LWE PQC. 189-192 - Siddharth Das, McKenzie van der Hagen, Swarali Patil, Cagri Erbagci, Brandon Lucia, Ken Mai:
A 10.33 μJ/encryption Homomorphic Encryption Engine in 28nm CMOS with 4096-degree 109-bit Polynomials for Resource-Constrained IoT Clients. 193-196 - Tao Xia, Yuan Li, Liujia Song, Wei Chen, Hengwei Yu, Miao Sun, Lei Zhao, Zhihong Lin, Yuntong Tian, Hao Yan, Jiabin Meng, Yifan Wu, Yajie Qin, Xuefeng Chen, Shenglong Zhuo, Patrick Yin Chiang:
A Sub-ns Pulsed VCSEL Driver with Real-Time Adaptive Current Control, Integrated Boost Switching Regulator and Class-1 Laser Eye Safety. 197-200 - Léon Weihs, Erik Wehr, Kenny Vohl, Tobias Zekorn, Ralf Wunderlich, Stefan Heinen:
A Fully Integrated Adaptive Dead-Time Controlling Gate Driver Enabling ZVS in HV Converters. 201-204 - Zongyuan Li, Filip Tavernier:
A 10 GHz Quadruple-Tail Comparator with Double Feedforward Paths and Minimal Delay Slope in 28 nm CMOS. 205-208 - Miodrag Nikolic, Wilfried Florian, Richard Gaggl
A 125dBSPL 1%-THD, 115μA MEMS Microphone Using Passive Pre-Distortion Technique. 209-212 - Mayank Palaria, Shiyu Su, Hsiang-Chun Cheng, Rezwan A. Rasul, Qiaochu Zhang
Analog Kalman Filter with Integration and Digitization via a Shared Thyristor-Based VCO for Sensor Fusion in 65 nm CMOS. 213-216 - Moritz Scherer, Manuel Eggimann, Alfio Di Mauro, Arpan Suravi Prasad, Francesco Conti, Davide Rossi, Jorge Tomás Gómez, Ziyun Li, Syed Shakib Sarwar, Zhao Wang, Barbara De Salvo, Luca Benini:
Siracusa: A Low-Power On-Sensor RISC-V SoC for Extended Reality Visual Processing in 16nm CMOS. 217-220 - Sunwoo Lee, Jeongwoo Park, Dongsuk Jeon:
A 4.27TFLOPS/W FP4/FP8 Hybrid-Precision Neural Network Training Processor Using Shift-Add MAC and Reconfigurable PE Array. 221-224 - Fengshi Tian
BIOS: A 40nm Bionic Sensor-defined 0.47pJ/SOP, 268.7TSOPs/W Configurable Spiking Neuron-in-Memory Processor for Wearable Healthcare. 225-228 - Sohum Datta, Brian C. Richards, Harrison Liew
HDBinaryCore: A 28nm 2048-bit Hyper-Dimensional biosignal classifier achieving 25 nJ/prediction for EMG hand-gesture recognition. 229-232 - Saurav Maji, Kyungmi Lee, Cheng Gongye, Yunsi Fei, Anantha P. Chandrakasan:
An Energy-Efficient Neural Network Accelerator with Improved Protections Against Fault-Attacks. 233-236 - Paolo Lorenzi, Fausto Borghetti, Roberto Penzo, Edoardo Bezzati, Enrico Tonazzo, Maurizio Galvano:
Adaptive Output Discharge DC-DC for glare free LED front-light. 237-240 - Roberto Pio Baorda, Tommaso Rosa, Paolo Angelini, Giorgio Bosisio, Alberto Cattani:
Integrated Metal Shunt with Matched Sensing Resistor for High-Side Current Sensing. 241-244 - Ines Hurez, Vlad Anghel, Gheorghe Brezeanu:
A Negative-Gm Oscillator With Common Mode Transient Immunity Enhancements For Galvanically Isolated Gate Drivers. 245-248 - Ho-Chan Ahn
A 2 A Maximum Load Current Capable 0-to-1 μF Off-chip Capacitor N-type LDO using Dual Dynamic Negative Feedback Loop and an Improved Error Amplifier. 249-252 - Wen-Yang Hsu, Joan Aymerich, Xiaolin Yang, Chutham Sawigun, Philippe Coppejans, Carolina Mora Lopez:
A 0-to-35mA NMOS Capacitor-Less LDO with Dual-Loop Regulation Achieving 3ns Response Time and 1pF-to-10nF Loading Range. 253-256 - Xinyu Shen, Zhao Zhang, Guike Li, Yong Chen, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu:
A 4-12.1-GHz Fractional-N Ring Sampling PLL Based on Adaptively-Biased PD-Merged DTC Achieving -37.6± 0.9-dBc Integrated Phase Noise, 261.9-fs RMS Jitter, and -240.6-dB FoM. 257-260 - Hongzhuo Liu, Wei Deng, Haikun Jia, Shiwei Zhang, Shiyan Sun, Baoyong Chi:
A 4.8-GHz Time-Interleaved Multi-Reference PLL with 16.1-fs Jitter. 261-264 - Waleed Madany
A Fully Synthesizable DPLL with Background Gain Mismatch Calibrated Feedforward Phase Noise Cancellation Path. 265-268 - Andres Asprilla, Andreia Cathelin, Yann Deval:
0.45-mW 2.35-3.0 GHz Multiplying DLL with Calibration Loop in 28nm CMOS FD-SOI. 269-272 - Jiwon Shin, Joonghyun Song, Jihee Kim, Woo-Seok Choi:
A Near-Threshold Ring-Oscillator-Based ILCM with Edge-Selective Error Detector Achieving -64 dBc Reference-Spur and -239 dB FoM. 273-276 - Brendan Farley:
Software Abstraction of Next Generation Radio Access Networks. 277-280 - Rucheng Jiang, Han Wu, Kian Ann Ng, Chne-Wuen Tsai, Jerald Yoo:
A 13-bit 70MS/s SAR-Assisted 2-bit/cycle Cyclic ADC with Offset Cancellation and Slack-Borrowing Logic. 281-284 - Sumukh Prashant Bhanushali, Arindam Sanyal:
A 13.2fJ/step 74.3-dB SNDR Pipelined Noise-shaping SAR+VCO ADC. 285-288 - Mengyu Li, Shuang Song
A 1.2V 62.2dB SNDR SAR-Assisted Event-Driven Clockless Level-Crossing ADC for Time-Sparse Signal Acquisition. 289-292 - Chaoyang Xing, Yi Zhong
A 0.021mm2 92dB-SNDR 88kHz-BW Incremental Zoom ADC with 2nd-order RT-DEM and Quiet Chopping. 293-296 - Hangxing Liu
A 256-Channel In-Pixel Electrochemical Platform in CMOS for Rapid Isothermal Genetic Amplification and Screening. 297-300 - Bogdan C. Raducanu, Joan Aymerich, Wen-Yang Hsu, Patrick Hendrickx, Carolina Mora Lopez:
A 128-channel neural stimulation and recording ASIC for scalable cortical visual prosthesis. 301-304 - Linran Zhao, Raymond Stephany, Yiming Han, Parvez Ahmmed
A Wireless Multimodal Physiological Monitoring ASIC for Injectable Implants. 305-308 - Xitie Zhang, Evren F. Arkan, Coskun Tekes, Tzuhan Wang, F. Levent Degertekin, Shaolan Li:
A 1.11 mm2 Guidewire IVUS SoC with ±50°-Range Plane Wave Transmit Beamforming. 309-312 - Mohammad Javad Karimi, Catherine Dehollain, Alexandre Schmid:
A 13.56 MHz Active Rectifier with Digitally-Assisted and Delay Compensated Comparators for Biomedical Implantable Devices. 313-316 - Sheng Cheng Lee, Yu-Teng Liang, Hsing-Yen Tsai, Jia-Rui Huang, Peng-Chu Chen, Chao-Heng Liu, Yu-Tse Shih, Ke-Horng Chen, Kuo-Lin Zheng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai:
A 26nA Ultra-Low Input Current, 81nW Ultra-Low Power and 1μs Recovery Time Ultra-Fast Transient DC-DC Buck Converter for Internet-of-Things. 317-320 - You You, Ruizhi Tian, Yacong Zhang, Zhongjian Chen, Wengao Lu, Yihan Zhang:
A 15.7-V-Compliant 86% Peak Efficiency Current-Mode Stimulator With Dynamic Voltage Supply for Implantable Medical Devices. 321-324 - Hikaru Sebe, Tomohisa Okumura, Shintaro Sumi, Daisuke Kanemoto, Po-Hung Chen, Tetsuya Hirose:
Sub-30-mV-Supply, Fully Integrated Ring Oscillator Consisting of Recursive Stacking Body-Bias Inverters for Extremely Low-Voltage Energy Harvesting. 325-328 - Mingyang Gu, Yi Zhong
A 12b 1GS/s Pipelined ADC with Digital Background Calibration of Inter-stage Gain, Capacitor Mismatch, and Kick-back Errors. 329-332 - Mattias Palm, Daniele Mastantuono, Christer Jansson, Erik Backenius, Nikola Ivanisevic, Mikael Normark, Prakash Harikumar, My-Chien Yee, Andreas Leidenhed, Roland Strandberg, Sunny Sharma
A 12/16 GSps Time-Interleaved Pipelined-SAR ADC with Temperature Robust Performance at 0.75V Supply in 7nm FinFET Technology. 333-336 - Hao Deng, Phaneendra Bikkina, Esko Mikkola, Runxi Zhang, Jinghong Chen:
A 4.8 GS/s 11b Time-Interleaved TDC-Assisted SAR ADC with High-Speed Latch-based VTC. 337-340 - Soufiane Mourrane, Benoit Larras, Sylvain Clerc, Andreia Cathelin, Antoine Frappé:
A 291nW Real-Time Event-Driven Spectrogram Extraction unit in 28nm FD-SOI CMOS for Keyword Spotting Application. 341-344 - Pingcheng Dong, Zhuoyu Chen, Ke Li, Lei Chen, Kwang-Ting Cheng, Fengwei An:
A 1920×1080 129fps 4.3pJ/pixel Stereo-Matching Processor for Pico Aerial Vehicles. 345-348 - Je Yang, Sukbin Lim
JNPU: A 1.04TFLOPS Joint-DNN Training Processor with Speculative Cyclic Quantization and Triple Heterogeneity on Microarchitecture / Precision / Dataflow. 349-352 - Chao Yuan, Yuying Li, Hao Li, Yijie Li
A 49nV/√Hz 87.8dB-SNDR 4-Channel Digital Active Electrode System for Gel-Free and Motion-Tolerant Wearable EEG Acquisition. 353-356 - Soyeon Um, Jaehyuk Lee, Hoi-Jun Yoo:
A 3.8 mW 1.9 m Ω/√Hz Electrical Impedance Tomography Imaging with 28.4 M Ω High Input Impedance and Loading Calibration. 357-360 - Yung-Hua Yeh, Wei-Cheng Liu, Yi-Jie Lin, Yu-Siang Chou, Yu-Chiao Huang, Min-Hua Chang, I-Te Lin, Yen-Chi Chen, Ying-Chih Liao, Yu-Te Liao
An Electrical Impedance Spectroscopy IC with a Printable, Fractal Root Textile Sensor for Perspiration Analysis. 361-364 - Urs Hecht, Helia Ordouei, Nikolay Ledentsov Jr.
True Voltage-Mode NRZ VCSEL Transmitter enabling 60 Gbit/s at 0.37 pJ/bit in 22 nm FDSOI. 365-368 - Milad Haghi Kashani, Hossein Shakiba, Ali Sheikholeslami:
A 0.82pJ/b 50Gb/s PAM4 VCSEL Driver with 3-Tap Asymmetric FFE in 12nm CMOS FinFET Process. 369-372 - Fuzhan Chen
A 2.05-pJ/b 56-Gb/s PAM-4 VCSEL Transmitter with Piecewise Nonlinearity Compensation and Asymmetric Equalization in 40-nm CMOS. 373-376 - Zhe Liu, Chirn Chye Boon, Yangtao Dong, Kaituo Yang:
A 2.4dB NF +4.1dBm IIP3 Differential Dual-Feedforward-Based Noise-Cancelling LNTA With Complementary NMOS and PMOS Configuration. 377-380 - Mohamed Khalil Bouchoucha
A wideband sub-6GHz continuously tunable gm-boosted CG Low Noise Amplifier in 28 nm FD-SOI CMOS technology. 381-384 - Dongze Li, Wei Deng, Haikun Jia, Ruiheng Qiu, Xintao Li, Ziyuan Guo, Baoyong Chi:
A 37-to-41.8 GHz Double-Gm-Boosting LNA with 2.9-dB NFmin Using Quadruple-Coupling Transformer for Phased-Array Transceivers. 385-388 - Lucas Moura Santana
A 70MHz Bandwidth Time-Interleaved Noise-Shaping SAR Assisted Delta Sigma ADC with Digital Cross-Coupling in 28nm CMOS. 389-392 - Lingxin Meng, Junsheng Chen, Menglian Zhao, Zhichao Tan:
An 18.2μW 101.1dB DR Fully-Dynamic ΔΣ ADC with Partially-Feedback Noise-Shaping Quantizer and CLS-Embedded Two-Stage FIAs. 393-396 - Yijie Li
A 2MHz-BW 96.8dB-SNDR 98dB-SNR CT-Zoom ADC With Residue Feedforward, Redundancy and Fully LMS-Based Calibration. 397-400 - Mohamed A. Mokhtar, Omar Ismail, Patrick Vogelmann, John G. Kauffman, Maurits Ortmanns:
A 40 kS/sCalibration-Free Incremental △Σ ADC Achieving 104 dB DR and 105.7 dB SFDR. 401-404 - Jyotishman Saikia, Amitesh Sridharan, Injune Yeo
FP-IMC: A 28nm All-Digital Configurable Floating-Point In-Memory Computing Macro. 405-408 - Weijie Jiang, Pouya Houshmand, Marian Verhelst
A 16nm 128kB high-density fully digital In Memory Compute macro with reverse SRAM pre-charge achieving 0.36TOPs/mm2, 256kB/mm2 and 23. 8TOPs/W. 409-412 - Jonghyun Oh, Chuan-Tung Lin, Mingoo Seok:
D6CIM: 60.4-TOPS/W, 1.46-TOPS/mm2, 1005-Kb/mm2 Digital 6T-SRAM-Based Compute-in-Memory Macro Supporting 1-to-8b Fixed-Point Arithmetic in 28-nm CMOS. 413-416 - Mohit Gupta, Stefan Cosemans, Peter Debacker, Wim Dehaene:
A 2Mbit Digital in-Memory Computing Matrix-Vector Multiplier for DNN Inference supporting flexible bit precision and matrix size achieving 612 binary TOPS/W. 417-420 - Dewei Wang, Jonghyun Oh, Gregory K. Chen, Phil C. Knag, Ram K. Krishnamurthy, Mingoo Seok:
microASR: 32-μW Real-Time Automatic Speech Recognition Chip featuring a Bio-Inspired Neuron Model and Digital SRAM-based Compute-In-Memory Hardware. 421-424 - Adrian Gehl, Kyrylo Cherniak, Olga Kharko, Gianluca Marin, Petru Bacinski, Frank Prämaßing, Bernhard Wicht:
A 2-8V Vin 670mA Scalable Multi-Ratio SC DCDC Converter for MCU Integration in 28nm CMOS Achieving 91% Peak Efficiency. 425-428 - Tzu-Ying Wu, Shi-Jun Zeng, Tz-Wun Wang
A Hybrid Buck Converter Stacked on Auxiliary-switched-capacitor Using Analog and Digital Dynamic Voltage Scaling Techniques. 429-432 - Paolo Melillo
A Compact Wide-Input-Range Time-Domain Buck Converter with Fast Transient Response for Industrial Applications. 433-436 - Zhaoqing Wang, Mao Li
93.89% Peak Efficiency 24V-to-1V DC-DC Converter with Fast In-Situ Efficiency Tracking and Power-FET Code Roaming. 437-440 - Mao-Ling Chiu, I-Fang Lo, Tsung-Hsien Lin:
A Time-Domain CCM/DCM Current-Mode Buck Converter with a PI Compensator Incorporating an Infinite Phase Shift Delay Line. 441-444 - Morteza Tavakoli Taba, S. M. Hossein Naghavi
A 53-62 GHz Two-channel Differential 6-bit Active Phase Shifter in 55-nm SiGe Technology. 445-448 - Zheng Li, Peng Luo, Jian Pang, Qiaoyu Wang, Atsushi Shirane, Kenichi Okada:
A 24-49-GHz CMOS Area-Efficient Phase-Invariant Mixed-Type Attenuator With Capacitive Compensation for 5G New Radio. 449-452 - Jiawen Chen
A 24-to-30 GHz Series-Doherty Power Amplifier With Novel Broadband Combiner Achieving 2.5% Back-off PAE Variation in 65-nm CMOS. 453-456 - Dongyang Yan, Sehoon Park, Yang Zhang, Mark Ingels, Piet Wambacq:
A Compact K-band, Asymmetric Coupler-based, Switchless Transmit-Receive Front-End in 0.15μm GaN-on-SiC Technology. 457-460 - Ruixing He, Alireza Rouhafza
A Scalable Multi-Chip Self-Aligning Ka-Band Phased Array. 461-464 - Rui Paulo Martins:
Analog and Mixed-Signal CMOS Circuits: The emergence and leadership of a Lab, a reference Book and the future at the core of the A/D Interface in the IoE. 465-468 - Luke R. Upton, Akash Levy
EMBER: A 100 MHz, 0.86 mm2, Multiple-Bits-per-Cell RRAM Macro in 40 nm CMOS with Compact Peripherals and 1.0 pJ/bit Read Circuitry. 469-472 - Tianwen Tang, Antonio Liscidini:
A 22nm 56TOPS/W 6/8-bit Linearly-scalable R-2R Multiply-and-Accumulate Architecture with 2.2ns Latency. 473-476 - Yipeng Wang, Mengtian Yang, Shanshan Xie, Meizhi Wang, Jaydeep P. Kulkarni:
CIMGN: An Energy-efficient All-digital Compute-in-memory Graph Neural Network Processor. 477-480 - Seung-Beom Ku, Kwonhong Lee, Han-Sol Lee, Kyeongho Eom, Minju Park, Jinhyoung Kim, Cheolung Cha, Hyung-Min Lee
An RF MEMS Sensor Driver/Readout SoC with Resonant Frequency Shift and Closed-Loop Envelope Regulation for Microplastic Detection. 481-484 - Niccolò de Milleri
A 22dBA digital optical MEMS microphone. 485-488 - Ruocheng Wang, Manuj Singh, Deniz Onural, Sidney Buchbinder, Hayk Gevorgyan, Milos A. Popovic, Vladimir Stojanovic:
A Monolithically Integrated Electronic-Photonic Front-end Utilizing Micro-ring Modulators for Large-Scale mm-wave Sensing. 489-492 - Jaekyum Lee, Albert Theuwissen:
A linearity improvement method for CIS column-parallel SAR ADC using two-step conversion. 493-496 - Zheng Liu, Emir Ali Karahan, Kaushik Sengupta
Ultra Broadband Phased-Array Transmitter with Low Phase Error of 1.24-2.8° across 36-91 GHz Supporting 10.8 Gbps 64QAM in 90 nm SiGe. 497-500 - Pawan K. Khanna, Yu Zhao, Mahdi Forghani, Behzad Razavi:
A Low-Power 28-GHz Beamforming Receiver with On-Chip LO Synthesis. 501-504 - Alexandre Siligaris, A. Bossuet, L. Barrau, E. Antide, José Luis González-Jiménez, Cédric Dehos, Mykhailo Zarudniev:
Fast Chirping 58-64 GHz FMCW Radar Transceiver using D-PROT Multiplier in CMOS 45nm RFSOI for Vital Signs Detection. 505-508 - Xuyang Liu, Md Hedayatullah Maktoomi, Mahdi Alesheikh
A 49-63 GHz Phase-locked FMCW Radar Transceiver for High Resolution Applications. 509-512
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