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IRPS 2018: Burlingame, CA, USA
- IEEE International Reliability Physics Symposium, IRPS 2018, Burlingame, CA, USA, March 11-15, 2018. IEEE 2018, ISBN 978-1-5386-5479-8
- Yasunori Tateno, Yasuyo Kurachi, Hiroshi Yamamoto, Takashi Nakabayashi:
Investigation of the pulsed-IV degradation mechanism of GaN-HEMT under high temperature storage tests. 2-1 - Lucile Arnaud, Stéphane Moreau
, Amadine Jouve, Imed Jani, Didier Lattard, F. Fournel, C. Euvrard, Y. Exbrayat, Viorel Balan, Nicolas Bresson, S. Lhostis, J. Jourdon, E. Deloffre, S. Guillaumet, Alexis Farcy, Simon Gousseau, M. Arnoux:
Fine pitch 3D interconnections with hybrid bonding technology: From process robustness to reliability. 4 - Yang Xiu, Samuel Sagan, Advika Battini, Xiao Ma, Maxim Raginsky, Elyse Rosenbaum:
Stochastic modeling of air electrostatic discharge parameters. 2 - Xavier Garros, Alexandre Subirats, Gilles Reimbold, Fred Gaillard, Cheikh Diouf, X. Federspiel, Vincent Huard, M. Rafik:
A new method for quickly evaluating reversible and permanent components of the BTI degradation. 6-1 - Bhawani Shankar, Ankit Soni, Sayak Dutta Gupta
On the trap assisted stress induced safe operating area limits of AlGaN/GaN HEMTs. 4 - Chen Wu, O. Varela Pedreira
Insights into metal drift induced failure in MOL and BEOL. 3 - Christine S. Hau-Riege, Huilin Xu, You-Wen Yau, Manasi S. Kakade, Jianfeng Li, Xiaonan Zhang, Hosain Farr:
Electromigration of multi-solder ball test structures. 5 - Jifa Hao, Amartya Ghosh, Mark Rinehimer, Joe Yedinak, Muhammad Ashraful Alam:
BVDSS (drain to source breakdown voltage) instability in shielded gate trench power MOSFETs. 6 - Jae-Gyung Ahn, Ping-Chin Yeh, Jonathan Chang:
Electromigration failure rate of redundant via. 1 - Riddhi Jitendrakumar Shah, Florian Cacho, Vincent Huard, Souhir Mhira, D. Arora, Pankaj Agarwal, Shubham Kumar, S. Balaraman, Bijoy Kumar Singh, Lorena Anghel:
Investigation of speed sensors accuracy for process and aging compensation. 5 - Kai-Hsin Chuang, Erik Bury, Robin Degraeve, Ben Kaczer, T. Kallstenius, Guido Groeseneken
A multi-bit/cell PUF using analog breakdown positions in CMOS. 2-1 - Yi-Pin Fang, Anthony S. Oates:
Soft errors in 7nm FinFET SRAMs with integrated fan-out packaging. 4 - Kodai Yamada, Haruki Maruoka, Jun Furuta, Kazutoshi Kobayashi:
Sensitivity to soft errors of NMOS and PMOS transistors evaluated by latches with stacking structures in a 65 nm FDSOI process. 3-1 - Younggeun Ji, Jeonghoon Kim, Jungin Kim, Miji Lee, Jaeheon Noh, Taeyoung Jeong, Juhyeon Shin, Junho Kim, Young Heo, Ung Cho, Hyun-Chul Sagong, Junekyun Park, Yeonsik Choo, Gilhwan Do, Hoyoung Kang, Eunkyeong Choi, Dongyoon Sun, Changki Kang, Sangchul Shin, Sangwoo Pae:
Reliability characterization of advanced CMOS image sensor (CIS) with 3D stack and in-pixel DTI. 3 - Toru Sugiyama, Kohei Oasa, Yasunobu Saito, Akira Yoshioka, Takuo Kikuchi, Aya Shindome, Tatsuya Ohguro, Takeshi Hamamoto:
Evaluation methodology for current collapse phenomenon of GaN HEMTs. 3 - Anthonin Verdy, Gabriele Navarro
Carbon electrode for Ge-Se-Sb based OTS selector for ultra low leakage current and outstanding endurance. 6 - Chris Kendrick, Michael Cook, Jeff P. Gambino, T. Myers, J. Slezak, T. Hirano, T. Sano, Y. Watanabe, K. Ozeki:
Polysilicon resistor stability under voltage stress for safe-operating area characterization. 4-1 - Cameron McNairy:
Exascale fault tolerance challenge and approaches. 3 - C. S. Premachandran, Seungman Choi, Salvatore Cimino, Thuy Tran-Quinn, Lloyd Burrell, Patrick Justison:
Reliability challenges for 2.5D/3D integration: An overview. 5 - Kin P. Cheung:
SiC power MOSFET gate oxide breakdown reliability - Current status. 2 - Y. H. Liu, H. Y. Lin, C. M. Jiang, Tahui Wang, W. J. Tsai, T. C. Lu, K. C. Chen, Chih-Yuan Lu:
Investigation of data pattern effects on nitride charge lateral migration in a charge trap flash memory by using a random telegraph signal method. 6 - Kuo-Hsuan Meng, Mohamed Moosa
A case study of ESD trigger circuit: Time-out and stability. 1 - Guido T. Sasse:
Hot carrier induced TDDB in HV MOS: Lifetime model and extrapolation to use conditions. 3-1 - Sami Alghamdi
Low frequency noise in MOS2 negative capacitance field-effect transistor. 1 - Barry J. O'Sullivan, Simon Van Beek, Philippe J. Roussel, Sidharth Rao
Extended RVS characterisation of STT-MRAM devices: Enabling detection of AP/P switching and breakdown. 5-1 - James H. Stathis:
The physics of NBTI: What do we really know? 2 - Giovanni Landi
Evaluation of silicon, organic, and perovskite solar cell reliability with low-frequency noise spectroscopy. 6 - T. W. Lin, S. H. Ku, C. H. Cheng, C. W. Lee, Ijen Huang, Wen-Jer Tsai, T. C. Lu, W. P. Lu, K. C. Chen, Tahui Wang, Chih-Yuan Lu:
Chip-level characterization and RTN-induced error mitigation beyond 20nm floating gate flash memory. 6-1 - Baozhen Li, Andrew Kim, Paul McLaughlin, Barry P. Linder, Cathryn Christiansen:
Electromigration characteristics of power grid like structures. 4 - Pai-Yu Chen, Shimeng Yu
Reliability perspective of resistive synaptic devices on the neuromorphic system performance. 5 - Bhawani Shankar, Ankit Soni, Sayak Dutta Gupta
Safe Operating Area (SOA) reliability of Polarization Super Junction (PSJ) GaN FETs. 4 - Yoko Yoshimura, Kensuke Ota, Masumi Saitoh:
Hot carrier degradation, TDDB, and 1/f noise in Poly-Si Tri-gate nanowire transistor. 5 - Kirby K. H. Smithe, Zhongwei Zhu, Connor S. Bailey, Eric Pop
Investigation of monolayer MX2 as sub-nanometer copper diffusion barriers. 1 - Erik Bury, Adrian Vaisman Chasin, Ben Kaczer, Kai-Hsin Chuang, Jacopo Franco, Marko Simicic
Self-heating-aware CMOS reliability characterization using degradation maps. 2 - Srikanth Jagannathan, Kumar Abhishek, Nihaar N. Mahatme, Ender Yilmaz:
Design of aging aware 5 Gbps LVDS transmitter for automotive applications. 5 - Katja Puschkarsky
Understanding and modeling transient threshold voltage instabilities in SiC MOSFETs. 3 - Yuichiro Mitani, Yusuke Higashi
Study on mechanism of thermal curing in ultra-thin gate dielectrics. 3 - Marina Yamaguchi, Shosuke Fujii, Yuuichi Kamimuta, Shoichi Kabuyanagi, Tsunehiro Ino
Impact of specific failure mechanisms on endurance improvement for HfO2-based ferroelectric tunnel junction memory. 6 - Gilbert Sassine, Cecile Nail, Luc Tillie, Diego Alfaro Robayo, Alexandre Levisse, Carlo Cagli, Khalil El Hajjam, Jean-Francois Nodin, Elisa Vianello, Mathieu Bernard, Gabriel Molas, Etienne Nowak
Sub-pJ consumption and short latency time in RRAM arrays for high endurance applications. 2-1 - Thibault Kempf, Vincenzo Della Marca, L. Baron, F. Maugain, Francesco La Rosa, Stephan Niel, Arnaud Régnier, Jean-Michel Portal, Pascal Masson:
Threshold voltage bitmap analysis methodology: Application to a 512kB 40nm Flash memory test chip. 6 - Seungman Choi, Cathryn Christiansen, Linjun Cao, James Zhang, Ronald Filippi, Tian Shen, Kong Boon Yeap, Sean P. Ogden, Haojun Zhang, Bianzhu Fu, Patrick Justison:
Effect of metal line width on electromigration of BEOL Cu interconnects. 4 - Philippe Nivelle, Tom Borgers, Eszter Voroshazi
Mechanical and chemical adhesion at the encapsulant interfaces in laminated photovoltaic modules. 6 - C. Zhou, Keith A. Jenkins, P. I. Chuang, Christos Vezyrtzis:
Effect of HCI degradation on the variability of MOSFETS. 1 - Subramanian S. Iyer, Adeel Ahmad Bajwa:
Reliability challenges in advance packaging. 4 - Nirmal R. Saxena, Sanu Mathew, Krishna Saraswat:
Keynote 1: The road to resilient computing in autonomous driving is paved with redundancy. 1-3 - Pengyu Wei, Javad Meiguni, David J. Pommerenke
System-level design for ESD protection on multiple IO interfaces. 2 - Yiming Qu, Ran Cheng, Wei Liu, Junkang Li, Bich-Yen Nguyen, Olivier Faynot, Nuo Xu, Bing Chen, Yi Zhao:
Effect of measurement speed (μs-800 ps) on the characterization of reliability behaviors for FDSOI nMOSFETs. 6 - Jiejie Zhu, Bin Hou, Lixiang Chen, Qing Zhu, Ling Yang, Xiaowei Zhou, Peng Zhang, Xiaohua Ma, Yue Hao:
Threshold voltage shift and interface/border trapping mechanism in Al2O3/AlGaN/GaN MOS-HEMTs. 1 - Chia-Chi Fan, Chun-Yuan Tu, Ming-Huei Lin, Chun-Yen Chang, Chun-Hu Cheng, Yen-Liang Chen, Guan-Lin Liou, Chien Liu, Wu-Ching Chou, Hsiao-Hsuan Hsu:
Interface engineering of ferroelectric negative capacitance FET for hysteresis-free switch and reliability improvement. 8-1 - Alberto Castellazzi
Single pulse short-circuit robustness and repetitive stress aging of GaN GITs. 4 - Ferdinando Iucolano, Antonino Maurizio Parisi, Santo Reina, Alessandro Chini:
A novel GaN HEMT degradation mechanism observed during HTST test. 4-1 - F. Griggio, James Palmer, F. Pan, N. Toledo, Anthony Schmitz, Ilan Tsameret, R. Kasim, Gerald S. Leatherman, Jeffery Hicks, A. Madhavan, J. Shin, J. Steigerwald, A. Yeoh, C. Auth:
Reliability of dual-damascene local interconnects featuring cobalt on 10 nm logic technology. 6 - Balaji Narasimham, Tim Wu, Jung K. Wang, Bruce Conway:
Evaluation of the system-level SER performance of gigabit ethernet transceiver devices. 4 - SangHoon Shin, Yen-Pu Chen, Woojin Ahn, Honglin Guo, Byron Williams, Jeff West, Tom Bonifield, Dhanoop Varghese, Srikanth Krishnan, Muhammad Ashraful Alam:
High voltage time-dependent dielectric breakdown in stacked intermetal dielectrics. 9-1 - Junji Senzaki, Shohei Hayashi, Yoshiyuki Yonezawa, Hajime Okumura:
Challenges to realize highly reliable SiC power devices: From the current status and issues of SiC wafers. 3 - Kurt J. Lezon, Shi-Jie Wen, Y.-F. Dan, Richard Wong, Bharat L. Bhuva:
Single-event effects on optical transceiver. 6-1 - M. Rafik, A. P. Nguyen, Xavier Garros, M. Arabi, X. Federspiel, Cheikh Diouf:
AC TDDB extensive study for an enlargement of its impact and benefit on circuit lifetime assessment. 4 - Philippe J. Roussel, Adrian Vaisman Chasin, Steven Demuynck, Naoto Horiguchi, Dimitri Linten, Anda Mocuta:
New methodology for modelling MOL TDDB coping with variability. 3 - Jia Hao Lim, Nagarajan Raghavan
Area and pulsewidth dependence of bipolar TDDB in MgO magnetic tunnel junction. 6 - Akin Akturk, James McGarrity, Neil Goldsman, Daniel J. Lichtenwalner
The effects of radiation on the terrestrial operation of SiC MOSFETs. 2 - David Z. Gao, Jack Strand
Role of electron and hole trapping in the degradation and breakdown of SiO2 and HfO2 films. 5 - Vamsi Putcha, Jacopo Franco, Abhitosh Vais
Impact of slow and fast oxide traps on In0.53Ga0.47As device operation studied using CET maps. 5 - Pin-Shiang Chen, Shou-Chung Lee, A. S. Oates, Chee Wee Liu:
BEOL TDDB reliability modeling and lifetime prediction using critical energy to breakdown. 6 - Ayanori Ikoshi, Masahiro Toki, Hiroto Yamagiwa, Daijiro Arisawa, Masahiro Hikita, Kazuki Suzuki, Manabu Yanagihara, Yasuhiro Uemoto, Kenichiro Tanaka, Tetsuzo Ueda
Lifetime evaluation for Hybrid-Drain-embedded Gate Injection Transistor (HD-GIT) under practical switching operations. 4 - Kangwook Lee:
High-density fan-out technology for advanced SiP and 3D heterogeneous integration. 4 - Krzysztof Domanski:
Latch-up in FinFET technologies. 2 - Riccardo Mariani:
An overview of autonomous vehicles safety. 6 - Kento Kakikawa, Yuji Yamagishi
Charge state evaluation of passivation layers for silicon solar cells by scanning nonlinear dielectric microscopy. 1 - Ahmad Khan
Modified transformerless dual buck inverter with improved lifetime for PV applications. 6 - C. Monachon, Marcin Stefan Zielinski, J. Berney
Cathodoluminescence spectroscopy for failure analysis and process development of GaN-based microelectronic devices. 6 - Jacopo Franco, Ben Kaczer, Adrian Vaisman Chasin, Erik Bury, Dimitri Linten:
Hot electron and hot hole induced degradation of SiGe p-FinFETs studied by degradation maps in the entire bias space. 5 - Sofie Beyne, Shibesh Dutta, Olalla Varela Pedreira
The first observation of p-type electromigration failure in full ruthenium interconnects. 6 - Rajat Sinha
On the ESD behavior of a-Si: H based thin film transistors: Physical insights, design and technological implications. 3 - Jeff Peter Gambino, H. Soleimani, I. Rahim, B. Riebeek, L. Sheng, G. Hosey, H. Truong, Gavin D. R. Hall, R. Jerome, D. Price:
Device reliability for CMOS image sensors with backside through-silicon vias. 5 - Jay Sarkar, Cory Peterson, Amir Sanayei:
Machine-learned assessment and prediction of robust solid state storage system reliability physics. 3 - Arno Stockman, Eleonora Canato, Alaleh Tajalli, Matteo Meneghini
On the origin of the leakage current in p-gate AlGaN/GaN HEMTs. 4 - Anapathur V. Ramesh, Shilpa M. Reddy, Dan K. Fitzsimmons:
Airplane system design for reliability and quality. 3 - Pengpeng Ren, Changze Liu, Sanping Wan, Jiayang Zhang, Zhuoqing Yu, Nie Liu, Yongsheng Sun, Runsheng Wang, Canhui Zhan, Zhenghao Gan, Waisum Wong, Yu Xia, Ru Huang:
New insights into the HCI degradation of pass-gate transistor in advanced FinFET technology. 3-1 - Andy Fenner, Mark Porter, Randy Crutchfield:
Making the connection between physics of failure and system-level reliability for medical devices. 6 - Yi Ching Ong, Shou-Chung Lee, A. S. Oates:
Percolation defect nucleation and growth as a description of the statistics of electrical breakdown for gate, MOL and BEOL dielectrics. 7-1 - Omar Chihani, Loic Théolier
Temperature and voltage effects on HTRB and HTGB stresses for AlGaN/GaN HEMTs. 2-1 - Fernando L. Aguirre
Impact of forming gas annealing on the degradation dynamics of Ge-based MOS stacks. 3-1 - Taiki Uemura, Soonyoung Lee, Dahye Min, Ihlhwa Moon, Jungman Lim, Seungbae Lee, Hyun-Chul Sagong, Sangwoo Pae:
Investigation of alpha-induced single event transient (SET) in 10 nm FinFET logic circuit. 1 - Hyunjin Kim, Minjung Jin, Hyun-Chul Sagong, Jinju Kim, Ukjin Jung, Minhyuck Choi, Junekyun Park, Sangchul Shin, Sangwoo Pae:
A systematic study of gate dielectric TDDB in FinFET technology. 4 - Yu Zhou, Diing Shenp Ang, Pranav Sairam Kalaga, Sankara Rao Gollu:
Oxide breakdown path for optical sensing at the nanoscale level. 8-1 - Miaomiao Wang, Richard G. Southwick, Kangguo Cheng, James H. Stathis:
Lateral profiling of HCI induced damage in ultra-scaled FinFET devices with Id-Vd characteristics. 6 - Marta Pedro
Device variability tolerance of a RRAM-based self-organizing neuromorphic system. 4-1 - Miky Lee, K. Kim, D. Lim, D. Cho, Ck. Han:
Weibull cumulative distribution function (CDF) analysis with life expectancy endurance test result of power window switch. 1 - Sol-Kyu Lee, Kyung-Tae Jang, Seol-Min Yi, Young-Chang Joo:
Successive breakdown mode of time-dependent dielectric breakdown for Cu interconnects and lifetime enhancement under dynamic bias stress. 4 - Yasuyo Kurachi, Hiroshi Yamamoto, Yukinori Nose, Satoshi Shimizu, Yasunori Tateno, Takumi Yonemura, Masato Furukawa:
Failure mode analysis of GaN-HEMT under high temperature operation. 3-1 - Daniel J. Lichtenwalner
Reliability studies of SiC vertical power MOSFETs. 2 - William Vandendaele, Xavier Garros, Thomas Lorin, Erwan Morvan, A. Torres, René Escoffier
A novel insight of pBTI degradation in GaN-on-Si E-mode MOSc-HEMT. 4 - Anisur Rahman, Javier Dacuña, Pinakpani Nayak, Gerald S. Leatherman, Stephen Ramey:
Reliability studies of a 10nm high-performance and low-power CMOS technology featuring 3rd generation FinFET and 5th generation HK/MG. 6 - Andrea Padovani, Luca Larcher:
Time-dependent dielectric breakdown statistics in SiO2 and HfO2 dielectrics: Insights from a multi-scale modeling approach. 3 - Andrew Kim, Baozhen Li, Barry P. Linder:
Transient self-heating modeling and simulations of back-end-of-line interconnects. 2-1 - P. C. Su, C. M. Jiang, C. W. Wang, Tahui Wang:
Correlation between SET-state current level and read-disturb failure time in a resistive switching memory. 1 - Xianhu Liang, Bin Yuan, Yuanyuan Shi
Enhanced reliability of hexagonal boron nitride dielectric stacks due to high thermal conductivity. 6-1 - C. Chung, D. Kobayashi, K. Hirose:
Threshold ion parameters of line-type soft-errors in biased thin-BOX SOI SRAMs: Difference between sensitivities to terrestrial and space radiation. 4 - I. K. Chen, S. C. Chen, S. Mukhopadhyay, D. S. Huang, J. H. Lee, Y. S. Tsai, Ryan Lu, Jun He:
The physical mechanism investigation of off-state drain bias TDDB and its implication in advance HK/MG FinFETs. 4 - D. S. Huang, J. H. Lee, Y. S. Tsai, Y. F. Wang, Y. S. Huang, C. K. Lin, Ryan Lu, Jun He:
Comprehensive device and product level reliability studies on advanced CMOS technologies featuring 7nm high-k metal gate FinFET transistors. 6 - Andreas Graff, Michél Simon-Najasek, David Poppitz, Frank Altmann
Physical failure analysis methods for wide band gap semiconductor devices. 3 - Gyusung Park, Minsu Kim, Chris H. Kim, Bongjin Kim, Vijay Reddy:
All-digital PLL frequency and phase noise degradation measurements using simple on-chip monitoring circuits. 5 - Heejin Kim, Hayeon Shin, Jiyoung Park, Youngtae Choi, Jongwoo Park:
Statistical modeling and reliability prediction for transient luminance degradation of flexible OLEDs. 3 - Pradeep Lall, Kazi Mirza, David Locker:
Prognostics health management of electronic systems - A reliability physics approach. 6 - Tian Shen, Kong Boon Yeap, Sean P. Ogden, Cathryn Christiansen, Patrick Justison:
New insight on TDDB area scaling methodology of non-Poisson systems. 1 - Ernest Y. Wu, Andrew Kim, Baozhen Li, James H. Stathis:
Elapsed-time statistics of successive breakdown in the presence of variability for dielectric breakdown in BEOL/MOL/FEOL applications. 3 - Mariappan Murugesan, Takafumi Fukushima
Intra- and inter-chip electrical interconnection formed by directed self assembly of nanocomposite containing diblock copolymer and nanometal. 4 - Ming-Yi Lee, T.-Y. Chang, W.-F. Hsueh, Li-Kuang Kuo, Ding-Jhang Lin, Yen-Hai Chao, U. J. Tzeng, Chih-Yuan Lu:
Electrical method to localize the high-resistance of nanoscale CoSi2 word-line for OTP memories. 6 - André Clausner, Simon Schlipf, Gottfried Kurz, Michael Otto, Jens Paul, Kay-Uwe Giering
Analysis of 28 nm SRAM cell stability under mechanical load applied by nanoindentation. 5 - Deniz Kocaay, Philippe Roussel, Kristof Croes, Ivan Ciofi, Alicja Lesniewska, Ingrid De Wolf:
Method to assess the impact of LER and spacing variation on BEOL dielectric reliability using 2D-field simulations for <20nm spacing. 10-1 - Vincent Huard, Cheikh Ndiaye, M. Arabi, Narendra Parihar, X. Federspiel, Souhir Mhira, S. Mahapatra, Alain Bravaix
Key parameters driving transistor degradation in advanced strained SiGe channels. 4-1 - R. E. Stahbush, Nadeemullah A. Mahadik:
Defects affecting SiC power device reliability. 2 - Timothy J. Silverman, Steve Johnston:
Permanent shunts from passing shadows: Reverse-bias damage in thin-film photovoltaic modules. 6 - Yu-Lin Chu, Hsi-Yu Kuo, Sheng-Fu Hsu, Yung-Sheng Tsai, Ming-Yi Wang, Chuan-Li Chang, Bill Kiang, Kenneth Wu:
A new mechanism of signal path charging damage across separated power domain deep N-Well interface. 6 - H. Zhang, H. Jiang, M. R. Eaker, Kurt J. Lezon, Balaji Narasimham, Nihaar N. Mahatme, Lloyd W. Massengill, Bharat L. Bhuva:
Evaluation on flip-flop physical unclonable functions in a 14/16-nm bulk FinFET technology. 1 - Matthias Kraatz, Christoph Sander
Analysis of electromigration-induced backflow stresses in Cu(Mn) interconnects using high statistical sampling. 4 - Chen-Yi Su, M. Armstrong, Lei Jiang, S. A. Kumar, C. D. Landon, S. Liu, Inanc Meric, K. W. Park, Leif Paulson, K. Phoa, Bernhard Sell, Jihan Standfest, Ketul B. Sutaria, J. Wan, D. Young, Stephen Ramey:
Transistor reliability characterization and modeling of the 22FFL FinFET technology. 6 - Shouhei Fukuyama, Kazuki Maeda, Shinpei Matsuda, Ken Takeuchi, Ryutaro Yasuhara:
Suppression of endurance-stressed data-retention failures of 40nm TaOx-based ReRAM. 4-1 - Kristof Croes, Vladimir Cherman, Melina Lofrano, Houman Zahedmanesh, Luka Kljucar, Mario Gonzalez, Ingrid De Wolf
Stress mitigation of 3D-stacking/packaging induced stresses. 4 - Akinobu Teramoto
Reliability of MgO in magnetic tunnel junctions formed by MgO sputtering and Mg oxidation. 4-1 - Amit A. Kale, Amit Marathe, Ajay Kamath:
Machine learning based dynamic cause maps for condition monitoring and life estimation. 3 - H. Jiang, H. Zhang, Balaji Narasimham, Lloyd W. Massengill, Bharat L. Bhuva:
Designing soft-error-aware circuits with power and speed optimization. 5-1 - Franco Stellari, Alan J. Weger, Keith A. Jenkins, Giuseppe La Rosa, Barry P. Linder, Peilin Song:
Estimating transistor channel temperature using time-resolved and time-integrated NIR emission. 6 - Brian Kosinski, Ken Dodson:
Key attributes to achieving > 99.99 satellite availability. 6 - Karine Florent, A. Subirats, Simone Lavizzari, Robin Degraeve, Umberto Celano
Investigation of the endurance of FE-HfO2 devices by means of TDDB studies. 6 - P. Srinivasan, Rakesh Ranjan, S. Cimino, A. Zainuddin, B. Kannan, L. Pantisano, I. Mahmud, G. Dilliway, Tanya Nigam:
Understanding gate metal work function (mWF) impact on device reliability - A holistic approach. 6 - Guido Quax, Theo Smedes:
An integral injector-victim current transfer model for latchup design rule optimization. 2 - Kalparupa Mukherjee
Comprehensive study into underlying mechanisms of anomalous gate leakage degradation in GaN high electron mobility transistors. 4 - Wen Liu, Andreas Kerber, Fernando Guarin, Claude Ortolland:
Cap layer and multi-work-function tuning impact on TDDB/BTI in SOI FinFET devices. 2 - Yunlong Li, Michele Stucchi, Stefaan Van Huylenbroeck, Geert Van der Plas, Gerald Beyer, Eric Beyne
TSV process-induced MOS reliability degradation. 5 - Dimitris P. Ioannou, Y. Tan, R. Logan, K. Bandy, R. Achanta, P. C. Wang, Dave Brochu, M. Jaffe:
Hot carrier effects on the RF performance degradation of nanoscale LNA SOI nFETs. 2-1 - Milova Paul, Boeila Sampath Kumar, Harald Gossner
Contact and junction engineering in bulk FinFET technology for improved ESD/latch-up performance with design trade-offs and its implications on hot carrier reliability. 3 - Wanki Kim, SangBum Kim
Reliability benefits of a metallic liner in confined PCM. 6 - Shaofeng Guo, Zhenghan Lin, Runsheng Wang, Zexuan Zhang, Zhe Zhang, Yangyuan Wang, Ru Huang:
Investigation on the amplitude coupling effect of random telegraph noise (RTN) in nanoscale FinFETs. 6-1 - Grant Walters, Paul Chojecki, Alexandra Garraud
High-temperature and high-field cycling reliability of PZT films embedded within 130 nm CMOS. 3-1 - Pradeep Lall, Hao Zhang, Rahul Lall:
PHM of state-of-charge for flexible power sources in wearable electronics with EKF. 2-1 - Alok Ranjan
Mechanism of soft and hard breakdown in hexagonal boron nitride 2D dielectrics. 4 - Victor M. van Santen
Weighted time lag plot defect parameter extraction and GPU-based BTI modeling for BTI variability. 6-1 - Yury Yu. Illarionov
Reliability of next-generation field-effect transistors with transition metal dichalcogenides. 5 - Donghyuk Yun
Study of TID effects on one row hammering using gamma in DDR4 SDRAMs. 2-1 - Hui Jiang, H. Zhang, R. C. Harrington, J. A. Maharrey, J. S. Kauppila, Lloyd W. Massengill, Bharat L. Bhuva:
Impact of supply voltage and particle LET on the soft error rate of logic circuits. 4 - Soo Cheol Kang
Reliability characteristics of MIM capacitor studied with ΔC-F characteristics. 5-1 - D. Singh, Oscar D. Restrepo
Bottom-up methodology for predictive simulations of self-heating in aggressively scaled process technologies. 6 - Eduard Cartier, Martin M. Frank, Takashi Ando, John Rozen, Vijay Narayanan
PBTI in InGaAs MOS capacitors with Al2O3/HfO2/TiN gate stacks: Interface-state generation. 5 - M. Arabi, A. Cros, X. Federspiel, Cheikh Ndiaye, Vincent Huard, M. Rafik:
Modeling self-heating effects in advanced CMOS nodes. 3-1 - Mingoo Seok, Peter R. Kinget
Recent advances in in-situ and in-field aging monitoring and compensation for integrated circuits: Invited paper. 5 - Roberta Bottini, Andrea Ghetti
Non-poissonian behavior of hot carrier degradation induced variability in MOSFETs. 6 - S. E. Liu, G. Y. Chen, M. K. Chen, David Yen, W. A. Kuo, C. S. Fu, Y. S. Tsai, M. Z. Lin, Y. H. Fang, M. J. Lin:
Fast chip aging prediction by product-like VMIN drift characterization on test structures. 3 - Sachin Nadig, Amit Lal:
In-situ calibration Of MEMS inertial sensors for long-term reliability. 3 - Vincent Huard, Souhir Mhira, A. Barclais, X. Lecocq, F. Raugi, M. Cantournet, Alain Bravaix
Managing electrical reliability in consumer systems for improved energy efficiency. 3 - Yun Li, K. L. Wang, Shaoyan Di, Peng Huang, Gang Du, Xiao-Yan Liu:
PBTI evaluation of In0.65Ga0.35As/In0.53Ga0.47As nanowire FETs with Al2O3 and LaAlO3 gate dielectrics. 7-1 - Tibor Grasser, Bernhard Stampfer
Characterization and physical modeling of the temporal evolution of near-interfacial states resulting from NBTI/PBTI stress in nMOS/pMOS transistors. 2 - Hyun-Chul Sagong, Hyunjin Kim, Seungjin Choo, Sungyoung Yoon, Hyewon Shim, Sangsu Ha, Tae-Young Jeong, Minhyeok Choe, Junekyun Park, Sangchul Shin, Sangwoo Pae:
Effects of Far-BEOL anneal on the WLR and product reliability characterization of FinFET process technology. 6 - Chih-Yi Yang, Tian-Li Wu
Investigation of degradation phenomena in GaN-on-Si power MIS-HEMTs under source current and drain bias stresses. 5-1 - Kaustubh Joshi
Study of dynamic TDDB in scaled FinFET technologies. 5-1 - Maria Ruzzarin
Degradation of vertical GaN FETs under gate and drain stress. 4 - Antoine Laurent, Xavier Garros, Sylvain Barraud, J. Pelloux-Prayer
Performance & reliability of 3D architectures (πfet, Finfet, Ωfet). 6 - Souhir Mhira, Vincent Huard, D. Arora, Philippe Flatresse, Alain Bravaix
Resilient automotive products through process, temperature and aging compensation schemes. 3 - Seongwon Jeong, Jinseok Kim, Ayoung Kim, Byungwook Kim, Moonsoo Lee, Jaewon Chang, In Hak Baick, Hanbyul Kang, Younggeun Ji, Sangchul Shin, Sangwoo Pae:
Optimal design of dummy ball array in wafer level package to improve board level thermal cycle reliability (BLR). 3 - Rania Lajmi, Florian Cacho, O. David, Jean-Pierre Blanc, Emmanuel Rouat, Sébastien Haendler, Ph. Benech, Estelle Lauga-Larroze, Sylvain Bourdel:
Reliability assessment of 4GSP/s interleaved SAR ADC. 5-1 - J. W. McPherson:
Brief history of JEDEC qualification standards for silicon technology and their applicability(?) to WBG semiconductors. 3 - Narendra Parihar, Souvik Mahapatra:
Prediction of NBTI stress and recovery time kinetics in Si capped SiGe p-MOSFETs. 5-1 - Shinji Yokogawa
Reliability evaluation of defect accounted time-dependent dielectric breakdown with competing-mixture distribution. 2-1 - Shun Suzuki, Yoshiaki Deguchi
Error elimination ECC by horizontal error detection and vertical-LDPC ECC to increase data-retention time by 230% and acceptable bit-error rate by 90% for 3D-NAND flash SSDs. 7-1 - Peter C. Paliwoda, Zakariae Chbili, A. Kerber, D. Singh, Durga Misra:
Ambient temperature and layout impact on self-heating characterization in FinFET devices. 6 - Mitsuhiko Igarashi, Yuuki Uchida, Yoshio Takazawa, Yasumasa Tsukamoto, Koji Shibutani, Koji Nii:
Study of impact of BTI's local layout effect including recovery effect on various standard-cells in 10nm FinFET. 1 - Nagothu Karmel Kranthi, Abhishek Mishra, Adil Meersha, Harsha B. Variar, Mayank Shrivastava:
Defect-Assisted Safe Operating Area Limits and High Current Failure in Graphene FETs. 3 - Chao-Kun Hu, James J. Kelly, Huai Huang
Future on-chip interconnect metallization and electromigration. 4 - Devyani Patra, Ahmed Kamal Reza, Mehdi Katoozi, Ethan H. Cannon, Kaushik Roy, Yu Cao
Accelerated BTI degradation under stochastic TDDB effect. 5 - Balaji Narasimham, Saket Gupta, Daniel S. Reed, J. K. Wang, Nick Hendrickson, Hasan Taufique:
Scaling trends and bias dependence of the soft error rate of 16 nm and 7 nm FinFET SRAMs. 4 - Lesly Endrinal, Rakesh Kinger, Lavakumar Ranganathan, Amit Sheth:
Solving critical issues in 10nm technology using innovative laser-based fault isolation and DFT diagnosis techniques. 6
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