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Huazhong Yang
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2020 – today
- 2024
- [j183]Jinshan Yue
, Yongpan Liu
An Energy-Efficient Computing-in-Memory NN Processor With Set-Associate Blockwise Sparsity and Ping-Pong Weight Update. IEEE J. Solid State Circuits 59(5): 1612-1627 (2024) - [j182]Guodong Yin
Cramming More Weight Data Onto Compute-in-Memory Macros for High Task-Level Energy Efficiency Using Custom ROM With 3984-kb/mm2 Density in 65-nm CMOS. IEEE J. Solid State Circuits 59(6): 1912-1925 (2024) - [j181]Shengzhe Yan
A 28-nm Floating-Point Computing-in-Memory Processor Using Intensive-CIM Sparse-Digital Architecture. IEEE J. Solid State Circuits 59(8): 2630-2643 (2024) - [j180]Xiaoyu Feng
A 28-nm Energy-Efficient Sparse Neural Network Processor for Point Cloud Applications Using Block-Wise Online Neighbor Searching. IEEE J. Solid State Circuits 59(9): 3070-3081 (2024) - [j179]Ruoyang Liu
A Dynamic Execution Neural Network Processor for Fine-Grained Mixed-Precision Model Training Based on Online Quantization Sensitivity Analysis. IEEE J. Solid State Circuits 59(9): 3082-3093 (2024) - [j178]Xinyi Yang
Active Neural Topological Mapping for Multi-Agent Exploration. IEEE Robotics Autom. Lett. 9(1): 303-310 (2024) - [j177]Jingyu Wang
ULSeq-TA: Ultra-Long Sequence Attention Fusion Transformer Accelerator Supporting Grouped Sparse Softmax and Dual-Path Sparse LayerNorm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(3): 892-905 (2024) - [j176]Lu Zhang
RE-Specter: Examining the Architectural Features of Configurable CNN With Power Side-Channel. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(10): 2916-2929 (2024) - [j175]Jialong Liu
TFT-Based Near-Sensor In-Memory Computing: Circuits and Architecture Perspectives of Large-Area eDRAM and ROM CiM Chips. IEEE Trans. Circuits Syst. I Regul. Pap. 71(2): 620-633 (2024) - [j174]Dingchang Hu
Query-Guided Support Prototypes for Few-Shot 3D Indoor Segmentation. IEEE Trans. Circuits Syst. Video Technol. 34(6): 4202-4213 (2024) - [j173]Shiyao Li
Toward High-Accuracy and Real-Time Two-Stage Small Object Detection on FPGA. IEEE Trans. Circuits Syst. Video Technol. 34(9): 8053-8066 (2024) - [j172]Yiming Chen, Mingyen Lee, Guohao Dai, Mufeng Zhou, Nagadastagiri Challapalle, Tianyi Wang, Yao Yu, Yongpan Liu, Yu Wang, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li:
GRAPHIC: Gather and Process Harmoniously in the Cache With High Parallelism and Flexibility. IEEE Trans. Emerg. Top. Comput. 12(1): 84-96 (2024) - [j171]Pengcheng Zhang
Wireless Power Transfer-Based Voltage Equalizer for Scalable Cell-String Charging. IEEE Trans. Ind. Electron. 71(1): 493-503 (2024) - [j170]Lizhou Liu
A Highly Scalable Integrated Voltage Equalizer Based on Parallel-Transformers for High-Voltage Energy Storage Systems. IEEE Trans. Ind. Electron. 71(1): 595-603 (2024) - [j169]Taixin Li
ProtFe: Low-Cost Secure Power Side-Channel Protection for General and Custom FeFET-Based Memories. ACM Trans. Design Autom. Electr. Syst. 29(1): 3:1-3:18 (2024) - [j168]Jianfeng Wang
A Module-Level Configuration Methodology for Programmable Camouflaged Logic. ACM Trans. Design Autom. Electr. Syst. 29(2): 39:1-39:31 (2024) - [c366]Jiayu Chen, Zelai Xu, Yunfei Li, Chao Yu, Jiaming Song, Huazhong Yang, Fei Fang, Yu Wang, Yi Wu:
Accelerate Multi-Agent Reinforcement Learning in Zero-Sum Games with Subgame Curriculum Learning. AAAI 2024: 11320-11328 - [c365]Yiming Chen, Guodong Yin, Hongtao Zhong, Mingyen Lee, Huazhong Yang, Sumitha George, Vijaykrishnan Narayanan, Xueqing Li:
ZEBRA: A Zero-Bit Robust-Accumulation Compute-In-Memory Approach for Neural Network Acceleration Utilizing Different Bitwise Patterns. ASPDAC 2024: 153-158 - [c364]Kai Zhong
FEASTA: A Flexible and Efficient Accelerator for Sparse Tensor Algebra in Machine Learning. ASPLOS (3) 2024: 349-366 - [c363]Xiaoyu Feng, Wenyu Sun, Xinyuan Lin, Shupei Fan, Huazhong Yang, Yongpan Liu:
A 28nm 1.2GHz 5.27TOPS/W Scalable Vision/Point Cloud Deep Fusion Processor with CAM-based Universal Mapping Unit for BEVFusion Applications. CICC 2024: 1-2 - [c362]Chengyu Huang, Kezhuo Ma, Sihao Chen, Jiaxuan Fan, Nan Sun, Huazhong Yang, Xueqing Li:
A 16-bit 10-GS/s Calibration-Free DAC Achieving <-77dBc IM3 up to 4.95GHz in 28nm CMOS. CICC 2024: 1-2 - [c361]Guodong Yin, Yiming Chen, Mingyen Lee, Xirui Du, Yue Ke, Wenjun Tang, Zhonghao Chen, Mufeng Zhou, Jinshan Yue, Huazhong Yang, Hongyang Jia, Yongpan Liu, Xueqing Li:
A 28nm 8928Kb/mm2-Weight-Density Hybrid SRAM/ROM Compute-in-Memory Architecture Reducing >95% Weight Loading from DRAM. CICC 2024: 1-2 - [c360]Lin Zhao, Tianchen Zhao, Zinan Lin, Xuefei Ning, Guohao Dai, Huazhong Yang, Yu Wang:
FlashEval: Towards Fast and Accurate Evaluation of Text-to-Image Diffusion Generative Models. CVPR 2024: 16122-16131 - [c359]Taixin Li, Hongtao Zhong, Juejian Wu, Thomas Kämpfe, Kai Ni, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li:
CafeHD: A Charge-Domain FeFET-Based Compute-in-Memory Hyperdimensional Encoder with Hypervector Merging. DATE 2024: 1-6 - [c358]Jianfeng Wang
TroScan: Enhancing On-Chip Delivery Resilience to Physical Attack Through Frequency-Triggered Key Generation. DATE 2024: 1-6 - [c357]Tongxin Xie, Tianchen Zhao, Zhenhua Zhu, Xuefei Ning, Bing Li, Guohao Dai, Huazhong Yang, Yu Wang:
DyPIM: Dynamic-Inference-Enabled Processing - In-Memory Accelerator. DATE 2024: 1-6 - [c356]Enshu Liu, Xuefei Ning, Huazhong Yang, Yu Wang:
A Unified Sampling Framework for Solver Searching of Diffusion Probabilistic Models. ICLR 2024 - [c355]Xuefei Ning, Zinan Lin, Zixuan Zhou, Zifu Wang, Huazhong Yang, Yu Wang:
Skeleton-of-Thought: Prompting LLMs for Efficient Parallel Generation. ICLR 2024 - [c354]Shiyao Li, Xuefei Ning, Luning Wang, Tengxuan Liu, Xiangsheng Shi, Shengen Yan, Guohao Dai, Huazhong Yang, Yu Wang:
Evaluating Quantized Large Language Models. ICML 2024 - [c353]Bowen Liu, Yangkun Hou, Yueshan Qin, Jiwei Zou, Hanbin Ma, Yongpan Liu, Huazhong Yang, Xueqing Li, Chen Jiang:
A 1024-Channel Neurostimulation System Enabled by Photolithographic Organic Thin-Film Transistors with High Uniformity. ISCAS 2024: 1-5 - [c352]Yifan He, Shupei Fan, Xuan Li, Luchang Lei, Wenbin Jia, Chen Tang, Yaolei Li, Zongle Huang, Zhike Du, Jinshan Yue, Xueqing Li, Huazhong Yang, Hongyang Jia, Yongpan Liu:
34.7 A 28nm 2.4Mb/mm2 6.9 - 16.3TOPS/mm2 eDRAM-LUT-Based Digital-Computing-in-Memory Macro with In-Memory Encoding and Refreshing. ISSCC 2024: 578-580 - [c351]Shiyao Li, Xuefei Ning, Shanghang Zhang, Lidong Guo, Tianchen Zhao, Huazhong Yang, Yu Wang:
TCP: Triplet Contrastive-relationship Preserving for Class-Incremental Learning. WACV 2024: 2020-2029 - [i74]Shiyao Li, Xuefei Ning, Luning Wang, Tengxuan Liu, Xiangsheng Shi, Shengen Yan, Guohao Dai, Huazhong Yang, Yu Wang:
Evaluating Quantized Large Language Models. CoRR abs/2402.18158 (2024) - [i73]Lin Zhao, Tianchen Zhao, Zinan Lin, Xuefei Ning, Guohao Dai, Huazhong Yang, Yu Wang:
FlashEval: Towards Fast and Accurate Evaluation of Text-to-image Diffusion Generative Models. CoRR abs/2403.16379 (2024) - [i72]Enshu Liu, Junyi Zhu, Zinan Lin, Xuefei Ning, Matthew B. Blaschko, Sergey Yekhanin, Shengen Yan, Guohao Dai, Huazhong Yang, Yu Wang:
Linear Combination of Saved Checkpoints Makes Consistency and Diffusion Models Better. CoRR abs/2404.02241 (2024) - [i71]Jinwei Zeng, Chao Yu, Xinyi Yang, Wenxuan Ao, Jian Yuan, Yong Li, Yu Wang, Huazhong Yang:
CityLight: A Universal Model Towards Real-world City-scale Traffic Signal Control Coordination. CoRR abs/2406.02126 (2024) - [i70]Tianchen Zhao, Tongcheng Fang, Enshu Liu, Rui Wan, Widyadewi Soedarmadji, Shiyao Li, Zinan Lin, Guohao Dai, Shengen Yan, Huazhong Yang, Xuefei Ning, Yu Wang:
ViDiT-Q: Efficient and Accurate Quantization of Diffusion Transformers for Image and Video Generation. CoRR abs/2406.02540 (2024) - [i69]Xuefei Ning, Zifu Wang, Shiyao Li, Zinan Lin, Peiran Yao, Tianyu Fu, Matthew B. Blaschko, Guohao Dai, Huazhong Yang, Yu Wang:
Can LLMs Learn by Teaching? A Preliminary Study. CoRR abs/2406.14629 (2024) - [i68]Tianyu Fu, Haofeng Huang, Xuefei Ning, Genghan Zhang, Boju Chen, Tianqi Wu, Hongyi Wang, Zixiao Huang, Shiyao Li, Shengen Yan, Guohao Dai, Huazhong Yang, Yu Wang:
MoA: Mixture of Sparse Attention for Automatic Large Language Model Compression. CoRR abs/2406.14909 (2024) - [i67]Enshu Liu, Junyi Zhu, Zinan Lin, Xuefei Ning, Matthew B. Blaschko, Shengen Yan, Guohao Dai, Huazhong Yang, Yu Wang:
Efficient Expert Pruning for Sparse Mixture-of-Experts Language Models: Enhancing Performance and Reducing Inference Costs. CoRR abs/2407.00945 (2024) - [i66]Jiayu Chen, Chao Yu, Guosheng Li, Wenhao Tang, Xinyi Yang, Botian Xu, Huazhong Yang, Yu Wang:
Multi-UAV Pursuit-Evasion with Online Planning in Unknown Environments by Deep Reinforcement Learning. CoRR abs/2409.15866 (2024) - 2023
- [j167]Xuefei Ning
A Generic Graph-Based Neural Architecture Encoding Scheme With Multifaceted Information. IEEE Trans. Pattern Anal. Mach. Intell. 45(7): 7955-7969 (2023) - [j166]Shulin Zeng
Serving Multi-DNN Workloads on FPGAs: A Coordinated Architecture, Scheduling, and Mapping Perspective. IEEE Trans. Computers 72(5): 1314-1328 (2023) - [j165]Jingbo Hu, Guohao Dai, Liuzheng Wang, Liyang Lai, Yu Huang, Huazhong Yang, Yu Wang:
Adaptive Multidimensional Parallel Fault Simulation Framework on Heterogeneous System. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(6): 1951-1964 (2023) - [j164]Hanbo Sun, Zhenhua Zhu, Chenyu Wang, Xuefei Ning, Guohao Dai, Huazhong Yang, Yu Wang:
Gibbon: An Efficient Co-Exploration Framework of NN Model and Processing-In-Memory Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 4075-4089 (2023) - [j163]Zhenhua Zhu, Hanbo Sun, Tongxin Xie, Yu Zhu, Guohao Dai
MNSIM 2.0: A Behavior-Level Modeling Tool for Processing-In-Memory Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 4112-4125 (2023) - [j162]Kai Zhong
CoGNN: An Algorithm-Hardware Co-Design Approach to Accelerate GNN Inference With Minibatch Sampling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 4883-4896 (2023) - [j161]Tongda Wu
Reliable and Efficient Parallel Checkpointing Framework for Nonvolatile Processor With Concurrent Peripherals. IEEE Trans. Circuits Syst. I Regul. Pap. 70(1): 228-240 (2023) - [j160]Yushen Fu
A 16-Bit 4.0-GS/s Calibration-Free 65 nm DAC Achieving >70 dBc SFDR and < -80 dBc IM3 Up to 1 GHz With Enhanced Constant-Switching-Activity Data-Weighted-Averaging. IEEE Trans. Circuits Syst. I Regul. Pap. 70(5): 1856-1867 (2023) - [j159]Wenjun Tang
FeFET-Based Logic-in-Memory Supporting SA-Free Write-Back and Fully Dynamic Access With Reduced Bitline Charging Activity and Recycled Bitline Charge. IEEE Trans. Circuits Syst. I Regul. Pap. 70(6): 2398-2411 (2023) - [j158]Yiming Chen
SAMBA: Single-ADC Multi-Bit Accumulation Compute-in-Memory Using Nonlinearity- Compensated Fully Parallel Analog Adder Tree. IEEE Trans. Circuits Syst. I Regul. Pap. 70(7): 2762-2773 (2023) - [j157]Yanan Sun
CREAM: Computing in ReRAM-Assisted Energy- and Area-Efficient SRAM for Reliable Neural Network Acceleration. IEEE Trans. Circuits Syst. I Regul. Pap. 70(8): 3198-3211 (2023) - [j156]Wenjun Tang
Low-Power and Scalable BEOL-Compatible IGZO TFT eDRAM-Based Charge-Domain Computing. IEEE Trans. Circuits Syst. I Regul. Pap. 70(12): 5166-5179 (2023) - [j155]Yifan He, Jinshan Yue, Xiaoyu Feng
An RRAM-Based Digital Computing-in-Memory Macro With Dynamic Voltage Sense Amplifier and Sparse-Aware Approximate Adder Tree. IEEE Trans. Circuits Syst. II Express Briefs 70(2): 416-420 (2023) - [j154]Lu Zhang
Pareto Frequency-Aware Power Side-Channel Countermeasure Exploration on CNN Systolic Array. IEEE Trans. Circuits Syst. II Express Briefs 70(3): 1124-1128 (2023) - [j153]Yaolei Li
A Weight-Reload-Eliminated Compute-in-Memory Accelerator for 60 fps 4K Super-Resolution. IEEE Trans. Circuits Syst. II Express Briefs 70(3): 1179-1183 (2023) - [j152]Yiming Chen
FAST: A Fully-Concurrent Access SRAM Topology for High Row-Wise Parallelism Applications Based on Dynamic Shift Operations. IEEE Trans. Circuits Syst. II Express Briefs 70(4): 1605-1609 (2023) - [j151]Songming Yu
A Heterogeneous Microprocessor Based on All-Digital Compute-in-Memory for End-to-End AIoT Inference. IEEE Trans. Circuits Syst. II Express Briefs 70(8): 3099-3103 (2023) - [j150]Bin Xu
Modularized Equalization Architecture With Transformer-Based Integrating Voltage Equalizer for the Series-Connected Battery Pack in Electric Bicycles. IEEE Trans. Ind. Electron. 70(7): 6984-6992 (2023) - [j149]Yushen Fu
A 6.0-GS/s Time-Interleaved DAC Using an Asymmetric Current-Tree Summation Network and Differential Clock Timing Calibration. IEEE Trans. Very Large Scale Integr. Syst. 31(2): 199-209 (2023) - [j148]Lizhou Liu
A Single-Magnetic Bidirectional Integrated Equalizer Using Multi-Winding Transformer and Voltage Multiplier for Hybrid Energy Storage System. IEEE Trans. Veh. Technol. 72(6): 7318-7327 (2023) - [c350]Xiangsheng Shi, Xuefei Ning, Lidong Guo, Tianchen Zhao, Enshu Liu, Yi Cai, Yuhan Dong, Huazhong Yang, Yu Wang:
Memory-Oriented Structural Pruning for Efficient Image Restoration. AAAI 2023: 2245-2253 - [c349]Yi Cai, Xuefei Ning, Huazhong Yang, Yu Wang:
Ensemble-in-One: Ensemble Learning within Random Gated Networks for Enhanced Adversarial Robustness. AAAI 2023: 14738-14747 - [c348]Xiaoyu Feng, Wenyu Sun, Shupei Fan, Chen Tang, Yixiong Yang, Jinshan Yue, Qingmin Liao, Huazhong Yang, Yongpan Liu:
A Demonstration Platform for Large-Scaled Point Cloud Network Based on 28nm 2D/3D Unified Sparse Convolution Accelerator. AICAS 2023: 1-2 - [c347]Jianfeng Wang
WeightLock: A Mixed-Grained Weight Encryption Approach Using Local Decrypting Units for Ciphertext Computing in DNN Accelerators. AICAS 2023: 1-5 - [c346]Ruoyang Liu, Chenhan Wei
Block-Wise Dynamic-Precision Neural Network Training Acceleration via Online Quantization Sensitivity Analytics. ASP-DAC 2023: 372-377 - [c345]Wentao Hou, Kai Zhong, Shulin Zeng, Guohao Dai, Huazhong Yang, Yu Wang:
NTGAT: A Graph Attention Network Accelerator with Runtime Node Tailoring. ASP-DAC 2023: 645-650 - [c344]Shuang Wang, Weiliang Chen, Xueqing Li, Leibo Liu, Huazhong Yang:
A 10TFLOPS Datacenter-Oriented GPU with 4-Corner Stacked 64GB Memory by The Means of 2.5D Packaging Technology. A-SSCC 2023: 1-3 - [c343]Hedi Wang, Zengwei Wang, Yaolei Li, Chen Tang, Jinxu Gao, Huazhong Yang, Yongpan Liu:
A 28nm 386.5GOPS/W Coarse-Grained DSP Using Configurable Processing Elements for Always-on Computation with FPGA Implementation. A-SSCC 2023: 1-3 - [c342]Chao Yu, Xinyi Yang, Jiaxuan Gao, Jiayu Chen, Yunfei Li, Jijia Liu, Yunfei Xiang, Ruixin Huang, Huazhong Yang, Yi Wu, Yu Wang:
Asynchronous Multi-Agent Reinforcement Learning for Efficient Real-Time Multi-Robot Cooperative Exploration. AAMAS 2023: 1107-1115 - [c341]Xinyi Yang, Shiyu Huang, Yiwen Sun, Yuxiang Yang, Chao Yu, Wei-Wei Tu, Huazhong Yang, Yu Wang:
Learning Graph-Enhanced Commander-Executor for Multi-Agent Navigation. AAMAS 2023: 1652-1660 - [c340]Yixiong Yang, Ruoyang Liu, Chenhan Wei, Wenxun Wang, Wenyu Sun, Jinshan Yue, Huazhong Yang, Yongpan Liu:
A 28nm 1.07TFLOPS/mm2 Dynamic-Precision Training Processor with Online Dynamic Execution and Multi- Level-Aligned Block-FP Processing. CICC 2023: 1-2 - [c339]Mingyen Lee, Wenjun Tang, Yiming Chen, Juejian Wu, Hongtao Zhong, Yixin Xu, Yongpan Liu, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li:
Victor: A Variation-resilient Approach Using Cell-Clustered Charge-domain computing for High-density High-throughput MLC CiM. DAC 2023: 1-6 - [c338]Shiyao Li, Zhenhua Zhu, Yu Zhu, Qingpeng Zhu, Jiangwei Zhang, Wenxiu Sun, Guohao Dai, Fei Qiao, Huazhong Yang, Yu Wang:
Memory-Efficient and Real-Time SPAD-based dToF Depth Sensor with Spatial and Statistical Correlation. DAC 2023: 1-6 - [c337]Hongtao Zhong, Zhonghao Chen, Wenqin Huangfu, Chen Wang, Yixin Xu, Tianyi Wang, Yao Yu, Yongpan Liu, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li:
ASMCap: An Approximate String Matching Accelerator for Genome Sequence Analysis Based on Capacitive Content Addressable Memory. DAC 2023: 1-6 - [c336]Zhenhua Zhu, Jun Liu, Guohao Dai, Shulin Zeng, Bing Li, Huazhong Yang, Yu Wang:
Processing-In-Hierarchical-Memory Architecture for Billion-Scale Approximate Nearest Neighbor Search. DAC 2023: 1-6 - [c335]Yu Zhu, Zhenhua Zhu, Guohao Dai, Fengbin Tu, Hanbo Sun, Kwang-Ting Cheng, Huazhong Yang, Yu Wang:
PIM-HLS: An Automatic Hardware Generation Tool for Heterogeneous Processing-In-Memory-based Neural Network Accelerators. DAC 2023: 1-6 - [c334]Tianyu Fu
CLAP: Locality Aware and Parallel Triangle Counting with Content Addressable Memory. DATE 2023: 1-6 - [c333]Hanbo Sun, Tongxin Xie, Zhenhua Zhu, Guohao Dai, Huazhong Yang, Yu Wang:
Minimizing Communication Conflicts in Network-On-Chip Based Processing-In-Memory Architecture. DATE 2023: 1-6 - [c332]Jiangwei Zhang, Chong Wang, Zhenhua Zhu, Donald Kline, Alex K. Jones, Huazhong Yang, Yu Wang:
Realizing Extreme Endurance Through Fault-aware Wear Leveling and Improved Tolerance. HPCA 2023: 964-976 - [c331]Jun Liu, Guohao Dai, Hao Xia, Lidong Guo, Xiangsheng Shi, Jiaming Xu, Huazhong Yang, Yu Wang:
TSTC: Two-Level Sparsity Tensor Core Enabling both Algorithm Flexibility and Hardware Efficiency. ICCAD 2023: 1-9 - [c330]Juejian Wu, Tianyu Liao
Lowering Latency of Embedded Memory by Exploiting In-Cell Victim Cache Hierarchy Based on Emerging Multi-Level Memory Devices. ICCAD 2023: 1-9 - [c329]Tianchen Zhao, Xuefei Ning, Ke Hong, Zhongyuan Qiu, Pu Lu, Yali Zhao, Linfeng Zhang, Lipu Zhou, Guohao Dai, Huazhong Yang, Yu Wang:
Ada3D : Exploiting the Spatial Redundancy with Adaptive Inference for Efficient 3D Object Detection. ICCV 2023: 17682-17692 - [c328]Enshu Liu, Xuefei Ning, Zinan Lin, Huazhong Yang, Yu Wang:
OMS-DPM: Optimizing the Model Schedule for Diffusion Probabilistic Models. ICML 2023: 21915-21936 - [c327]Yifan He, Haikang Diao, Chen Tang, Wenbin Jia, Xiyuan Tang, Yuan Wang, Jinshan Yue, Xueqing Li, Huazhong Yang, Hongyang Jia, Yongpan Liu:
A 28nm 38-to-102-TOPS/W 8b Multiply-Less Approximate Digital SRAM Compute-In-Memory Macro for Neural-Network Inference. ISSCC 2023: 130-131 - [c326]Jinshan Yue, Chaojie He, Zi Wang, Zhaori Cong, Yifan He, Mufeng Zhou, Wenyu Sun, Xueqing Li, Chunmeng Dou, Feng Zhang, Huazhong Yang, Yongpan Liu, Ming Liu:
A 28nm 16.9-300TOPS/W Computing-in-Memory Processor Supporting Floating-Point NN Inference/Training with Intensive-CIM Sparse-Digital Architecture. ISSCC 2023: 252-253 - [c325]Wenyu Sun, Xiaoyu Feng, Chen Tang, Shupei Fan, Yixiong Yang, Jinshan Yue, Huazhong Yang, Yongpan Liu:
A 28nm 2D/3D Unified Sparse Convolution Accelerator with Block-Wise Neighbor Searcher for Large-Scaled Voxel-Based Point Cloud Network. ISSCC 2023: 328-329 - [c324]Taixin Li, Hongtao Zhong, Sumitha George, Vijaykrishnan Narayanan, Liang Shi, Huazhong Yang, Xueqing Li:
Design Exploration of Dynamic Multi-Level Ternary Content-Addressable Memory Using Nanoelectromechanical Relays. ISVLSI 2023: 1-6 - [c323]Hongtao Zhong, Yu Zhu, Longfei Luo, Taixin Li, Chen Wang, Yixin Xu, Tianyi Wang, Yao Yu, Vijaykrishnan Narayanan, Yongpan Liu, Liang Shi, Huazhong Yang, Xueqing Li:
Fe-GCN: A 3D FeFET Memory Based PIM Accelerator for Graph Convolutional Networks. ISVLSI 2023: 1-6 - [c322]Shulin Zeng
DF-GAS: a Distributed FPGA-as-a-Service Architecture towards Billion-Scale Graph-based Approximate Nearest Neighbor Search. MICRO 2023: 283-296 - [c321]Jinshan Yue, Mingtao Zhan, Zi Wang, Yifan He, Yaolei Li, Songming Yu, Wenyu Sun, Lu Jie, Chunmeng Dou, Xueqing Li, Nan Sun, Huazhong Yang, Ming Liu, Yongpan Liu:
A 5.6-89.9TOPS/W Heterogeneous Computing-in-Memory SoC with High-Utilization Producer-Consumer Architecture and High-Frequency Read-Free CIM Macro. VLSI Technology and Circuits 2023: 1-2 - [i65]Chao Yu, Xinyi Yang, Jiaxuan Gao, Jiayu Chen, Yunfei Li, Jijia Liu, Yunfei Xiang, Ruixin Huang, Huazhong Yang, Yi Wu, Yu Wang:
Asynchronous Multi-Agent Reinforcement Learning for Efficient Real-Time Multi-Robot Cooperative Exploration. CoRR abs/2301.03398 (2023) - [i64]Xinyi Yang, Shiyu Huang, Yiwen Sun, Yuxiang Yang, Chao Yu, Wei-Wei Tu, Huazhong Yang, Yu Wang:
Learning Graph-Enhanced Commander-Executor for Multi-Agent Navigation. CoRR abs/2302.04094 (2023) - [i63]Hongtao Zhong, Zhonghao Chen, Wenqin Huangfu, Chen Wang, Yixin Xu, Tianyi Wang, Yao Yu, Yongpan Liu, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li:
ASMCap: An Approximate String Matching Accelerator for Genome Sequence Analysis Based on Capacitive Content Addressable Memory. CoRR abs/2302.07478 (2023) - [i62]Enshu Liu, Xuefei Ning, Zinan Lin, Huazhong Yang, Yu Wang:
OMS-DPM: Optimizing the Model Schedule for Diffusion Probabilistic Models. CoRR abs/2306.08860 (2023) - [i61]Tianchen Zhao, Xuefei Ning, Ke Hong, Zhongyuan Qiu, Pu Lu, Yali Zhao, Linfeng Zhang, Lipu Zhou, Guohao Dai, Huazhong Yang, Yu Wang:
Ada3D : Exploiting the Spatial Redundancy with Adaptive Inference for Efficient 3D Object Detection. CoRR abs/2307.08209 (2023) - [i60]Xuefei Ning, Zinan Lin, Zixuan Zhou, Huazhong Yang, Yu Wang:
Skeleton-of-Thought: Large Language Models Can Do Parallel Decoding. CoRR abs/2307.15337 (2023) - [i59]Jiayu Chen, Zelai Xu, Yunfei Li, Chao Yu, Jiaming Song, Huazhong Yang, Fei Fang
Accelerate Multi-Agent Reinforcement Learning in Zero-Sum Games with Subgame Curriculum Learning. CoRR abs/2310.04796 (2023) - [i58]Xinyi Yang, Yuxiang Yang, Chao Yu, Jiayu Chen, Jingchen Yu, Haibing Ren, Huazhong Yang, Yu Wang:
Active Neural Topological Mapping for Multi-Agent Exploration. CoRR abs/2311.00252 (2023) - [i57]Xinyi Yang, Xinting Yang, Chao Yu, Jiayu Chen, Huazhong Yang, Yu Wang:
MASP: Scalable GNN-based Planning for Multi-Agent Navigation. CoRR abs/2312.02522 (2023) - [i56]Enshu Liu, Xuefei Ning, Huazhong Yang, Yu Wang:
A Unified Sampling Framework for Solver Searching of Diffusion Probabilistic Models. CoRR abs/2312.07243 (2023) - [i55]Jiayu Chen, Guosheng Li, Chao Yu, Xinyi Yang, Botian Xu, Huazhong Yang, Yu Wang:
TaskFlex Solver for Multi-Agent Pursuit via Automatic Curriculum Learning. CoRR abs/2312.12255 (2023) - 2022
- [j147]Jinshan Yue
STICKER-IM: A 65 nm Computing-in-Memory NN Processor Using Block-Wise Sparsity Optimization and Inter/Intra-Macro Data Reuse. IEEE J. Solid State Circuits 57(8): 2560-2573 (2022) - [j146]Yixiong Yang
A 65-nm Energy-Efficient Interframe Data Reuse Neural Network Accelerator for Video Applications. IEEE J. Solid State Circuits 57(8): 2574-2585 (2022) - [j145]Zijian Ding, Guijin Wang, Huazhong Yang, Ping Zhang, Dapeng Fu, Zhen Yang, Xinkang Wang, Xia Wang, Zhourui Xia, Chiming Zhang, Wenjie Cai, Binhang Yuan, Dongya Jia, Bo Chen, Chengbin Huang, Jing Zhang, Yi Li, Shan Yang, Runnan He:
A community effort to assess and improve computerized interpretation of 12-lead resting electrocardiogram. Medical Biol. Eng. Comput. 60(1): 33-45 (2022) - [j144]Jincheng Yu
INCAME: Interruptible CNN Accelerator for Multirobot Exploration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(4): 964-978 (2022) - [j143]Jingyu Wang
PACA: A Pattern Pruning Algorithm and Channel-Fused High PE Utilization Accelerator for CNNs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 5043-5056 (2022) - [j142]Kai Zhong
Exploring the Potential of Low-Bit Training of Convolutional Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(12): 5421-5434 (2022) - [j141]Han Xu
Senputing: An Ultra-Low-Power Always-On Vision Perception Chip Featuring the Deep Fusion of Sensing and Computing. IEEE Trans. Circuits Syst. I Regul. Pap. 69(1): 232-243 (2022) - [j140]Yuxuan Huang
Accuracy Optimization With the Framework of Non-Volatile Computing-In-Memory Systems. IEEE Trans. Circuits Syst. I Regul. Pap. 69(2): 518-529 (2022) - [j139]Yuxuan Huang
Bit-Aware Fault-Tolerant Hybrid Retraining and Remapping Schemes for RRAM-Based Computing-in-Memory Systems. IEEE Trans. Circuits Syst. II Express Briefs 69(7): 3144-3148 (2022) - [j138]Shulin Zeng, Guohao Dai, Hanbo Sun, Jun Liu, Shiyao Li, Guangjun Ge, Kai Zhong, Kaiyuan Guo, Yu Wang, Huazhong Yang:
A Unified FPGA Virtualization Framework for General-Purpose Deep Neural Networks in the Cloud. ACM Trans. Reconfigurable Technol. Syst. 15(3): 24:1-24:31 (2022) - [j137]Xiaoyang Ma
CapCAM: A Multilevel Capacitive Content Addressable Memory for High-Accuracy and High-Scalability Search and Compute Applications. IEEE Trans. Very Large Scale Integr. Syst. 30(11): 1770-1782 (2022) - [c320]Yixiong Yang, Ruoyang Liu, Wenyu Sun, Jinshan Yue, Huazhong Yang, Yongpan Liu:
Toward Low-Bit Neural Network Training Accelerator by Dynamic Group Accumulation. ASP-DAC 2022: 442-447 - [c319]Yuxuan Huang
Sparsity-Aware Non-Volatile Computing-In-Memory Macro with Analog Switch Array and Low-Resolution Current-Mode ADC. ASP-DAC 2022: 684-689 - [c318]Guohao Dai, Guyue Huang, Shang Yang, Zhongming Yu, Hengrui Zhang, Yufei Ding, Yuan Xie, Huazhong Yang, Yu Wang:
Heuristic adaptability to input dynamics for SpMM on CPUs. DAC 2022: 595-600 - [c317]Yiming Chen
YOLoC: deploy large-scale neural network by ROM-based computing-in-memory using residual branch on a chip. DAC 2022: 1093-1098 - [c316]Yu Zhu, Zhenhua Zhu, Guohao Dai, Kai Zhong, Huazhong Yang, Yu Wang:
Exploiting Parallelism with Vertex-Clustering in Processing-In-Memory-based GCN Accelerators. DATE 2022: 652-657 - [c315]Hanbo Sun, Chenyu Wang, Zhenhua Zhu, Xuefei Ning, Guohao Dai, Huazhong Yang, Yu Wang:
Gibbon: Efficient Co-Exploration of NN Model and Processing-In-Memory Architecture. DATE 2022: 867-872 - [c314]Chao Yu, Xinyi Yang, Jiaxuan Gao, Huazhong Yang, Yu Wang, Yi Wu:
Learning Efficient Multi-agent Cooperative Visual Exploration. ECCV (39) 2022: 497-515 - [c313]Zixuan Zhou, Xuefei Ning, Yi Cai, Jiashu Han, Yiping Deng, Yuhan Dong, Huazhong Yang, Yu Wang:
CLOSE: Curriculum Learning on the Sharing Extent Towards Better One-Shot NAS. ECCV (20) 2022: 578-594 - [c312]Yiming Chen
Hidden-ROM: A Compute-in-ROM Architecture to Deploy Large-Scale Neural Networks on Chip with Flexible and Scalable Post-Fabrication Task Transfer Capability. ICCAD 2022: 45:1-45:9 - [c311]Xinyi Yang, Chao Yu, Jiaxuan Gao, Yu Wang, Huazhong Yang:
SAVE: Spatial-Attention Visual Exploration. ICIP 2022: 1356-1360 - [c310]Yuanfan Xu, Jincheng Yu, Jiahao Tang, Jiantao Qiu, Jian Wang, Yuan Shen
Explore-Bench: Data Sets, Metrics and Evaluations for Frontier-based and Deep-reinforcement-learning-based Autonomous Exploration. ICRA 2022: 6225-6231 - [c309]Guohao Dai, Zhenhua Zhu, Tianyu Fu
DIMMining: pruning-efficient and parallel graph mining on near-memory-computing. ISCA 2022: 130-145 - [c308]Jianfeng Wang
An 8T/Cell FeFET-Based Nonvolatile SRAM with Improved Density and Sub-fJ Backup and Restore Energy. ISCAS 2022: 3408-3412 - [c307]Jiangwei Zhang, Chong Wang, Yi Cai, Zhenhua Zhu, Donald Kline, Huazhong Yang, Yu Wang:
WESCO: Weight-encoded Reliability and Security Co-design for In-memory Computing Systems. ISVLSI 2022: 296-301 - [c306]Yu Wang, Shulin Zeng, Kaiyuan Guo, Xuefei Ning, Yali Zhao, Zhongyuan Qiu, Changcheng Tang, Shuang Liang, Huazhong Yang:
Efficient Autonomous Driving System Design: From Software to Hardware. ISVLSI 2022: 373-375 - [c305]Jun Liu, Zhenhua Zhu, Jingbo Hu, Hanbo Sun, Li Liu, Lingzhi Liu, Guohao Dai, Huazhong Yang, Yu Wang:
Optimizing Graph-based Approximate Nearest Neighbor Search: Stronger and Smarter. MDM 2022: 179-184 - [c304]Xuefei Ning, Zixuan Zhou, Junbo Zhao, Tianchen Zhao, Yiping Deng, Changcheng Tang, Shuang Liang, Huazhong Yang, Yu Wang:
TA-GATES: An Encoding Scheme for Neural Network Architectures. NeurIPS 2022 - [c303]Yunfei Xiang, Jiantao Qiu, Jincheng Yu, Jiahao Tang, Guangjun Ge, Yu Wang, Huazhong Yang:
A Mobile Robot Experiment System with Lightweight Simulator Generator for Deep Reinforcement Learning Algorithm. ROBIO 2022: 1508-1514 - [c302]Xuan Du, Xinyi Yang, Chao Yu, Jiaxuan Gao, Huazhong Yang, Yu Wang, Qingmin Liao:
A Benchmark of Planning-based Exploration Methods in Photo-Realistic 3D Simulator. ROBIO 2022: 1562-1567 - [c301]Dingchang Hu, Siang Chen
Distribution-aware Low-bit Quantization for 3D Point Cloud Networks. VCIP 2022: 1-5 - [i54]Guohao Dai, Guyue Huang, Shang Yang, Zhongming Yu, Hengrui Zhang, Yufei Ding, Yuan Xie, Huazhong Yang, Yu Wang:
Heuristic Adaptability to Input Dynamics for SpMM on GPUs. CoRR abs/2202.08556 (2022) - [i53]Yuanfan Xu, Jincheng Yu, Jiahao Tang, Jiantao Qiu, Jian Wang, Yuan Shen, Yu Wang, Huazhong Yang:
Explore-Bench: Data Sets, Metrics and Evaluations for Frontier-based and Deep-reinforcement-learning-based Autonomous Exploration. CoRR abs/2202.11931 (2022) - [i52]Yiming Chen, Yushen Fu, Mingyen Lee, Sumitha George, Yongpan Liu, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li:
FAST: A Fully-Concurrent Access Technique to All SRAM Rows for Enhanced Speed and Energy Efficiency in Data-Intensive Applications. CoRR abs/2205.11088 (2022) - [i51]Yiming Chen, Guodong Yin, Zhanhong Tan, Mingyen Lee, Zekun Yang, Yongpan Liu, Huazhong Yang, Kaisheng Ma, Xueqing Li:
YOLoC: DeploY Large-Scale Neural Network by ROM-based Computing-in-Memory using ResiduaL Branch on a Chip. CoRR abs/2206.00379 (2022) - [i50]Jianfeng Wang, Zhonghao Chen, Jiahao Zhang, Yixin Xu, Tongguang Yu, Enze Ye, Ziheng Zheng, Huazhong Yang, Sumitha George, Yongpan Liu, Vijaykrishnan Narayanan, Xueqing Li:
ALL-MASK: A Reconfigurable Logic Locking Method for Multicore Architecture with Sequential-Instruction-Oriented Key. CoRR abs/2206.08087 (2022) - [i49]Zixuan Zhou, Xuefei Ning, Yi Cai, Jiashu Han, Yiping Deng, Yuhan Dong, Huazhong Yang, Yu Wang:
CLOSE: Curriculum Learning On the Sharing Extent Towards Better One-shot NAS. CoRR abs/2207.07868 (2022) - [i48]Yiming Chen, Guohao Dai, Mufeng Zhou, Mingyen Lee, Nagadastagiri Challapalle, Guodong Yin, Zekun Yang, Yongpan Liu, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li:
GRAPHIC: GatheR-And-Process in Highly parallel with In-SSD Compression Architecture in Very Large-Scale Graph. CoRR abs/2208.08600 (2022) - [i47]Ranran Huang, Yu Wang, Huazhong Yang:
Cross-layer Attention Network for Fine-grained Visual Categorization. CoRR abs/2210.08784 (2022) - [i46]Ruoyang Liu, Chenhan Wei, Yixiong Yang, Wenxun Wang, Huazhong Yang, Yongpan Liu:
Block-Wise Dynamic-Precision Neural Network Training Acceleration via Online Quantization Sensitivity Analytics. CoRR abs/2210.17047 (2022) - [i45]Guodong Yin, Mufeng Zhou, Yiming Chen, Wenjun Tang, Zekun Yang, Mingyen Lee, Xirui Du, Jinshan Yue, Jiaxin Liu, Huazhong Yang, Yongpan Liu, Xueqing Li:
A 65nm 8b-Activation 8b-Weight SRAM-Based Charge-Domain Computing-in-Memory Macro Using A Fully-Parallel Analog Adder Network and A Single-ADC Interface. CoRR abs/2212.04320 (2022) - [i44]Hongtao Zhong, Zijie Zheng, Kai Ni, Xiao Gong, Huazhong Yang, Xueqing Li:
Eliminating Leakage in Volatile Memory with Anti-Ferroelectric Transistors. CoRR abs/2212.04973 (2022) - 2021
- [j136]Jiantao Qiu
Low-Cost Multi-Agent Navigation via Reinforcement Learning With Multi-Fidelity Simulator. IEEE Access 9: 84773-84782 (2021) - [j135]Guijin Wang, Ming Chen, Zijian Ding, Jiawei Li, Huazhong Yang, Ping Zhang
Inter-patient ECG arrhythmia heartbeat classification based on unsupervised domain adaptation. Neurocomputing 454: 339-349 (2021) - [j134]Jinshan Yue
STICKER-T: An Energy-Efficient Neural Network Processor Using Block-Circulant Algorithm and Unified Frequency-Domain Acceleration. IEEE J. Solid State Circuits 56(6): 1936-1948 (2021) - [j133]Jiawei Li, Guijin Wang
Mixup Asymmetric Tri-Training for Heartbeat Classification Under Domain Shift. IEEE Signal Process. Lett. 28: 718-722 (2021) - [j132]Guijin Wang
Epipolar Geometry Guided Highly Robust Structured Light 3D Imaging. IEEE Signal Process. Lett. 28: 887-891 (2021) - [j131]Hui Chen
CLECG: A Novel Contrastive Learning Framework for Electrocardiogram Arrhythmia Classification. IEEE Signal Process. Lett. 28: 1993-1997 (2021) - [j130]Han Xu
Reducing SRAM Reading Power With Column Data Segment and Weights Correlation Enhancement for CNN Processing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(11): 2237-2250 (2021) - [j129]Qin Li
NS-FDN: Near-Sensor Processing Architecture of Feature-Configurable Distributed Network for Beyond-Real-Time Always-on Keyword Spotting. IEEE Trans. Circuits Syst. I Regul. Pap. 68(5): 1892-1905 (2021) - [j128]Han Xu
MACSen: A Processing-In-Sensor Architecture Integrating MAC Operations Into Image Sensor for Ultra-Low-Power BNN-Based Intelligent Visual Perception. IEEE Trans. Circuits Syst. II Express Briefs 68(2): 627-631 (2021) - [j127]Guodong Yin
Enabling Lower-Power Charge-Domain Nonvolatile In-Memory Computing With Ferroelectric FETs. IEEE Trans. Circuits Syst. II Express Briefs 68(7): 2262-2266 (2021) - [j126]Guyue Huang, Jingbo Hu, Yifan He, Jialong Liu, Mingyuan Ma, Zhaoyang Shen, Juejian Wu, Yuanfan Xu, Hengrui Zhang, Kai Zhong, Xuefei Ning, Yuzhe Ma, Haoyu Yang, Bei Yu, Huazhong Yang, Yu Wang:
Machine Learning for Electronic Design Automation: A Survey. ACM Trans. Design Autom. Electr. Syst. 26(5): 40:1-40:46 (2021) - [j125]Xuefei Ning, Guangjun Ge, Wenshuo Li, Zhenhua Zhu, Yin Zheng, Xiaoming Chen, Zhen Gao, Yu Wang, Huazhong Yang:
FTT-NAS: Discovering Fault-tolerant Convolutional Neural Architecture. ACM Trans. Design Autom. Electr. Syst. 26(6): 44:1-44:24 (2021) - [j124]Hongtao Zhong
DyTAN: Dynamic Ternary Content Addressable Memory Using Nanoelectromechanical Relays. IEEE Trans. Very Large Scale Integr. Syst. 29(11): 1981-1993 (2021) - [c300]Yuxuan Huang
A Non-Volatile Computing-In-Memory Framework With Margin Enhancement Based CSA and Offset Reduction Based ADC. ASP-DAC 2021: 126-131 - [c299]Qin Li, Peiyan Dong, Zijie Yu, Changlu Liu, Fei Qiao, Yanzhi Wang, Huazhong Yang:
Puncturing the memory wall: Joint optimization of network compression with approximate memory for ASR application. ASP-DAC 2021: 505-511 - [c298]Shuang Liang, Changcheng Tang, Xuefei Ning, Shulin Zeng, Jincheng Yu, Yu Wang, Kaiyuan Guo, Diange Yang, Tianyi Lu, Huazhong Yang:
Efficient Computing Platform Design for Autonomous Driving Systems. ASP-DAC 2021: 734-741 - [c297]Yifan He, Jinshan Yue, Yongpan Liu, Huazhong Yang:
Block-Circulant Neural Network Accelerator Featuring Fine-Grained Frequency-Domain Quantization and Reconfigurable FFT Modules. ASP-DAC 2021: 813-818 - [c296]Hanbo Sun, Zhenhua Zhu, Yi Cai, Shulin Zeng, Kaizhong Qiu, Yu Wang, Huazhong Yang:
Reliability-Aware Training and Performance Modeling for Processing-In-Memory Systems. ASP-DAC 2021: 847-852 - [c295]Han Xu, Zheyu Liu, Ziwei Li, Erxiang Ren
A 4.57 μW@120fps Vision System of Sensing with Computing for BNN-Based Perception Applications. A-SSCC 2021: 1-3 - [c294]Ruoyang Liu, Lu Zhang, Jingyu Wang, Huazhong Yang, Yongpan Liu:
PETRI: Reducing Bandwidth Requirement in Smart Surveillance by Edge-Cloud Collaborative Adaptive Frame Clustering and Pipelined Bidirectional Tracking. DAC 2021: 421-426 - [c293]Hongtao Zhong, Shengjie Cao, Huazhong Yang, Xueqing Li:
Dynamic Ternary Content-Addressable Memory Is Indeed Promising: Design and Benchmarking Using Nanoelectromechanical Relays. DATE 2021: 1100-1103 - [c292]Xinrui Guo, Xiaoyang Ma
Exploiting FeFET Switching Stochasticity for Low-Power Reconfigurable Physical Unclonable Function. ESSCIRC 2021: 119-122 - [c291]Chengyu Huang, Yushen Fu
A 16-Bit 4.0-GS/s Calibration-Free 65nm DAC with >70dBc SFDR and <-80dBc IM3 up to 1GHz Using Constant-Activity Element Switching. ESSCIRC 2021: 495-498 - [c290]Xinrui Guo, Xiaoyang Ma, Franz Müller
Exploiting FeFET Switching Stochasticity for Low-Power Reconfigurable Physical Unclonable Function. ESSDERC 2021: 119-122 - [c289]Yuanfan Xu, Zhaoliang Zhang, Jincheng Yu, Jianfei Cao, Haolin Dong, Zhengfeng Huang, Yu Wang, Huazhong Yang:
GAME: Gaussian Mixture Model Mapping and Navigation Engine on Embedded FPGA. FCCM 2021: 60-68 - [c288]Shulin Zeng, Guohao Dai, Hanbo Sun, Jun Liu, Hongren Zheng
3M-AI: A Multi-task and Multi-core Virtualization Framework for Multi-FPGA AI Systems in the Cloud. FPGA 2021: 228 - [c287]Nuo Xiu, Yiming Chen, Guodong Yin
Capacitive Content-Addressable Memory: A Highly Reliable and Scalable Approach to Energy-Efficient Parallel Pattern Matching Applications. ACM Great Lakes Symposium on VLSI 2021: 479-484 - [c286]Zhongming Yu, Guohao Dai, Guyue Huang, Yu Wang, Huazhong Yang:
Exploiting Online Locality and Reduction Parallelism for Sampled Dense Matrix Multiplication on GPUs. ICCD 2021: 567-574 - [c285]Yang Liu, Yushen Fu
Dynamic Switching Sequence to Compensate the Integral Nonlinearity in Current-Steering DACs. ISCAS 2021: 1-5 - [c284]Jialong Liu, Wenjun Tang, Yongpan Liu, Huazhong Yang, Xueqing Li:
Almost-Nonvolatile IGZO-TFT-Based Near-Sensor In-Memory Computing. ISCAS 2021: 1-5 - [c283]Zekun Yang, Pei Yang, Xiumei Yin, Xueqing Li, Huazhong Yang:
Reducing Signal Swing Overheads to Only 8% in Background 3rd-Order Inter-Stage Gain Error Calibration for Pipeline ADCs. ISCAS 2021: 1-5 - [c282]Jinshan Yue, Wenyu Sun, Huazhong Yang, Yongpan Liu:
Challenges and Opportunities of Energy-Efficient CIM SoC Design for Edge AI Devices. ISOCC 2021: 197-198 - [c281]Jinshan Yue, Xiaoyu Feng, Yifan He, Yuxuan Huang
A 2.75-to-75.9TOPS/W Computing-in-Memory NN Processor Supporting Set-Associate Block-Wise Zero Skipping and Ping-Pong CIM with Simultaneous Computation and Weight Updating. ISSCC 2021: 238-240 - [c280]Jiayu Chen, Yuanxin Zhang, Yuanfan Xu, Huimin Ma, Huazhong Yang, Jiaming Song, Yu Wang, Yi Wu:
Variational Automatic Curriculum Learning for Sparse-Reward Cooperative Multi-Agent Problems. NeurIPS 2021: 9681-9693 - [c279]Xuefei Ning, Changcheng Tang, Wenshuo Li, Zixuan Zhou, Shuang Liang, Huazhong Yang, Yu Wang:
Evaluating Efficient Performance Estimators of Neural Architectures. NeurIPS 2021: 12265-12277 - [c278]Songming Yu
High Area/Energy Efficiency RRAM CNN Accelerator with Pattern-Pruning-Based Weight Mapping Scheme. NVMSA 2021: 1-6 - [i43]Hongtao Zhong, Shengjie Cao, Huazhong Yang, Xueqing Li:
Dynamic Ternary Content-Addressable Memory Is Indeed Promising: Design and Benchmarking Using Nanoelectromechanical Relays. CoRR abs/2101.06375 (2021) - [i42]Guodong Yin, Yi Cai, Juejian Wu, Zhengyang Duan, Zhenhua Zhu, Yongpan Liu, Yu Wang, Huazhong Yang, Xueqing Li:
Enabling Lower-Power Charge-Domain Nonvolatile In-Memory Computing with Ferroelectric FETs. CoRR abs/2102.01442 (2021) - [i41]Guyue Huang, Jingbo Hu, Yifan He, Jialong Liu, Mingyuan Ma, Zhaoyang Shen, Juejian Wu, Yuanfan Xu, Hengrui Zhang, Kai Zhong, Xuefei Ning, Yuzhe Ma, Haoyu Yang, Bei Yu, Huazhong Yang, Yu Wang:
Machine Learning for Electronic Design Automation: A Survey. CoRR abs/2102.03357 (2021) - [i40]Yi Cai, Xuefei Ning, Huazhong Yang, Yu Wang:
Ensemble-in-One: Learning Ensemble within Random Gated Networks for Enhanced Adversarial Robustness. CoRR abs/2103.14795 (2021) - [i39]Chao Yu, Xinyi Yang, Jiaxuan Gao, Huazhong Yang, Yu Wang, Yi Wu:
Learning Efficient Multi-Agent Cooperative Visual Exploration. CoRR abs/2110.05734 (2021) - [i38]Jiayu Chen, Yuanxin Zhang, Yuanfan Xu, Huimin Ma, Huazhong Yang, Jiaming Song, Yu Wang, Yi Wu:
Variational Automatic Curriculum Learning for Sparse-Reward Cooperative Multi-Agent Problems. CoRR abs/2111.04613 (2021) - [i37]Weilin Liu, Ye Mu, Chao Yu, Xuefei Ning, Zhong Cao, Yi Wu, Shuang Liang, Huazhong Yang, Yu Wang:
Multi-Agent Vulnerability Discovery for Autonomous Driving with Hazard Arbitration Reward. CoRR abs/2112.06185 (2021) - 2020
- [j123]Qin Li, Yuze Yang, Tianxiang Lan, Huifeng Zhu, Qi Wei, Fei Qiao
MSP-MFCC: Energy-Efficient MFCC Feature Extraction Method With Mixed-Signal Processing Architecture for Wearable Speech Recognition Applications. IEEE Access 8: 48720-48730 (2020) - [j122]Xuefei Ning
Nonparametric Topic Modeling with Neural Inference. Neurocomputing 399: 296-306 (2020) - [j121]Zhe Yuan, Yongpan Liu
STICKER: An Energy-Efficient Multi-Sparsity Compatible Accelerator for Convolutional Neural Networks in 65-nm CMOS. IEEE J. Solid State Circuits 55(2): 465-477 (2020) - [j120]Yuxuan Huang
Investigation and Modeling of Multi-Node Body Channel Wireless Power Transfer. Sensors 20(1): 156 (2020) - [j119]Bo Zhao, Jingna Mao, Jian Zhao
The Role and Challenges of Body Channel Communication in Wearable Flexible Electronics. IEEE Trans. Biomed. Circuits Syst. 14(2): 283-296 (2020) - [j118]Yi Cai
Enabling Secure NVM-Based in-Memory Neural Network Computing by Sparse Fast Gradient Encryption. IEEE Trans. Computers 69(11): 1596-1610 (2020) - [j117]Yi Cai
Low Bit-Width Convolutional Neural Network on RRAM. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(7): 1414-1427 (2020) - [j116]Yi Cai
Long Live TIME: Improving Lifetime and Security for NVM-Based Training-in-Memory Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 4707-4720 (2020) - [j115]Jingyu Wang
GAAS: An Efficient Group Associated Architecture and Scheduler Module for Sparse CNN Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 5170-5182 (2020) - [j114]Zhe Chen
Processing Near Sensor Architecture in Mixed-Signal Domain With CMOS Image Sensor of Convolutional-Kernel-Readout Method. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(2): 389-400 (2020) - [j113]Zheyu Liu
NS-CIM: A Current-Mode Computation-in-Memory Architecture Enabling Near-Sensor Processing for Intelligent IoT Vision Nodes. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(9): 2909-2922 (2020) - [j112]Hongtao Zhong
One-Shot Refresh: A Low-Power Low-Congestion Approach for Dynamic Memories. IEEE Trans. Circuits Syst. 67-II(12): 3402-3406 (2020) - [j111]Zichen Fan
ASP-SIFT: Using Analog Signal Processing Architecture to Accelerate Keypoint Detection of SIFT Algorithm. IEEE Trans. Very Large Scale Integr. Syst. 28(1): 198-211 (2020) - [c277]Wenshuo Li, Guangjun Ge, Kaiyuan Guo, Xiaoming Chen, Qi Wei, Zhen Gao, Yu Wang, Huazhong Yang:
Soft Error Mitigation for Deep Convolution Neural Network on FPGA Accelerators. AICAS 2020: 1-5 - [c276]Wenshuo Li, Xuefei Ning
FTT-NAS: Discovering Fault-Tolerant Neural Architecture. ASP-DAC 2020: 211-216 - [c275]Hanbo Sun, Zhenhua Zhu, Yi Cai, Xiaoming Chen, Yu Wang, Huazhong Yang:
An Energy-Efficient Quantized and Regularized Training Framework For Processing-In-Memory Accelerators. ASP-DAC 2020: 325-330 - [c274]Juejian Wu, Yixin Xu, Bowen Xue, Yu Wang, Yongpan Liu, Huazhong Yang, Xueqing Li:
Adaptive Circuit Approaches to Low-Power Multi-Level/Cell FeFET Memory. ASP-DAC 2020: 407-413 - [c273]Shulin Zeng, Hanbo Sun, Yu Xing
Black Box Search Space Profiling for Accelerator-Aware Neural Architecture Search. ASP-DAC 2020: 518-523 - [c272]Wenyu Sun, Chen Tang, Zhuqing Yuan, Zhe Yuan, Huazhong Yang, Yongpan Liu:
A 112-765 GOPS/W FPGA-based CNN Accelerator using Importance Map Guided Adaptive Activation Sparsification for Pix2pix Applications. A-SSCC 2020: 1-4 - [c271]Feng Gao, Jincheng Yu, Hao Shen, Yu Wang, Huazhong Yang:
Attentional Separation-and-Aggregation Network for Self-supervised Depth-Pose Learning in Dynamic Scenes. CoRL 2020: 2195-2205 - [c270]Jingyu Wang, Songming Yu, Jinshan Yue, Zhe Yuan, Zhuqing Yuan, Huazhong Yang, Xueqing Li, Yongpan Liu:
High PE Utilization CNN Accelerator with Channel Fusion Supporting Pattern-Compressed Sparse Neural Networks. DAC 2020: 1-6 - [c269]Han Xu, Maimaiti Nazhamaiti
Utilizing Direct Photocurrent Computation and 2D Kernel Scheduling to Improve In-Sensor-Processing Efficiency. DAC 2020: 1-6 - [c268]Jincheng Yu, Zhilin Xu, Shulin Zeng, Chao Yu, Jiantao Qiu, Chaoyang Shen, Yuanfan Xu, Guohao Dai, Yu Wang, Huazhong Yang:
INCA: INterruptible CNN Accelerator for Multi-tasking in Embedded Robots. DAC 2020: 1-6 - [c267]Hongtao Zhong, Mingyang Gu, Juejian Wu, Huazhong Yang, Xueqing Li:
Design of Almost-Nonvolatile Embedded DRAM Using Nanoelectromechanical Relay Devices. DATE 2020: 1223-1228 - [c266]Xuefei Ning
A Generic Graph-Based Neural Architecture Encoding Scheme for Predictor-Based NAS. ECCV (13) 2020: 189-204 - [c265]Wenyu Sun
High-Quality Single-Model Deep Video Compression with Frame-Conv3D and Multi-frame Differential Modulation. ECCV (30) 2020: 239-254 - [c264]Xuefei Ning
DSA: More Efficient Budgeted Pruning via Differentiable Sparsity Allocation. ECCV (3) 2020: 592-607 - [c263]Ming Chen, Guijin Wang, Zijian Ding, Jiawei Li, Huazhong Yang:
Unsupervised Domain Adaptation for ECG Arrhythmia Classification. EMBC 2020: 304-307 - [c262]Zhilin Xu, Jincheng Yu, Chao Yu, Hao Shen, Yu Wang, Huazhong Yang:
CNN-based Feature-point Extraction for Real-time Visual SLAM on Embedded FPGA. FCCM 2020: 33-37 - [c261]Shulin Zeng, Guohao Dai, Hanbo Sun, Kai Zhong, Guangjun Ge, Kaiyuan Guo, Yu Wang, Huazhong Yang:
Enabling Efficient and Flexible FPGA Virtualization for Deep Learning in the Cloud. FCCM 2020: 102-110 - [c260]Jincheng Yu, Zhilin Xu, Shulin Zeng, Chao Yu, Jiantao Qiu, Chaoyang Shen, Yuanfan Xu, Guohao Dai, Yu Wang, Huazhong Yang:
INCAME: INterruptible CNN Accelerator for Multi-robot Exploration. FPGA 2020: 316 - [c259]Shulin Zeng, Guohao Dai, Kai Zhong, Hanbo Sun, Guangjun Ge, Kaiyuan Guo, Yu Wang, Huazhong Yang:
Enable Efficient and Flexible FPGA Virtualization for Deep Learning in the Cloud. FPGA 2020: 317 - [c258]Zhenhua Zhu, Hanbo Sun, Kaizhong Qiu, Lixue Xia, Gokul Krishnan, Guohao Dai, Dimin Niu, Xiaoming Chen, Xiaobo Sharon Hu
MNSIM 2.0: A Behavior-Level Modeling Tool for Memristor-based Neuromorphic Computing Systems. ACM Great Lakes Symposium on VLSI 2020: 83-88 - [c257]Tianyu Fu
LessMine: Reducing Sample Space and Data Access for Dense Pattern Mining. HPEC 2020: 1-7 - [c256]Jingbo Hu, Guohao Dai, Yu Wang, Huazhong Yang:
GraphSDH: A General Graph Sampling Framework with Distribution and Hierarchy. HPEC 2020: 1-7 - [c255]Jincheng Yu, Feng Gao, Jianfei Cao, Chao Yu, Zhaoliang Zhang, Zhengfeng Huang, Yu Wang, Huazhong Yang:
CNN-based Monocular Decentralized SLAM on embedded FPGA. IPDPS Workshops 2020: 66-73 - [c254]Xiaoyu Feng, Jinshan Yue, Zhe Yuan, Huazhong Yang, Yongpan Liu:
RL Based Network Accelerator Compiler for Joint Compression Hyper-Parameter Search. ISCAS 2020: 1-5 - [c253]Yuxuan Huang
An Energy-Efficient Flexible Capacitive Pressure Sensing System. ISCAS 2020: 1-5 - [c252]Qin Li, Sheng Lin, Changlu Liu, Yidong Liu, Fei Qiao, Yanzhi Wang, Huazhong Yang:
NS-KWS: joint optimization of near-sensor processing architecture and low-precision GRU for always-on keyword spotting. ISLPED 2020: 97-102 - [c251]Yixiong Yang, Zhe Yuan, Fang Su, Fanyang Cheng, Zhuqing Yuan, Huazhong Yang, Yongpan Liu:
Multi-channel precision-sparsity-adapted inter-frame differential data codec for video neural network processor. ISLPED 2020: 103-108 - [c250]Mingyen Lee, Wenjun Tang, Bowen Xue, Juejian Wu, Mingyuan Ma, Yu Wang, Yongpan Liu, Deliang Fan, Vijaykrishnan Narayanan
FeFET-based low-power bitwise logic-in-memory with direct write-back and data-adaptive dynamic sensing interface. ISLPED 2020: 127-132 - [c249]Han Xu, Ziru Li, Fei Qiao, Qi Wei, Xinjun Liu, Huazhong Yang:
CDS-RSRAM: a Reconfigurable SRAM Architecture to Reduce Read Power with Column Data Segmentation. ISQED 2020: 52-59 - [c248]Shujuan Yin, Zheyu Liu, Guihong Li, Fei Qiao, Qi Wei, Yuanfeng Wu
RARA: Dataflow Based Error Compensation Methods with Runtime Accuracy-Reconfigurable Adder. ISQED 2020: 60-66 - [c247]Zhe Yuan, Yixiong Yang, Jinshan Yue, Ruoyang Liu, Xiaoyu Feng, Zhiting Lin, Xiulong Wu, Xueqing Li, Huazhong Yang, Yongpan Liu:
14.2 A 65nm 24.7µJ/Frame 12.3mW Activation-Similarity-Aware Convolutional Neural Network Video Processor Using Hybrid Precision, Inter-Frame Data Reuse and Mixed-Bit-Width Difference-Frame Data Codec. ISSCC 2020: 232-234 - [c246]Jinshan Yue, Zhe Yuan, Xiaoyu Feng, Yifan He, Zhixiao Zhang, Xin Si, Ruhui Liu, Meng-Fan Chang, Xueqing Li, Huazhong Yang, Yongpan Liu:
14.3 A 65nm Computing-in-Memory-Based CNN Processor with 2.9-to-35.8TOPS/W System Energy Efficiency Using Dynamic-Sparsity Performance-Scaling Architecture and Energy-Efficient Inter/Intra-Macro Data Reuse. ISSCC 2020: 234-236 - [c245]Yanming Zhang, Xu Qiu, Qin Li, Fei Qiao, Qi Wei, Li Luo, Huazhong Yang:
Optimization and Evaluation of Energy-Efficient Mixed-Signal MFCC Feature Extraction Architecture. ISVLSI 2020: 506-511 - [c244]Guyue Huang, Guohao Dai, Yu Wang, Huazhong Yang:
GE-SpMM: general-purpose sparse matrix-matrix multiplication on GPUs for graph neural networks. SC 2020: 72 - [i36]Xuefei Ning
FTT-NAS: Discovering Fault-Tolerant Neural Architecture. CoRR abs/2003.10375 (2020) - [i35]Shulin Zeng, Guohao Dai, Hanbo Sun, Kai Zhong, Guangjun Ge, Kaiyuan Guo, Yu Wang, Huazhong Yang:
Enabling Efficient and Flexible FPGA Virtualization for Deep Learning in the Cloud. CoRR abs/2003.12101 (2020) - [i34]Xuefei Ning
A Generic Graph-based Neural Architecture Encoding Scheme for Predictor-based NAS. CoRR abs/2004.01899 (2020) - [i33]Xuefei Ning
DSA: More Efficient Budgeted Pruning via Differentiable Sparsity Allocation. CoRR abs/2004.02164 (2020) - [i32]Kai Zhong, Tianchen Zhao, Xuefei Ning, Shulin Zeng, Kaiyuan Guo, Yu Wang, Huazhong Yang:
Towards Lower Bit Multiplication for Convolutional Neural Network Training. CoRR abs/2006.02804 (2020) - [i31]Guyue Huang, Guohao Dai, Yu Wang, Huazhong Yang:
GE-SpMM: General-purpose Sparse Matrix-Matrix Multiplication on GPUs for Graph Neural Networks. CoRR abs/2007.03179 (2020) - [i30]Tong Wu, Xuefei Ning, Wenshuo Li, Ranran Huang, Huazhong Yang, Yu Wang:
Physical Adversarial Attack on Vehicle Detector in the Carla Simulator. CoRR abs/2007.16118 (2020) - [i29]Xuefei Ning, Wenshuo Li, Zixuan Zhou, Tianchen Zhao, Yin Zheng, Shuang Liang, Huazhong Yang, Yu Wang:
A Surgery of the Neural Architecture Evaluators. CoRR abs/2008.03064 (2020) - [i28]Songming Yu, Yongpan Liu, Lu Zhang, Jingyu Wang, Jinshan Yue, Zhuqing Yuan, Xueqing Li, Huazhong Yang:
High Area/Energy Efficiency RRAM CNN Accelerator with Kernel-Reordering Weight Mapping Scheme Based on Pattern Pruning. CoRR abs/2010.06156 (2020) - [i27]Feng Gao, Jincheng Yu, Hao Shen, Yu Wang, Huazhong Yang:
Attentional Separation-and-Aggregation Network for Self-supervised Depth-Pose Learning in Dynamic Scenes. CoRR abs/2011.09369 (2020) - [i26]Tianchen Zhao, Xuefei Ning, Songyi Yang, Shuang Liang, Peng Lei, Jianfei Chen, Huazhong Yang, Yu Wang:
BARS: Joint Search of Cell Topology and Layout for Accurate and Efficient Binary ARchitectures. CoRR abs/2011.10804 (2020) - [i25]Xuefei Ning, Changcheng Tang, Wenshuo Li, Songyi Yang, Tianchen Zhao, Niansong Zhang, Tianyi Lu, Shuang Liang, Huazhong Yang, Yu Wang:
aw_nas: A Modularized and Extensible NAS framework. CoRR abs/2012.10388 (2020) - [i24]Xuefei Ning, Junbo Zhao, Wenshuo Li, Tianchen Zhao, Huazhong Yang, Yu Wang:
Multi-shot NAS for Discovering Adversarially Robust Convolutional Neural Architectures at Targeted Capacities. CoRR abs/2012.11835 (2020)
2010 – 2019
- 2019
- [j110]Xueqing Li
Design of 2T/Cell and 3T/Cell Nonvolatile Memories with Emerging Ferroelectric FETs. IEEE Des. Test 36(3): 39-45 (2019) - [j109]Guijin Wang, Chenshuang Zhang, Yongpan Liu, Huazhong Yang, Dapeng Fu, Haiqing Wang, Ping Zhang
A global and updatable ECG beat classification system based on recurrent neural networks and active learning. Inf. Sci. 501: 523-542 (2019) - [j108]Yongpan Liu
A 130-nm Ferroelectric Nonvolatile System-on-Chip With Direct Peripheral Restore Architecture for Transient Computing System. IEEE J. Solid State Circuits 54(3): 885-895 (2019) - [j107]Li Luo, Zhe Chen, Xinghua Yang, Fei Qiao, Qi Wei, Huazhong Yang:
A single clock cycle approximate adder with hybrid prediction and error compensation methods. Microelectron. J. 87: 45-50 (2019) - [j106]Yuhao Xiao
Guided, Fusion-Based, Large Depth-of-field 3D Imaging Using a Focal Stack. Sensors 19(22): 4845 (2019) - [j105]Wenyu Sun
Dynamic Channel Modeling and OFDM System Analysis for Capacitive Coupling Body Channel Communication. IEEE Trans. Biomed. Circuits Syst. 13(4): 735-745 (2019) - [j104]Jian Zhao
An Auto Loss Co Jian Zhaompensation System for Capacitive-Coupled Body Channel Communication. IEEE Trans. Biomed. Circuits Syst. 13(4): 756-765 (2019) - [j103]Guohao Dai
HyVE: Hybrid Vertex-Edge Memory Hierarchy for Energy-Efficient Graph Processing. IEEE Trans. Computers 68(8): 1131-1146 (2019) - [j102]Guohao Dai
GraphH: A Processing-in-Memory Architecture for Large-Scale Graph Processing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(4): 640-653 (2019) - [j101]Ming Cheng
TIME: A Training-in-Memory Architecture for RRAM-Based Deep Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(5): 834-847 (2019) - [j100]Qinghang Zhao
Design Methodology for TFT-Based Pseudo-CMOS Logic Array With Multilayer Interconnection Architecture and Optimization Algorithms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(11): 2043-2057 (2019) - [j99]Longqiang Lai
Demystifying and Mitigating Code-Dependent Switching Distortions in Current-Steering DACs. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(1): 68-81 (2019) - [j98]Jinshan Yue
A 3.77TOPS/W Convolutional Neural Network Processor With Priority-Driven Kernel Optimization. IEEE Trans. Circuits Syst. II Express Briefs 66-II(2): 277-281 (2019) - [j97]Yixiong Yang
A 2.2-GHz Configurable Direct Digital Frequency Synthesizer Based on LUT and Rotation. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(5): 1970-1980 (2019) - [j96]Fang Su, Yongpan Liu, Xiao Sheng, Hyung Gyu Lee, Naehyuck Chang, Huazhong Yang:
A Task Failure Rate Aware Dual-Channel Solar Power System for Nonvolatile Sensor Nodes. ACM Trans. Embed. Comput. Syst. 18(4): 33:1-33:21 (2019) - [j95]Kaiyuan Guo, Shulin Zeng, Jincheng Yu
[DL] A Survey of FPGA-based Neural Network Inference Accelerators. ACM Trans. Reconfigurable Technol. Syst. 12(1): 2:1-2:26 (2019) - [c243]Xiaoyu Feng, Jinshan Yue, Qingwei Guo, Huazhong Yang, Yongpan Liu:
Accelerating CNN-RNN Based Machine Health Monitoring on FPGA. AICAS 2019: 184-188 - [c242]Guohao Dai, Tianhao Huang, Yu Wang, Huazhong Yang, John Wawrzynek:
GraphSAR: a sparsity-aware processing-in-memory architecture for large-scale graph processing on ReRAMs. ASP-DAC 2019: 120-126 - [c241]Jinshan Yue, Yongpan Liu, Fang Su, Shuangchen Li, Zhe Yuan, Zhibo Wang, Wenyu Sun, Xueqing Li, Huazhong Yang:
AERIS: area/energy-efficient 1T2R ReRAM based processing-in-memory neural network system-on-a-chip. ASP-DAC 2019: 146-151 - [c240]Jingyu Wang, Zhe Yuan, Ruoyang Liu, Huazhong Yang, Yongpan Liu:
An N-way group association architecture and sparse data group association load balancing algorithm for sparse CNN accelerators. ASP-DAC 2019: 329-334 - [c239]Zhe Yuan, Jingyu Wang, Yixiong Yang, Jinshan Yue, Zhibo Wang, Xiaoyu Feng, Yanzhi Wang, Xueqing Li, Huazhong Yang, Yongpan Liu:
A Sparse-Adaptive CNN Processor with Area/Performance balanced N-Way Set-Associate PE Arrays Assisted by a Collision-Aware Scheduler. A-SSCC 2019: 61-64 - [c238]Jian Zhao, Jingna Mao, Wenyu Sun, Yuxuan Huang
A 4-Mbps 41-pJ/bit On-off Keying Transceiver for Body-channel Communication with Enhanced Auto Loss Compensation Technique. A-SSCC 2019: 173-176 - [c237]Zhenhua Zhu, Hanbo Sun, Yujun Lin
A Configurable Multi-Precision CNN Computing Framework Based on Single Bit RRAM. DAC 2019: 56 - [c236]Juejian Wu, Hongtao Zhong, Kai Ni, Yongpan Liu, Huazhong Yang, Xueqing Li:
A 3T/Cell Practical Embedded Nonvolatile Memory Supporting Symmetric Read and Write Access Based on Ferroelectric FETs. DAC 2019: 82 - [c235]Shulin Zeng, Yujun Lin
A Fine-Grained Sparse Accelerator for Multi-Precision DNN. FPGA 2019: 185 - [c234]Kaiyuan Guo, Shuang Liang, Jincheng Yu, Xuefei Ning, Wenshuo Li, Yu Wang, Huazhong Yang:
Compressed CNN Training with FPGA-based Accelerator. FPGA 2019: 189 - [c233]Xuedi Wang, Xueqing Li, Longqiang Lai, Huazhong Yang:
A 16b Clockless Digital-to-Analog Converter with Ultra-Low-Cost Poly Resistors Supporting Wide-Temperature Range from -40°C to 85°C. ACM Great Lakes Symposium on VLSI 2019: 267-270 - [c232]Zheyu Liu, Guihong Li, Fei Qiao, Qi Wei, Ping Jin, Xinjun Liu, Huazhong Yang:
Concrete: A Per-layer Configurable Framework for Evaluating DNN with Approximate Operators. ICASSP 2019: 1552-1556 - [c231]Yi Cai, Xiaoming Chen, Lu Tian, Yu Wang, Huazhong Yang:
Enabling Secure in-Memory Neural Network Computing by Sparse Fast Gradient Encryption. ICCAD 2019: 1-8 - [c230]Zheyu Liu, Kaige Jia, Weiqiang Liu, Qi Wei, Fei Qiao, Huazhong Yang:
INA: Incremental Network Approximation Algorithm for Limited Precision Deep Neural Networks. ICCAD 2019: 1-7 - [c229]Zhenhua Zhu, Mingyuan Ma, Jialong Liu, Liying Xu, Xiaoming Chen, Yuchao Yang, Yu Wang, Huazhong Yang:
A General Logic Synthesis Framework for Memristor-based Logic Design. ICCAD 2019: 1-8 - [c228]Jialong Liu, Mingyuan Ma, Zhenhua Zhu, Yu Wang, Huazhong Yang:
HDC-IM: Hyperdimensional Computing In-Memory Architecture based on RRAM. ICECS 2019: 450-453 - [c227]Jinshan Yue, Ruoyang Liu, Wenyu Sun, Zhe Yuan, Zhibo Wang, Yung-Ning Tu, Yi-Ju Chen, Ao Ren, Yanzhi Wang, Meng-Fan Chang, Xueqing Li, Huazhong Yang, Yongpan Liu:
A 65nm 0.39-to-140.3TOPS/W 1-to-12b Unified Neural Network Processor Using Block-Circulant-Enabled Transpose-Domain Acceleration with 8.1 × Higher TOPS/mm2and 6T HBST-TRAM-Based 2D Data-Reuse Architecture. ISSCC 2019: 138-140 - [c226]Yiming Hu, Shuang Liang, Jincheng Yu, Yu Wang, Huazhong Yang:
On-Chip Instruction Generation for Cross-Layer CNN Accelerator on FPGA. ISVLSI 2019: 7-12 - [c225]Zheyu Liu, Zichen Fan, Qi Wei, Xing Wu, Fei Qiao, Ping Jin, Xinjun Liu, Chengliang Liu, Huazhong Yang:
Design of Switched-Current Based Low-Power PIM Vision System for IoT Applications. ISVLSI 2019: 181-186 - [c224]Zheyu Liu, Erxiang Ren
A 1.8mW Perception Chip with Near-Sensor Processing Scheme for Low-Power AIoT Applications. ISVLSI 2019: 447-452 - [c223]Changlu Liu, Tianxiang Lan, Qin Li, Kaige Jia, Yidian Fan, Xing Wu, Fei Qiao, Wei Qi, Xin-Jun Liu, Huazhong Yang:
Energy-efficient Analog Processing Architecture for Direction of Arrival with Microphone Array. ISVLSI 2019: 507-512 - [c222]Juejian Wu, Mingyang Gu, Hongtao Zhong, Yunsong Tao
Enabling New Computing Paradigms with Emerging Symmetric-Access Memories. NANOARCH 2019: 1-6 - 2018
- [j94]Lixue Xia
Stuck-at Fault Tolerance in RRAM Computing Systems. IEEE J. Emerg. Sel. Topics Circuits Syst. 8(1): 102-115 (2018) - [j93]Longqiang Lai
Redundancy-bandwidth scalable techniques for signal-independent element transition rates in high-speed current-steering DACs. Int. J. Circuit Theory Appl. 46(5): 1006-1027 (2018) - [j92]Li Luo, Yakun Wu, Fei Qiao
Design of FPGA-Based Accelerator for Convolutional Neural Network under Heterogeneous Computing Framework with OpenCL. Int. J. Reconfigurable Comput. 2018: 1785892:1-1785892:10 (2018) - [j91]Qin Li, Yuntao Wu
High linearity source-follower buffer based analog memory for analog convolutional neural network. Microelectron. J. 75: 147-152 (2018) - [j90]Guijin Wang, Wentao Li, Xuanwu Yin, Huazhong Yang:
All-in-focus with directional-max-gradient flow and labeled iterative depth propagation. Pattern Recognit. 77: 173-187 (2018) - [j89]Jingna Mao
A Five-Tissue-Layer Human Body Communication Circuit Model Tunable to Individual Characteristics. IEEE Trans. Biomed. Circuits Syst. 12(2): 303-312 (2018) - [j88]Kaiyuan Guo, Lingzhi Sui, Jiantao Qiu, Jincheng Yu, Junbin Wang, Song Yao, Song Han, Yu Wang
Angel-Eye: A Complete Design Flow for Mapping CNN Onto Embedded FPGA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(1): 35-47 (2018) - [j87]Lixue Xia
MNSIM: Simulation Platform for Memristor-Based Neuromorphic Computing System. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(5): 1009-1022 (2018) - [j86]Xiaoming Chen, Qiaoyi Liu, Song Yao, Jia Wang, Qiang Xu
Hardware Trojan Detection in Third-Party Digital Intellectual Property Cores by Multilevel Feature Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(7): 1370-1383 (2018) - [j85]Yuliang Sun
Bidirectional Database Storage and SQL Query Exploiting RRAM-Based Process-in-Memory Structure. ACM Trans. Storage 14(1): 8:1-8:19 (2018) - [j84]Jincheng Yu
Instruction Driven Cross-layer CNN Accelerator for Fast Detection on FPGA. ACM Trans. Reconfigurable Technol. Syst. 11(3): 22:1-22:23 (2018) - [j83]Jinyang Li
PATH: Performance-Aware Task Scheduling for Energy-Harvesting Nonvolatile Processors. IEEE Trans. Very Large Scale Integr. Syst. 26(9): 1671-1684 (2018) - [c221]Huifeng Zhu, Qi Wei, Fei Qiao, Yi Yang, Xinjun Liu, Shuzheng Xu, Huazhong Yang:
CMOS Image Sensor Data-Readout Method for Convolutional Operations with Processing Near Sensor Architecture. APCCAS 2018: 528-531 - [c220]Yi Cai, Tianqi Tang, Lixue Xia
Training low bitwidth convolutional neural network on RRAM. ASP-DAC 2018: 117-122 - [c219]Wenyu Sun, Yuxuan Huang
Mechanical strain and temperature aware design methodology for thin-film transistor based pseudo-CMOS logic array. ASP-DAC 2018: 645-650 - [c218]Yuxuan Huang
An Investigation on Inter-degeneration Effect in Body Channel Based Multi-node Wireless Power Transfer. BioCAS 2018: 1-4 - [c217]Cairong Zhang, Guijin Wang, Xinghao Chen, Huazhong Yang:
Bi-stream Region Ensemble Network: Promoting Accuracy in Fingertip Localization from Stereo Images. BMVC 2018: 314 - [c216]Kaige Jia, Zheyu Liu, Qi Wei, Fei Qiao, Xinjun Liu, Yi Yang, Hua Fan, Huazhong Yang:
Calibrating process variation at system level with in-situ low-precision transfer learning for analog neural network processors. DAC 2018: 12:1-12:6 - [c215]Yi Cai, Yujun Lin
Long live TIME: improving lifetime for training-in-memory engines by structured gradient sparsification. DAC 2018: 107:1-107:6 - [c214]Jilan Lin, Lixue Xia, Zhenhua Zhu, Hanbo Sun, Yi Cai, Hui Gao, Ming Cheng, Xiaoming Chen, Yu Wang, Huazhong Yang:
Rescuing memristor-based computing with non-linear resistance levels. DATE 2018: 407-412 - [c213]Jincheng Yu, Kaiyuan Guo, Yiming Hu, Xuefei Ning, Jiantao Qiu, Huizi Mao, Song Yao, Tianqi Tang, Boxun Li, Yu Wang, Huazhong Yang:
Real-time object detection towards high power efficiency. DATE 2018: 704-708 - [c212]Tianhao Huang, Guohao Dai, Yu Wang, Huazhong Yang:
HyVE: Hybrid vertex-edge memory hierarchy for energy-efficient graph processing. DATE 2018: 973-978 - [c211]Jingxuan Hou, Guijin Wang, Xinghao Chen, Jing-Hao Xue, Rui Zhu, Huazhong Yang:
Spatial-Temporal Attention Res-TCN for Skeleton-Based Dynamic Hand Gesture Recognition. ECCV Workshops (6) 2018: 273-286 - [c210]Zhourui Xia, Guijin Wang, Dapeng Fu, Haiqing Wang, Ming Chen, Pengwei Xie, Huazhong Yang:
Real-Time ECG Delineation with Randomly Selected Wavelet Transform Feature and Random Walk Estimation. EMBC 2018: 1-4 - [c209]Pengwei Xie, Guijin Wang, Chenshuang Zhang, Ming Chen, Huazhong Yang, Tingting Lv, Zhenhua Sang, Ping Zhang
Bidirectional Recurrent Neural Network And Convolutional Neural Network (BiRCNN) For ECG Beat Classification. EMBC 2018: 2555-2558 - [c208]Ming Chen, Guijin Wang, Pengwei Xie, Zhenhua Sang, Tingting Lv, Ping Zhang
Region Aggregation Network: Improving Convolutional Neural Network for ECG Characteristic Detection. EMBC 2018: 2559-2562 - [c207]Jingna Mao, Huazhong Yang, Yong Lian
Channel Loss in Contactless Human Body Communication. EMBC 2018: 3762-3765 - [c206]Guohao Dai, Tianhao Huang, Yu Wang, Huazhong Yang, John Wawrzynek:
NewGraph: Balanced Large-Scale Graph Processing on FPGAs with Low Preprocessing Overheads. FCCM 2018: 208 - [c205]Zhenhua Zhu, Jilan Lin
Mixed size crossbar based RRAM CNN accelerator with overlapped mapping method. ICCAD 2018: 69 - [c204]Xuedi Wang, Zhe Chen, Kaige Jia, Jie Han, Qi Wei, Fei Qiao, Huazhong Yang:
Approximate On-chip Memory Optimization Method For Deep Residual Networks. DSP 2018: 1-5 - [c203]Shulin Zeng, Kaiyuan Guo, Shaoxia Fang, Junlong Kang, Dongliang Xie, Yi Shan, Yu Wang, Huazhong Yang:
An Efficient Reconfigurable Framework for General Purpose CNN-RNN Models on FPGAs. DSP 2018: 1-5 - [c202]Wentao Li, Guijin Wang, Xiaowei Hu, Huazhong Yang:
Scene-Adaptive Image Acquisition for Focus Stacking. ICIP 2018: 1887-1891 - [c201]Jingyang Zhang, Kaige Jia, Pengshuai Yang, Fei Qiao, Qi Wei, Xinjun Liu, Huazhong Yang:
MINTIN: Maxout-Based and Input-Normalized Transformation Invariant Neural Network. ICIP 2018: 3014-3018 - [c200]Anqi Yang, Pengjun Wang, Huazhong Yang:
Blind Drift Calibration of Sensor Networks Using Multi-Output Gaussian Process. IEEE SENSORS 2018: 1-4 - [c199]Yixiong Yang, Zhibo Wang, Pei Yang, Meng-Fan Chang, Mon-Shu Ho, Huazhong Yang, Yongpan Liu:
A 2-GHz Direct Digital Frequency Synthesizer Based on LUT and Rotation. ISCAS 2018: 1-5 - [c198]Jian Zhao, Jingna Mao, Tong Zhou, Longqiang Lai, Huazhong Yang, Bo Zhao:
An Auto Loss Compensation System for Non-contact Capacitive Coupled Body Channel Communication. ISCAS 2018: 1-5 - [c197]Xin Shi, Tongda Wu, Keni Qiu, Huazhong Yang, Yongpan Liu:
Time Stamp Based Scheduling for Energy Harvesting Systems with Hybrid Nonvolatile Hardware Support. ISVLSI 2018: 339-344 - [c196]Kaiyuan Guo, Jincheng Yu, Xuefei Ning, Yiming Hu, Yu Wang, Huazhong Yang:
RRAM Based Buffer Design for Energy Efficient CNN Accelerator. ISVLSI 2018: 435-440 - [c195]Wenshuo Li, Jincheng Yu, Xuefei Ning, Pengjun Wang, Qi Wei, Yu Wang, Huazhong Yang:
Hu-Fu: Hardware and Software Collaborative Attack Framework Against Neural Networks. ISVLSI 2018: 482-487 - [c194]Zheyu Liu, Erxiang Ren
Energy Efficient ApproxSIFT Implementation for Image Mosaic with Approximate Computing Technologies. MWSCAS 2018: 480-483 - [c193]Qin Li, Huifeng Zhu, Fei Qiao, Qi Wei, Xinjun Liu, Huazhong Yang:
Energy-efficient MFCC extraction architecture in mixed-signal domain for automatic speech recognition. NANOARCH 2018: 138-140 - [c192]Tongda Wu, Lefan Zhang, Huazhong Yang, Yongpan Liu:
An extensible system simulator for intermittently-powered multiple-peripheral IoT devices. ENSsys@SenSys 2018: 1-6 - [c191]Han Xu, Fei Qiao, Zhe Chen, Qi Wei, Xinjun Liu, Huazhong Yang:
Energy-Efficient SRAM Design with Data-Aware Dual-Modes L0T Storage Cell for CNN Processors. SoCC 2018: 278-283 - [c190]Cairong Zhang
Interactive Hand Pose Estimation: Boosting accuracy in localizing extended finger joints. Visual Information Processing and Communication 2018 - [c189]Zhe Yuan, Jinshan Yue, Huanrui Yang, Zhibo Wang, Jinyang Li, Yixiong Yang, Qingwei Guo, Xueqing Li, Meng-Fan Chang, Huazhong Yang, Yongpan Liu:
Sticker: A 0.41-62.1 TOPS/W 8Bit Neural Network Processor with Multi-Sparsity Compatible Convolution Arrays and Online Tuning Acceleration for Fully Connected Layers. VLSI Circuits 2018: 33-34 - [i23]Cairong Zhang, Guijin Wang, Hengkai Guo, Xinghao Chen, Fei Qiao, Huazhong Yang:
Interactive Hand Pose Estimation: Boosting accuracy in localizing extended finger joints. CoRR abs/1804.00651 (2018) - [i22]Yi Wei, Guijin Wang, Cairong Zhang, Hengkai Guo, Xinghao Chen, Huazhong Yang:
Two-Stream Binocular Network: Accurate Near Field Finger Detection Based On Binocular Images. CoRR abs/1804.10160 (2018) - [i21]Wenshuo Li, Jincheng Yu, Xuefei Ning, Pengjun Wang, Qi Wei, Yu Wang, Huazhong Yang:
Hu-Fu: Hardware and Software Collaborative Attack Framework against Neural Networks. CoRR abs/1805.05098 (2018) - [i20]Xuefei Ning, Yin Zheng, Zhuxi Jiang, Yu Wang, Huazhong Yang, Junzhou Huang:
Nonparametric Topic Modeling with Neural Inference. CoRR abs/1806.06583 (2018) - 2017
- [j82]Xinghua Yang, Yue Xing, Fei Qiao, Huazhong Yang:
Multistage Latency Adders Architecture Employing Approximate Computing. J. Circuits Syst. Comput. 26(3): 1750039:1-1750039:18 (2017) - [j81]Albert Lee, Chieh-Pu Lo
A ReRAM-Based Nonvolatile Flip-Flop With Self-Write-Termination Scheme for Frequent-OFF Fast-Wake-Up Nonvolatile Processors. IEEE J. Solid State Circuits 52(8): 2194-2207 (2017) - [j80]Zhibo Wang, Yongpan Liu
A 65-nm ReRAM-Enabled Nonvolatile Processor With Time-Space Domain Adaption and Self-Write-Termination Achieving > 4× Faster Clock Frequency and > 6× Higher Restore Speed. IEEE J. Solid State Circuits 52(10): 2769-2785 (2017) - [j79]Kaiyuan Guo, Song Han, Song Yao, Yu Wang, Yuan Xie, Huazhong Yang:
Software-Hardware Codesign for Efficient Neural Network Acceleration. IEEE Micro 37(2): 18-25 (2017) - [j78]Pengpeng Chen, Huazhong Yang, Rong Luo, Bo Zhao:
All-Digital Galvanically-Coupled BCC Receiver Resilient to Frequency Misalignment. IEEE Trans. Biomed. Circuits Syst. 11(3): 714-726 (2017) - [j77]Jingna Mao, Huazhong Yang, Bo Zhao:
An Investigation on Ground Electrodes of Capacitive Coupling Human Body Communication. IEEE Trans. Biomed. Circuits Syst. 11(4): 910-919 (2017) - [j76]Jingna Mao, Huazhong Yang, Yong Lian
A Self-Adaptive Capacitive Compensation Technique for Body Channel Communication. IEEE Trans. Biomed. Circuits Syst. 11(5): 1001-1012 (2017) - [j75]Xiaoming Chen, Lin Wang, Yu Wang
A General Framework for Hardware Trojan Detection in Digital Circuits by Statistical Learning Algorithms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(10): 1633-1646 (2017) - [j74]Yongpan Liu
Data Backup Optimization for Nonvolatile SRAM in Energy Harvesting Sensor Nodes. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(10): 1660-1673 (2017) - [j73]Fang Su, Yongpan Liu, Yiqun Wang, Huazhong Yang:
A Ferroelectric Nonvolatile Processor with 46 $\mu $ s System-Level Wake-up Time and 14 $\mu $ s Sleep Time for Energy Harvesting Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(3): 596-607 (2017) - [j72]Yinan Sun, Zhe Yuan, Yongpan Liu
Maximum Energy Efficiency Tracking Circuits for Converter-Less Energy Harvesting Sensor Nodes. IEEE Trans. Circuits Syst. II Express Briefs 64-II(6): 670-674 (2017) - [j71]Zhe Yuan, Yongpan Liu
CP-FPGA: Energy-Efficient Nonvolatile FPGA With Offline/Online Checkpointing Optimization. IEEE Trans. Very Large Scale Integr. Syst. 25(7): 2153-2163 (2017) - [j70]Tongda Wu
DVFS-Based Long-Term Task Scheduling for Dual-Channel Solar-Powered Sensor Nodes. IEEE Trans. Very Large Scale Integr. Syst. 25(11): 2981-2994 (2017) - [c188]Tianqi Tang, Lixue Xia
Binary convolutional neural network on RRAM. ASP-DAC 2017: 782-787 - [c187]Wenqin Huangfu, Lixue Xia
Computation-oriented fault-tolerance schemes for RRAM computing systems. ASP-DAC 2017: 794-799 - [c186]Jingna Mao, Jian Zhao, Guijin Wang, Huazhong Yang, Bo Zhao:
Live demonstration: A hand gesture recognition wristband employing low power body channel communication. BioCAS 2017: 1 - [c185]Jingna Mao, Jian Zhao, Huazhong Yang, Bo Zhao:
Using human body as a monopole antenna for energy harvesting from ambient electromagnetic energy. BioCAS 2017: 1-4 - [c184]Jian Zhao, Jingna Mao, Guijin Wang, Huazhong Yang, Bo Zhao:
A miniaturized wearable wireless hand gesture recognition system employing deep-forest classifier. BioCAS 2017: 1-4 - [c183]Ming Cheng, Lixue Xia
TIME: A Training-in-memory Architecture for Memristor-based Deep Neural Networks. DAC 2017: 26:1-26:6 - [c182]Qinghang Zhao, Yongpan Liu, Wenyu Sun, Jiaqing Zhao, Hailong Yao, Xiaojun Guo, Huazhong Yang:
Design Methodology for Thin-Film Transistor Based Pseudo-CMOS Logic Array with Multi-Layer Interconnect Architecture. DAC 2017: 80:1-80:6 - [c181]Song Han, Junlong Kang, Huizi Mao, Yiming Hu, Xin Li, Yubin Li, Dongliang Xie, Hong Luo, Song Yao, Yu Wang, Huazhong Yang, William (Bill) J. Dally:
ESE: Efficient Speech Recognition Engine with Sparse LSTM on FPGA. FPGA 2017: 75-84 - [c180]Guohao Dai, Tianhao Huang, Yuze Chi, Ningyi Xu, Yu Wang, Huazhong Yang:
ForeGraph: Exploring Large-scale Graph Processing on Multi-FPGA Architecture. FPGA 2017: 217-226 - [c179]Jincheng Yu, Yiming Hu, Xuefei Ning, Jiantao Qiu, Kaiyuan Guo, Yu Wang, Huazhong Yang:
Instruction driven cross-layer CNN accelerator with winograd transformation on FPGA. FPT 2017: 227-230 - [c178]Baofu Zhao, Yubin Li, Yu Wang, Huazhong Yang:
Streaming sorting network based BWT acceleration on FPGA for lossless compression. FPT 2017: 247-250 - [c177]Yuanchang Chen, Yizhe Zhu, Fei Qiao, Jie Han, Yuansheng Liu, Huazhong Yang:
Evaluating Data Resilience in CNNs from an Approximate Memory Perspective. ACM Great Lakes Symposium on VLSI 2017: 89-94 - [c176]Jinyang Li, Qingwei Guo, Fang Su, Zhe Yuan, Jinshan Yue, Jingtong Hu, Huazhong Yang, Yongpan Liu:
CNN-based pattern recognition on nonvolatile IoT platform for smart ultraviolet monitoring: (Invited paper). ICCAD 2017: 888-893 - [c175]Wentao Li, Guijin Wang, Xuanwu Yin, Xiaowei Hu, Huazhong Yang:
Depth-Based Focus Stacking with Labeled-Laplacian Propagation. ICIG (3) 2017: 36-46 - [c174]Hengkai Guo, Guijin Wang, Xinghao Chen, Cairong Zhang, Fei Qiao, Huazhong Yang:
Region ensemble network: Improving convolutional network for hand pose estimation. ICIP 2017: 4512-4516 - [c173]Qin Li, Zheyu Liu, Fei Qiao, Xing Wu, Chaolun Wang, Qi Wei, Huazhong Yang:
From "MISSION: IMPOSSIBLE" to mission possible: Fully flexible intelligent contact lens for image classification with analog-to-information processing. ISCAS 2017: 1-4 - [c172]Wenyu Sun, Qinghang Zhao, Fei Qiao, Yongpan Liu, Huazhong Yang, Xiaojun Guo, Lei Zhou, Lei Wang:
An 8b 0.8kS/s configurable VCO-based ADC using oxide TFTs with Inkjet printing interconnection. ISCAS 2017: 1-4 - [c171]Zhe Yuan, Yongpan Liu, Jinshan Yue, Jinyang Li, Huazhong Yang:
CORAL: Coarse-grained reconfigurable architecture for Convolutional Neural Networks. ISLPED 2017: 1-6 - [c170]Wei-Hao Chen, Win-San Khwa, Jun-Yi Li, Wei-Yu Lin, Huan-Ting Lin, Yongpan Liu, Yu Wang, Huaqiang Wu, Huazhong Yang, Meng-Fan Chang:
Circuit design for beyond von Neumann applications using emerging memory: From nonvolatile logics to neuromorphic computing. ISQED 2017: 23-28 - [c169]Xiaoming Chen, Qiaoyi Liu, Yu Wang, Qiang Xu
Low-overhead implementation of logic encryption using gate replacement techniques. ISQED 2017: 257-263 - [c168]Kaige Jia, Zheyu Liu, Fei Qiao, Xinjun Liu, Qi Wei, Huazhong Yang:
AICNN: Implementing Typical CNN Algorithms with Analog-to-Information Conversion Architecture. ISVLSI 2017: 80-85 - [c167]Hong Liu, Zheyu Liu, Fei Qiao, Mark Po-Hung Lin
AIsim: Functional Simulator for Analog-to-Information Perceptual Systems. ISVLSI 2017: 507-512 - [c166]Yuliang Sun, Yu Wang, Huazhong Yang:
Energy-efficient SQL query exploiting RRAM-based process-in-memory structure. NVMSA 2017: 1-6 - [c165]Yi Wei, Guijin Wang, Cairong Zhang, Hengkai Guo, Xinghao Chen, Huazhong Yang:
Two-stream binocular network: Accurate near field finger detection based on binocular images. VCIP 2017: 1-4 - [i19]Hengkai Guo, Guijin Wang, Xinghao Chen, Cairong Zhang, Fei Qiao, Huazhong Yang:
Region Ensemble Network: Improving Convolutional Network for Hand Pose Estimation. CoRR abs/1702.02447 (2017) - [i18]Yuzhi Wang, Anqi Yang, Xiaoming Chen, Pengjun Wang, Yu Wang, Huazhong Yang:
A Deep Learning Approach for Blind Drift Calibration of Sensor Networks. CoRR abs/1707.03682 (2017) - [i17]Kaiyuan Guo, Shulin Zeng, Jincheng Yu, Yu Wang, Huazhong Yang:
A Survey of FPGA Based Neural Network Accelerator. CoRR abs/1712.08934 (2017) - 2016
- [j69]Boxun Li, Peng Gu, Yu Wang, Huazhong Yang:
Exploring the Precision Limitation for RRAM-Based Analog Approximate Computing. IEEE Des. Test 33(1): 51-58 (2016) - [j68]Xinghua Yang, Nanyang Huang, Yuanchang Chen, Fei Qiao, Huazhong Yang:
A priority-based selective bit dropping strategy to reduce DRAM and SRAM power in image processing. IEICE Electron. Express 13(23): 20160990 (2016) - [j67]Rangkun Li, Shuzheng Xu, Huazhong Yang:
Spread spectrum audio watermarking based on perceptual characteristic aware extraction. IET Signal Process. 10(3): 266-273 (2016) - [j66]Lixue Xia
Technological Exploration of RRAM Crossbar Array for Matrix-Vector Multiplication. J. Comput. Sci. Technol. 31(1): 3-19 (2016) - [j65]Rangkun Li, Shuzheng Xu, Bo Rong, Huazhong Yang:
Host cancelation-based spread spectrum watermarking for audio anti-piracy over Internet. Secur. Commun. Networks 9(17): 4691-4702 (2016) - [j64]Yiqun Wang, Yongpan Liu, Cong Wang, Zewei Li, Xiao Sheng, Hyung Gyu Lee, Naehyuck Chang, Huazhong Yang:
Storage-Less and Converter-Less Photovoltaic Energy Harvesting With Maximum Power Point Tracking for Internet of Things. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(2): 173-186 (2016) - [j63]Daming Zhang, Yongpan Liu, Jinyang Li, Chun Jason Xue, Xueqing Li, Yu Wang, Huazhong Yang:
Solar Power Prediction Assisted Intra-task Scheduling for Nonvolatile Sensor Nodes. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(5): 724-737 (2016) - [j62]Xiaoming Chen, Lin Wang, Boxun Li, Yu Wang, Xin Li, Yongpan Liu, Huazhong Yang:
Modeling Random Telegraph Noise as a Randomness Source and its Application in True Random Number Generation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(9): 1435-1448 (2016) - [j61]Xiaoming Chen, Boxun Li, Yu Wang, Yongpan Liu, Huazhong Yang:
A Unified Methodology for Designing Hardware Random Number Generators Based on Any Probability Distribution. IEEE Trans. Circuits Syst. II Express Briefs 63-II(8): 783-787 (2016) - [j60]Daming Zhang, Shuangchen Li, Yongpan Liu, Xiaobo Sharon Hu
A C2RTL Framework Supporting Partition, Parallelization, and FIFO Sizing for Streaming Applications. ACM Trans. Design Autom. Electr. Syst. 21(2): 19:1-19:32 (2016) - [c164]Yizi Gu, Yongpan Liu, Yiqun Wang, Hehe Li, Huazhong Yang:
NVPsim: A simulator for architecture explorations of nonvolatile processors. ASP-DAC 2016: 147-152 - [c163]Zhe Yuan, Yongpan Liu, Hehe Li, Huazhong Yang:
CP-FPGA: Computation data-aware software/hardware co-design for nonvolatile FPGAs based on checkpointing techniques. ASP-DAC 2016: 569-574 - [c162]Jinyang Li, Yongpan Liu, Hehe Li, Rui Hua
Accurate personal ultraviolet dose estimation with multiple wearable sensors. BSN 2016: 347-352 - [c161]Yu Wang, Lixue Xia
RRAM based learning acceleration. CASES 2016: 9:1-9:2 - [c160]Lixue Xia
Switched by input: power efficient structure for RRAM-based convolutional neural network. DAC 2016: 125:1-125:6 - [c159]Zewei Li, Yongpan Liu, Daming Zhang, Chun Jason Xue, Zhangyuan Wang, Xin Shi, Wenyu Sun, Jiwu Shu, Huazhong Yang:
HW/SW co-design of nonvolatile IO system in energy harvesting sensor nodes for optimal data acquisition. DAC 2016: 154:1-154:6 - [c158]Hehe Li, Yongpan Liu, Chenchen Fu, Chun Jason Xue, Donglai Xiang
Performance-aware task scheduling for energy harvesting nonvolatile processors considering power switching overhead. DAC 2016: 156:1-156:6 - [c157]Lixue Xia, Boxun Li, Tianqi Tang, Peng Gu, Xiling Yin, Wenqin Huangfu, Pai-Yu Chen, Shimeng Yu, Yu Cao, Yu Wang, Yuan Xie, Huazhong Yang:
MNSIM: Simulation platform for memristor-based neuromorphic computing system. DATE 2016: 469-474 - [c156]Xiaoming Chen, Lixue Xia, Yu Wang, Huazhong Yang:
Sparsity-oriented sparse solver design for circuit simulation. DATE 2016: 1580-1585 - [c155]Jiantao Qiu, Jie Wang, Song Yao, Kaiyuan Guo, Boxun Li, Erjin Zhou, Jincheng Yu, Tianqi Tang, Ningyi Xu, Sen Song, Yu Wang, Huazhong Yang:
Going Deeper with Embedded FPGA Platform for Convolutional Neural Network. FPGA 2016: 26-35 - [c154]Guohao Dai, Yuze Chi, Yu Wang, Huazhong Yang:
FPGP: Graph Processing Framework on FPGA A Case Study of Breadth-First Search. FPGA 2016: 105-110 - [c153]Xijie Jia
SRI-SURF: A better SURF powered by scaled-RAM interpolator on FPGA. FPL 2016: 1-8 - [c152]Yubin Li, Yuliang Sun, Guohao Dai, Qiang Xu
Approximate Frequent Itemset Mining for streaming data on FPGA. FPL 2016: 1-4 - [c151]Kaiyuan Guo, Lingzhi Sui, Jiantao Qiu, Song Yao, Song Han, Yu Wang, Huazhong Yang:
From model to FPGA: Software-hardware co-design for efficient neural network acceleration. Hot Chips Symposium 2016: 1-27 - [c150]Yi Li, Fei Qiao, Xinghua Yang, Qi Wei, Huazhong Yang:
A precision-improved processing architecture of physical computing for energy-efficient SIFT feature extraction. ICASSP 2016: 1041-1044 - [c149]Yuze Chi, Guohao Dai, Yu Wang, Guangyu Sun, Guoliang Li, Huazhong Yang:
NXgraph: An efficient graph processing system on a single machine. ICDE 2016: 409-420 - [c148]Yu Wang, Lixue Xia
Low power Convolutional Neural Networks on a chip. ISCAS 2016: 129-132 - [c147]Jingna Mao, Bo Zhao, Yong Lian
A self-adaptive body channel communication scheme for backward path loss reduction. ISCAS 2016: 2034-2037 - [c146]Tongda Wu, Yongpan Liu, Hehe Li, Chun Jason Xue, Hyung Gyu Lee, Huazhong Yang:
SATS: An Ultra-Low Power Time Synchronization for Solar Energy Harvesting WSNs. ISLPED 2016: 106-111 - [c145]Zheyu Liu, Fei Qiao, Qi Wei, Xinghua Yang, Yi Li, Huazhong Yang:
An ultra-fast and low-power design of analog circuit network for DoG pyramid construction of SIFT algorithm. ISQED 2016: 392-397 - [c144]Yongpan Liu, Zhibo Wang, Albert Lee, Fang Su, Chieh-Pu Lo
4.7 A 65nm ReRAM-enabled nonvolatile processor with 6× reduction in restore time and 4× higher clock frequency using adaptive data retention and self-write-termination nonvolatile logic. ISSCC 2016: 84-86 - [c143]Kaiyuan Guo, Lingzhi Sui, Jiantao Qiu, Song Yao, Song Han, Yu Wang, Huazhong Yang:
Angel-Eye: A Complete Design Flow for Mapping CNN onto Customized Hardware. ISVLSI 2016: 24-29 - [c142]Xinghua Yang, Yue Xing, Fei Qiao, Qi Wei, Huazhong Yang:
Approximate Adder with Hybrid Prediction and Error Compensation Technique. ISVLSI 2016: 373-378 - [c141]Yuanchang Chen, Xinghua Yang, Fei Qiao, Jie Han, Qi Wei, Huazhong Yang:
A Multi-accuracy-Level Approximate Memory Architecture Based on Data Significance Analysis. ISVLSI 2016: 385-390 - [c140]Nan Wu
A Real-Time and Energy-Efficient Implementation of Difference-of-Gaussian with Flexible Thin-Film Transistors. ISVLSI 2016: 455-460 - [c139]Zhibo Wang, Rui Hua
A compare-and-select error tolerant scheme for nonvolatile processors. NANOARCH 2016: 21-22 - [i16]Nan Wu, Zheyu Liu, Fei Qiao, Xiaojun Guo, Qi Wei, Yuan Xie, Huazhong Yang:
A Real-Time and Energy-Efficient Implementation of Difference-of-Gaussian with Flexible Thin-Film Transistors. CoRR abs/1603.01954 (2016) - [i15]Song Han, Junlong Kang, Huizi Mao, Yiming Hu, Xin Li, Yubin Li, Dongliang Xie, Hong Luo, Song Yao, Yu Wang, Huazhong Yang, William J. Dally:
ESE: Efficient Speech Recognition Engine with Compressed LSTM on FPGA. CoRR abs/1612.00694 (2016) - 2015
- [j59]Yinan Sun, Yongpan Liu, Zhibo Wang, Huazhong Yang:
Multistage Function Speculation Adders. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 98-A(4): 954-965 (2015) - [j58]Boxun Li, Peng Gu, Yi Shan, Yu Wang
RRAM-Based Analog Approximate Computing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(12): 1905-1917 (2015) - [j57]Xiaoming Chen, Ling Ren, Yu Wang
GPU-Accelerated Sparse LU Factorization for Circuit Simulation with Performance Modeling. IEEE Trans. Parallel Distributed Syst. 26(3): 786-795 (2015) - [j56]Bo Zhao, Huazhong Yang:
Supply-Noise Interactions Among Submodules Inside a Charge-Pump PLL. IEEE Trans. Very Large Scale Integr. Syst. 23(4): 771-775 (2015) - [j55]Wulong Liu, Yu Wang
Whitespace-Aware TSV Arrangement in 3-D Clock Tree Synthesis. IEEE Trans. Very Large Scale Integr. Syst. 23(9): 1842-1853 (2015) - [j54]Yu Wang, Song Yao, Shuai Tao, Xiaoming Chen, Yuchun Ma, Yiyu Shi, Huazhong Yang:
HS3-DPG: Hierarchical Simulation for 3-D P/G Network. IEEE Trans. Very Large Scale Integr. Syst. 23(10): 2307-2311 (2015) - [c138]Peng Gu, Boxun Li, Tianqi Tang, Shimeng Yu
Technological exploration of RRAM crossbar array for matrix-vector multiplication. ASP-DAC 2015: 106-111 - [c137]Shuangchen Li, Ang Li, Yongpan Liu, Yuan Xie, Huazhong Yang:
Nonvolatile memory allocation and hierarchy optimization for high-level synthesis. ASP-DAC 2015: 166-171 - [c136]Lixue Xia
An accurate and low-cost PM2.5 estimation method based on Artificial Neural Network. ASP-DAC 2015: 190-195 - [c135]Chang Liu, Xinghua Yang, Fei Qiao, Qi Wei, Huazhong Yang:
Design methodology for approximate accumulator based on statistical error model. ASP-DAC 2015: 237-242 - [c134]Wulong Liu, Guoqing Chen, Yu Wang, Huazhong Yang:
Modeling and optimization of low power resonant clock mesh. ASP-DAC 2015: 478-483 - [c133]Fei Qiao, Ni Zhou, Yuanchang Chen, Huazhong Yang:
Approximate Computing in Chrominance Cache for Image/Video Processing. BigMM 2015: 180-183 - [c132]Jingna Mao, Bo Zhao, Yong Lian
The effects of GND electrodes in capacitive-coupling body channel communication. BioCAS 2015: 1-4 - [c131]Yongpan Liu, Hehe Li, Xueqing Li, Chun Jason Xue, Yuan Xie, Huazhong Yang:
Self-powered wearable sensor node: Challenges and opportunities. CASES 2015: 189 - [c130]Boxun Li, Lixue Xia
Merging the interface: power, area and accuracy co-optimization for RRAM crossbar-based mixed-signal computing system. DAC 2015: 13:1-13:6 - [c129]Gushu Li, Xiaoming Chen, Guangyu Sun, Henry Hoffmann, Yongpan Liu, Yu Wang
A STT-RAM-based low-power hybrid register file for GPGPUs. DAC 2015: 103:1-103:6 - [c128]Daming Zhang, Yongpan Liu, Xiao Sheng, Jinyang Li, Tongda Wu, Chun Jason Xue, Huazhong Yang:
Deadline-aware task scheduling for solar-powered nonvolatile sensor nodes with global energy migration. DAC 2015: 126:1-126:6 - [c127]Yongpan Liu, Zewei Li, Hehe Li, Yiqun Wang, Xueqing Li, Kaisheng Ma
Ambient energy harvesting nonvolatile processors: from circuit to system. DAC 2015: 150:1-150:6 - [c126]Hehe Li, Yongpan Liu, Qinghang Zhao, Yizi Gu, Xiao Sheng, Guangyu Sun, Chao Zhang, Meng-Fan Chang, Rong Luo, Huazhong Yang:
An energy efficient backup scheme with low inrush current for nonvolatile SRAM in energy harvesting sensor nodes. DATE 2015: 7-12 - [c125]Xiaoming Chen, Yu Wang, Huazhong Yang:
A fast parallel sparse solver for SPICE-based circuit simulators. DATE 2015: 205-210 - [c124]Tianqi Tang, Lixue Xia, Boxun Li, Rong Luo, Yiran Chen, Yu Wang, Huazhong Yang:
Spiking neural network with RRAM: can we use it for real-world application? DATE 2015: 860-865 - [c123]Guangyu Sun, Chao Zhang, Hehe Li, Yue Zhang, Weiqi Zhang, Yizi Gu, Yinan Sun, Jacques-Olivier Klein, Dafine Ravelosona, Yongpan Liu, Weisheng Zhao, Huazhong Yang:
From device to system: cross-layer design exploration of racetrack memory. DATE 2015: 1018-1023 - [c122]Yubin Li, Yuliang Sun, Guohao Dai, Yuzhi Wang, Jiacai Ni, Yu Wang, Guoliang Li, Huazhong Yang:
A self-aware data compression system on FPGA in Hadoop. FPT 2015: 196-199 - [c121]Mengyuan Gu, Kaiyuan Guo, Wenqiang Wang, Yu Wang, Huazhong Yang:
An FPGA-based real-time simultaneous localization and mapping system. FPT 2015: 200-203 - [c120]Yu Wang, Tianqi Tang, Lixue Xia
Energy Efficient RRAM Spiking Neural Network for Real Time Classification. ACM Great Lakes Symposium on VLSI 2015: 189-194 - [c119]Jianan Liu, Xueqing Li, Qi Wei, Huazhong Yang:
A 14-bit 1.0-GS/s dynamic element matching DAC with >80 dB SFDR up to the Nyquist. ISCAS 2015: 1026-1029 - [c118]Yi Li, Fei Qiao, Qi Wei, Huazhong Yang:
Physical computing circuit with no clock to establish Gaussian pyramid of SIFT algorithm. ISCAS 2015: 2057-2060 - [c117]Zhibo Wang, Yongpan Liu, Yinan Sun, Yang Li, Daming Zhang, Huazhong Yang:
An energy-efficient heterogeneous dual-core processor for Internet of Things. ISCAS 2015: 2301-2304 - [c116]Jingna Mao, Bo Zhao, Yong Lian
A 5-tissue-layer lumped-element based HBC circuit model compatible to IEEE802.15.6. ISCAS 2015: 2632-2635 - [c115]Shuangchen Li, Ang Li, Yuan Zhe, Yongpan Liu, Peng Li, Guangyu Sun, Yu Wang, Huazhong Yang, Yuan Xie:
Leveraging emerging nonvolatile memory in high-level synthesis with loop transformations. ISLPED 2015: 61-66 - [c114]Yuzhi Wang, Anqi Yang, Zhan Li, Pengjun Wang, Huazhong Yang:
Blind drift calibration of sensor networks using signal space projection and Kalman filter. ISSNIP 2015: 1-6 - [c113]Song Yao, Xiaoming Chen, Jie Zhang, Qiaoyi Liu, Jia Wang, Qiang Xu
FASTrust: Feature analysis for third-party IP trust verification. ITC 2015: 1-10 - [c112]Xinghua Yang, Fei Qiao, Qi Wei, Huazhong Yang:
A general scheme for noise-tolerant logic design based on probabilistic and DCVS approaches. NEWCAS 2015: 1-4 - [c111]Yongpan Liu, Fang Su, Zhibo Wang, Huazhong Yang:
Design exploration of inrush current aware controller for nonvolatile processor. NVMSA 2015: 1-6 - [c110]Zhan Li, Yuzhi Wang, Anqi Yang, Huazhong Yang:
Drift detection and calibration of sensor networks. WCSP 2015: 1-6 - [i14]Xinghua Yang, Fei Qiao, Qi Wei, Huazhong Yang:
A General Scheme for Noise-Tolerant Logic Design Based on Probabilistic and DCVS Approaches. CoRR abs/1503.02354 (2015) - [i13]Yuze Chi, Guohao Dai, Yu Wang, Guangyu Sun, Guoliang Li, Huazhong Yang:
NXgraph: An Efficient Graph Processing System on a Single Machine. CoRR abs/1510.06916 (2015) - 2014
- [j53]Wulong Liu, Yu Wang, Xue Feng
Exploration of Electrical and Novel Optical Chip-to-Chip Interconnects. IEEE Des. Test 31(5): 28-35 (2014) - [j52]Hua Fan, Xue Han, Sekedi B. Kobenge, Qi Wei, Huazhong Yang:
Design considerations for low power time-mode SAR ADC. Int. J. Circuit Theory Appl. 42(7): 707-730 (2014) - [j51]Wulong Liu, Yu Wang
On-Chip Hybrid Power Supply System for Wireless Sensor Nodes. ACM J. Emerg. Technol. Comput. Syst. 10(3): 23:1-23:22 (2014) - [j50]Xinkai Wang, Pengjun Wang, Peng Zhang, Shuzheng Xu, Huazhong Yang:
A blind audio watermarking algorithm by logarithmic quantization index modulation. Multim. Tools Appl. 71(3): 1157-1177 (2014) - [j49]Xueqing Li, Qi Wei, Zhen Xu, Jianan Liu, Hui Wang
A 14 Bit 500 MS/s CMOS DAC Using Complementary Switched Current Sources and Time-Relaxed Interleaving DRRZ. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(8): 2337-2347 (2014) - [j48]Yi Shan, Yuchen Hao, Wenqiang Wang, Yu Wang
Hardware Acceleration for an Accurate Stereo Vision System Using Mini-Census Adaptive Support Region. ACM Trans. Embed. Comput. Syst. 13(4s): 132:1-132:24 (2014) - [j47]Yiqun Wang, Yongpan Liu, Shuangchen Li, Xiao Sheng, Daming Zhang, Mei-Fang Chiang, Baiko Sai, Xiaobo Sharon Hu
PaCC: A Parallel Compare and Compress Codec for Area Reduction in Nonvolatile Processors. IEEE Trans. Very Large Scale Integr. Syst. 22(7): 1491-1505 (2014) - [c109]Xiaoming Chen, Yu Wang
Statistical analysis of random telegraph noise in digital circuits. ASP-DAC 2014: 161-166 - [c108]Boxun Li, Yuzhi Wang, Yu Wang, Yiran Chen, Huazhong Yang:
Training itself: Mixed-signal training acceleration for memristor-based neural network. ASP-DAC 2014: 361-366 - [c107]Cong Wang, Naehyuck Chang, Younghyun Kim
Storage-less and converter-less maximum power point tracking of photovoltaic cells for a nonvolatile microprocessor. ASP-DAC 2014: 379-384 - [c106]Wulong Liu, Guoqing Chen, Xue Han, Yu Wang
Design Methodologies for 3D Mixed Signal Integrated Circuits: a Practical 12-bit SAR ADC Design Case. DAC 2014: 166:1-166:6 - [c105]Xiaoming Chen, Yu Wang
Run-Time Technique for Simultaneous Aging and Power Optimization in GPGPUs. DAC 2014: 168:1-168:6 - [c104]Yu Wang, Boxun Li, Rong Luo, Yiran Chen, Ningyi Xu, Huazhong Yang:
Energy efficient neural networks for big data analytics. DATE 2014: 1-2 - [c103]Boxun Li, Yu Wang, Yiran Chen, Hai (Helen) Li, Huazhong Yang:
ICE: Inline calibration for memristor crossbar-based computing engine. DATE 2014: 1-4 - [c102]Chang Liu, Fei Qiao, Xinghua Yang, Huazhong Yang:
Hardware acceleration with pipelined adder for Support Vector Machine classifier. DICTAP 2014: 13-16 - [c101]Yuliang Sun, Zilong Wang, Sitao Huang, Lanjun Wang
Accelerating frequent item counting with FPGA. FPGA 2014: 109-112 - [c100]Guohao Dai, Yi Shan, Fei Chen, Yu Wang
Online scheduling for FPGA computation in the Cloud. FPT 2014: 330-333 - [c99]Daming Zhang, Shuangchen Li, Ang Li, Yongpan Liu, Xiaobo Sharon Hu
Intra-task scheduling for storage-less and converter-less solar-powered nonvolatile sensor nodes. ICCD 2014: 348-354 - [c98]Boxun Li, Erjin Zhou, Bo Huang, Jiayi Duan, Yu Wang
Large scale recurrent neural network on GPU. IJCNN 2014: 4062-4069 - [c97]Xinghua Yang, Fei Qiao, Chang Liu, Qi Wei, Huazhong Yang:
Design of multi-stage latency adders using detection and sequence-dependence between successive calculations. ISCAS 2014: 998-1001 - [c96]Yiqun Wang, Hongyang Jia, Yongpan Liu, Qing'an Li, Chun Jason Xue
Register allocation for hybrid register architecture in nonvolatile processors. ISCAS 2014: 1050-1053 - [c95]Bo Zhao, Huazhong Yang, Yong Lian
A novel quasi-static channel enhancing technique for body channel communication. ISCAS 2014: 1094-1097 - [c94]Tianqi Tang, Rong Luo, Boxun Li, Hai Li, Yu Wang
Energy efficient spiking neural network design with RRAM devices. ISIC 2014: 268-271 - [c93]Song Yao, Xiaoming Chen, Yu Wang
Efficient region-aware P/G TSV planning for 3D ICs. ISQED 2014: 171-178 - [c92]Xue Han, Nan Zhao, Qi Wei, Fei Qiao, Huazhong Yang, Hui Wang
A single channel, 6-bit 410-ms/s asynchronous SAR ADC based on 3bits/stage. NEWCAS 2014: 57-60 - [c91]Xiao Sheng, Cong Wang, Yongpan Liu, Hyung Gyu Lee, Naehyuck Chang, Huazhong Yang:
A high-efficiency dual-channel photovoltaic power system for nonvolatile sensor nodes. NVMSA 2014: 1-2 - [i12]Jing Liu, Fei Qiao, Zhijian Ou, Huazhong Yang:
Low-complexity video encoder for smart eyes based on underdetermined blind signal separation. CoRR abs/1405.5948 (2014) - [i11]Yi Li, Qi Wei, Fei Qiao, Huazhong Yang:
Physical Computing With No Clock to Implement the Gaussian Pyramid of SIFT Algorithm. CoRR abs/1408.2289 (2014) - 2013
- [j46]Xiaoming Chen, Yu Wang
Assessment of Circuit Optimization Techniques Under NBTI. IEEE Des. Test 30(6): 40-49 (2013) - [j45]Hua Fan, Qi Wei, Fei Qiao, Huazhong Yang:
A novel redundant pipelined successive approximation register ADC. IEICE Electron. Express 10(5): 20130047 (2013) - [j44]Xiaoming Chen, Hong Luo, Yu Wang
Evaluation and mitigation of performance degradation under random telegraph noise for digital circuits. IET Circuits Devices Syst. 7(5): 273-282 (2013) - [j43]Bingbing Xia, Fei Qiao, Huazhong Yang, Hui Wang
Design Methodology of the Heterogeneous Multi-core Processor With the Combination of Parallelized Multi-core Simulator and Common Register File-Based Instruction Set Extension Architecture. J. Comput. 8(2): 356-364 (2013) - [j42]Xinkai Wang, Pengjun Wang, Peng Zhang, Shuzheng Xu, Huazhong Yang:
A norm-space, adaptive, and blind audio watermarking algorithm by discrete wavelet transform. Signal Process. 93(4): 913-922 (2013) - [j41]Shuhua Zhang
MDCT Sinusoidal Analysis for Audio Signals Analysis and Processing. IEEE Trans. Speech Audio Process. 21(7): 1403-1414 (2013) - [j40]Xiaoming Chen, Yu Wang
NICSLU: An Adaptive Sparse Matrix Solver for Parallel Circuit Simulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(2): 261-274 (2013) - [j39]Bo Zhao, Yong Lian
A Low-Power Fast-Settling Bond-Wire Frequency Synthesizer With a Dynamic-Bandwidth Scheme. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(5): 1188-1199 (2013) - [j38]Weichen Liu
On-Chip Sensor Network for Efficient Management of Power Gating-Induced Power/Ground Noise in Multiprocessor System on Chip. IEEE Trans. Parallel Distributed Syst. 24(4): 767-777 (2013) - [c90]Shuangchen Li, Yongpan Liu, Xiaobo Sharon Hu
Optimal partition with block-level parallelization in C-to-RTL synthesis for streaming applications. ASP-DAC 2013: 225-230 - [c89]Shuai Tao, Xiaoming Chen, Yu Wang
HS3DPG: Hierarchical simulation for 3D P/G network. ASP-DAC 2013: 509-514 - [c88]Pengpeng Chen, Bo Zhao, Rong Luo, Yong Lian
A low-power robust GFSK demodulation technique for WBAN applications. BioCAS 2013: 366-369 - [c87]Xiao Sheng, Yiqun Wang, Yongpan Liu, Huazhong Yang:
SPaC: a segment-based parallel compression for backup acceleration in nonvolatile processors. DATE 2013: 865-868 - [c86]Xinyu He, Shuangchen Li, Yongpan Liu, Xiaobo Sharon Hu, Huazhong Yang:
Utilizing voltage-frequency islands in C-to-RTL synthesis for streaming applications. DATE 2013: 992-995 - [c85]Zilong Wang, Sitao Huang, Lanjun Wang
Accelerating subsequence similarity search based on dynamic time warping distance with FPGA. FPGA 2013: 53-62 - [c84]Sitao Huang, Guohao Dai, Yuliang Sun, Zilong Wang, Yu Wang
DTW-Based Subsequence Similarity Search on AMD Heterogeneous Computing Platform. HPCC/EUC 2013: 1054-1063 - [c83]Boxun Li, Yi Shan, Miao Hu, Yu Wang
Memristor-based approximated computation. ISLPED 2013: 242-247 - [c82]Wulong Liu, Haixiao Du, Yu Wang
TSV-aware topology generation for 3D Clock Tree Synthesis. ISQED 2013: 300-307 - [c81]Xin Li, Wulong Liu, Haixiao Du, Yu Wang
Whitespace-aware TSV arrangement in 3D clock tree synthesis. ISVLSI 2013: 115-120 - [c80]Jing Liu, Fei Qiao, Qi Wei, Huazhong Yang:
A Novel Video Compression Method Based on Underdetermined Blind Source Separation. MUE 2013: 13-20 - [c79]Xinghua Yang, Fei Qiao, Chang Liu, Huazhong Yang:
Design of variable latency adder based on present and transitional states prediction. PATMOS 2013: 120-125 - [c78]Xiaoming Chen, Du Su, Yu Wang
Nonzero pattern analysis and memory access optimization in GPU-based sparse LU factorization for circuit simulation. IA3@SC 2013: 8:1-8:8 - [i10]Feitian Li, Fei Qiao, Qi Wei, Huazhong Yang:
A Novel Reconfigurable Computing Architecture for Image Signal Processing Using Circuit-Switched NoC and Synchronous Dataflow Model. CoRR abs/1310.3356 (2013) - [i9]Shuang Yu, Fei Qiao, Li Luo, Huazhong Yang:
Increasing Compression Ratio of Low Complexity Compressive Sensing Video Encoder with Application-Aware Configurable Mechanism. CoRR abs/1311.1419 (2013) - 2012
- [j37]Yongpan Liu, Yiqun Wang, Hengyu Long, Huazhong Yang:
Lifetime-Aware Battery Allocation for Wireless Sensor Network under Cost Constraints. IEICE Trans. Commun. 95-B(5): 1651-1660 (2012) - [j36]Peng Zhang, Shuzheng Xu, Huazhong Yang:
Selective Host-Interference Cancellation: A New Informed Embedding Strategy for Spread Spectrum Watermarking. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 95-A(6): 1065-1073 (2012) - [j35]Xueqing Li, Qi Wei, Fei Qiao, Huazhong Yang:
Balanced Switching Schemes for Gradient-Error Compensation in Current-Steering DACs. IEICE Trans. Electron. 95-C(11): 1790-1798 (2012) - [j34]Bingbing Xia, Fei Qiao, Zidong Du, Di Zhu, Huazhong Yang:
A "Near-the-Best" System-Level Design Methodology of Multi-Core H.264 Video Decoder Based on the Parallelized Multi-Core Simulator. J. Circuits Syst. Comput. 21(7) (2012) - [j33]Hongli Gao, Fei Qiao, Huazhong Yang:
Design and implementation of motion compensator in memory reduced HDTV decoder with embedded compression engine. Multim. Tools Appl. 56(3): 597-614 (2012) - [j32]Guangyu Sun, Huazhong Yang, Yuan Xie:
Performance/Thermal-Aware Design of 3D-Stacked L2 Caches for CMPs. ACM Trans. Design Autom. Electr. Syst. 17(2): 13:1-13:20 (2012) - [j31]Xiaoming Chen, Yu Wang
Variation-Aware Supply Voltage Assignment for Simultaneous Power and Aging Optimization. IEEE Trans. Very Large Scale Integr. Syst. 20(11): 2143-2147 (2012) - [c77]Shuangchen Li, Yongpan Liu, Daming Zhang, Xinyu He, Pei Zhang, Huazhong Yang:
A hierarchical C2RTL framework for FIFO-connected stream applications. ASP-DAC 2012: 133-138 - [c76]Xiaoming Chen, Yu Wang
An adaptive LU factorization algorithm for parallel circuit simulation. ASP-DAC 2012: 359-364 - [c75]Wei Liu, Xiaotian Fei, Tao Tang, Pengjun Wang, Hong Luo, Beixing Deng, Huazhong Yang:
Application specific sensor node architecture optimization - Experiences from field deployments. ASP-DAC 2012: 389-394 - [c74]Ling Ren, Xiaoming Chen, Yu Wang
Sparse LU factorization for parallel circuit simulation on GPU. DAC 2012: 1125-1130 - [c73]Yiqun Wang, Yongpan Liu, Yumeng Liu, Daming Zhang, Shuangchen Li, Baiko Sai, Mei-Fang Chiang, Huazhong Yang:
A compression-based area-efficient recovery architecture for nonvolatile processors. DATE 2012: 1519-1524 - [c72]Zhaoran Wang, Yu Zhang, Xiaotao Chang, Xiang Mi, Yu Wang, Kun Wang, Huazhong Yang:
Pub/Sub on stream: a multi-core based message broker with QoS support. DEBS 2012: 127-138 - [c71]Yiqun Wang, Yongpan Liu, Shuangchen Li, Daming Zhang, Bo Zhao, Mei-Fang Chiang, Yanxin Yan, Baiko Sai, Huazhong Yang:
A 3us wake-up time nonvolatile processor based on ferroelectric flip-flops. ESSCIRC 2012: 149-152 - [c70]Yi Shan, Zilong Wang, Wenqiang Wang, Yuchen Hao, Yu Wang, Kuen Hung Tsoi, Wayne Luk, Huazhong Yang:
FPGA based memory efficient high resolution stereo vision system for video tolling. FPT 2012: 29-32 - [c69]Pengpeng Chen, Bo Zhao, Rong Luo, Huazhong Yang:
A low-power all-digital GFSK demodulator with robust clock data recovery. ACM Great Lakes Symposium on VLSI 2012: 123-128 - [c68]Peng Zhang, Shuzheng Xu, Huazhong Yang:
An informed unipolar spread spectrum modulation for self-synchronized robust watermarking. ICASSP 2012: 1805-1808 - [c67]Mo Xu, Xiaorui Zhang, Yu Wang
Probabilistic Brain Fiber Tractography on GPUs. IPDPS Workshops 2012: 742-751 - [c66]Xiaoming Chen, Yu Wang
Parallel Circuit Simulation on Multi/Many-core Systems. IPDPS Workshops 2012: 2530-2533 - [c65]Yongpan Liu, Yiqun Wang, Hongyang Jia, Shan Su, Jinghuan Wen, Wenzhu Zhang, Lin Zhang, Huazhong Yang:
An energy harvesting nonvolatile sensor node and its application to distributed moving object detection. IPSN 2012: 149-150 - [c64]Bo Zhao, Huazhong Yang, Hui Wang
A low-power fast-settling bond-wire frequency synthesizer with a dynamic-bandwidth scheme. ISCAS 2012: 1367-1370 - [c63]Hong Luo, Yu Wang
Temporal Performance Degradation under RTN: Evaluation and Mitigation for Nanoscale Circuits. ISVLSI 2012: 183-188 - [c62]Cong Wang, Yongpan Liu, Rong Luo, Huazhong Yang:
A low-complexity symbol-level differential detection scheme for IEEE 802.15.4 O-QPSK signals. WCSP 2012: 1-6 - [i8]Jing Liu, Fei Qiao, Qi Wei, Huazhong Yang:
A Novel Video Compression Approach Based on Underdetermined Blind Source Separation. CoRR abs/1205.4572 (2012) - 2011
- [j30]Yongpan Liu, Shuangchen Li, Jue Wang, Beihua Ying, Huazhong Yang:
An Energy Efficient Sensor Network Processor with Latency-Aware Adaptive Compression. IEICE Trans. Electron. 94-C(7): 1220-1228 (2011) - [j29]Bo Zhao, Guangming Yu, Tao Chen, Pengpeng Chen, Huazhong Yang, Hui Wang:
A Low-Power IF Circuit with 5 dB Minimum Input SNR for GFSK Low-IF Receivers. IEICE Trans. Electron. 94-C(10): 1680-1689 (2011) - [j28]Pengjun Wang, Qingwen Jin, Shuzheng Xu, Huazhong Yang, Habib F. Rashvand:
Efficient construction of irregular codes with midterm block length and near-shannon performance. IET Commun. 5(2): 222-230 (2011) - [j27]Shuhua Zhang, Weibei Dou, Huazhong Yang:
DFT spectrum estimation from critically sampled lapped transforms. Signal Process. 91(2): 300-310 (2011) - [j26]Xiaoming Chen, Wei Wu, Yu Wang
An EScheduler-Based Data Dependence Analysis and Task Scheduling for Parallel Circuit Simulation. IEEE Trans. Circuits Syst. II Express Briefs 58-II(10): 702-706 (2011) - [j25]Yu Wang
Temperature-Aware NBTI Modeling and the Impact of Standby Leakage Reduction Techniques on Circuit Performance Degradation. IEEE Trans. Dependable Secur. Comput. 8(5): 756-769 (2011) - [j24]Yu Wang
Leakage Power and Circuit Aging Cooptimization by Gate Replacement Techniques. IEEE Trans. Very Large Scale Integr. Syst. 19(4): 615-628 (2011) - [j23]Yu Wang
Power Gating Aware Task Scheduling in MPSoC. IEEE Trans. Very Large Scale Integr. Syst. 19(10): 1801-1812 (2011) - [c61]Wei Wu, Yi Shan, Xiaoming Chen, Yu Wang
FPGA Accelerated Parallel Sparse Matrix Factorization for Circuit Simulations. ARC 2011: 302-315 - [c60]Wulong Liu, Yu Wang
On-chip hybrid power supply system for wireless sensor nodes. ASP-DAC 2011: 43-48 - [c59]Tianji Wu, Di Wu, Yu Wang, Xiaorui Zhang, Hong Luo, Ningyi Xu, Huazhong Yang:
Gemma in April: A matrix-like parallel programming architecture on OpenCL. DATE 2011: 703-708 - [c58]Yu Wang
A heterogeneous accelerator platform for multi-subject voxel-based brain network analysis. ICCAD 2011: 339-344 - [c57]Xueqing Li, Qi Wei, Huazhong Yang:
Code-independent output impedance: A new approach to increasing the linearity of current-steering DACs. ICECS 2011: 216-219 - [c56]Ni Zhou, Fei Qiao, Huazhong Yang, Hui Wang
Low-Power Off-Chip Memory Design for Video Decoder Using Embedded Bus-Invert Coding. ISADS 2011: 251-255 - [c55]Zidong Du, Bingbing Xia, Fei Qiao, Huazhong Yang:
System-Level Evaluation of Video Processing System Using SimpleScalar-Based Multi-core Processor Simulator. ISADS 2011: 256-259 - [c54]Yinan Sun, Yongpan Liu, Xiaohan Wang, Hongliang Xu, Huazhong Yang:
Design methodology of multistage time-domain logic speculation circuits. ISCAS 2011: 1944-1947 - [c53]Hong Luo, Xiaoming Chen, Jyothi Velamala, Yu Wang
Circuit-level delay modeling considering both TDDB and NBTI. ISQED 2011: 14-21 - [i7]Fei Wei, Huazhong Yang:
Mini-step Strategy for Transient Analysis. CoRR abs/1103.2447 (2011) - 2010
- [j22]Sekedi B. Kobenge, Huazhong Yang:
A 250KS/s, 0.8V ultra low power successive approximation register ADC using a Dynamic rail-to-rail comparator. IEICE Electron. Express 7(4): 261-267 (2010) - [j21]Li Li, Yongpan Liu, Huazhong Yang, Hui Wang:
Lightweight Precision-Adaptive Time Synchronization in Wireless Sensor Networks. IEICE Trans. Commun. 93-B(9): 2299-2308 (2010) - [j20]Yongpan Liu, Huazhong Yang:
Temperature-Aware Leakage Estimation Using Piecewise Linear Power Models. IEICE Trans. Electron. 93-C(12): 1679-1691 (2010) - [j19]Guangming Yu, Yu Wang
Fast-locking all-digital phase-locked loop with digitally controlled oscillator tuning word estimating and presetting. IET Circuits Devices Syst. 4(3): 207-217 (2010) - [j18]Qian Ding, Yu Wang
Output remapping technique for critical paths soft-error rate reduction. IET Comput. Digit. Tech. 4(4): 325-333 (2010) - [j17]Beihua Ying, Yongpan Liu, Huazhong Yang, Hui Wang:
Evaluation of Tunable Data Compression in Energy-Aware Wireless Sensor Networks. Sensors 10(4): 3195-3217 (2010) - [c52]Yi Shan, Bo Wang, Jing Yan, Yu Wang
FPMR: MapReduce framework on FPGA. FPGA 2010: 93-102 - [c51]Shuhua Zhang
MDCT spectrum separation: Catching the fine spectral structures for stereo coding. ICASSP 2010: 369-372 - [c50]Shuhua Zhang
Maximal Coherence Rotation for stereo coding. ICME 2010: 1097-1101 - [c49]Di Wu, Tianji Wu, Yi Shan, Yu Wang
Making Human Connectome Faster: GPU Acceleration of Brain Network Analysis. ICPADS 2010: 593-600 - [c48]Bingbing Xia, Fei Qiao, Huazhong Yang, Hui Wang:
A fault-tolerant structure for reliable multi-core systems based on hardware-software co-design. ISQED 2010: 191-197 - [c47]Yongpan Liu, Yinan Sun, Yihao Zhu, Huazhong Yang:
Design methodology of variable latency adders with multistage function speculation. ISQED 2010: 824-830 - [c46]Yi Shan, Tianji Wu, Yu Wang
FPGA and GPU implementation of large scale SpMV. SASP 2010: 64-70 - [i6]Fei Wei, Huazhong Yang:
Transmission Line Inspires A New Distributed Algorithm to Solve the Nonlinear Dynamical System of Physical Circuit. CoRR abs/1007.0641 (2010)
2000 – 2009
- 2009
- [j16]Sekedi B. Kobenge, Huazhong Yang:
A novel low power time-mode comparator for successive approximation register ADC. IEICE Electron. Express 6(16): 1155-1160 (2009) - [j15]Hong Luo, Yu Wang
Temperature-Aware NBTI Modeling Techniques in Digital Circuits. IEICE Trans. Electron. 92-C(6): 875-886 (2009) - [j14]Yu Wang
Leakage Power Reduction through Dual Vth Assignment Considering Threshold voltage Variation. J. Circuits Syst. Comput. 18(7): 1243-1261 (2009) - [c45]Yu Wang, Jiang Xu
A case study of on-chip sensor network in multiprocessor system-on-chip. CASES 2009: 241-250 - [c44]Yu Wang, Xiaoming Chen, Wenping Wang, Yu Cao, Yuan Xie, Huazhong Yang:
Gate replacement techniques for simultaneous leakage and aging optimization. DATE 2009: 328-333 - [c43]Hengyu Long, Yongpan Liu, Xiaoguang Fan, Robert P. Dick, Huazhong Yang:
Energy-efficient spatially-adaptive clustering and routing in wireless sensor networks. DATE 2009: 1267-1272 - [c42]Jue Wang, Beihua Ying, Yongpan Liu, Huazhong Yang, Hui Wang:
Energy efficient architecture of sensor network node based on compression accelerator. ACM Great Lakes Symposium on VLSI 2009: 117-120 - [c41]Hengyu Long, Yongpan Liu, Yiqun Wang, Robert P. Dick, Huazhong Yang:
Battery allocation for wireless sensor network lifetime maximization under cost constraints. ICCAD 2009: 705-712 - [c40]Xiaoming Chen, Yu Wang
Variation-aware supply voltage assignment for minimizing circuit degradation and leakage. ISLPED 2009: 39-44 - [c39]Yu Wang
On the efficacy of input Vector Control to mitigate NBTI effects and leakage power. ISQED 2009: 19-26 - [c38]Yan Xu, Weichen Liu
On-line MPSoC Scheduling Considering Power Gating Induced Power/Ground Noise. ISVLSI 2009: 109-114 - [i5]Fei Wei, Huazhong Yang:
From devil to angel, transmission lines boost parallel computing of linear resistor networks. CoRR abs/0910.0663 (2009) - [i4]Bingbing Xia, Fei Qiao, Huazhong Yang, Hui Wang:
A Fault-tolerant Structure for Reliable Multi-core Systems Based on Hardware-Software Co-design. CoRR abs/0910.3736 (2009) - [i3]Fei Wei, Huazhong Yang:
Waveform Transmission Method, a New Waveform-relaxation Based Algorithm to Solve Ordinary Differential Equations in Parallel. CoRR abs/0911.1166 (2009) - 2008
- [j13]Fei Qiao, Huazhong Yang, Gang Huang, Hui Wang:
Implementation of low-swing differential interface circuits for high-speed on-chip asynchronous interconnection. Sci. China Ser. F Inf. Sci. 51(7): 975-984 (2008) - [j12]Lin Zeng, Peng Zhang, Shuzheng Xu, Huazhong Yang:
Robustness Mode Detection Algorithm in the DRM System. IEEE Trans. Broadcast. 54(4): 792-798 (2008) - [j11]Yu Wang
Two-Phase Fine-Grain Sleep Transistor Insertion Technique in Leakage Critical Circuits. IEEE Trans. Very Large Scale Integr. Syst. 16(9): 1101-1113 (2008) - [j10]Saihua Lin, Huazhong Yang, Rong Luo:
A New Family of Sequential Elements With Built-in Soft Error Tolerance for Dual-VDD Systems. IEEE Trans. Very Large Scale Integr. Syst. 16(10): 1372-1384 (2008) - [c37]Yu Wang
Dynamic TDM virtual circuit implementation for NoC. APCCAS 2008: 1533-1536 - [c36]Saihua Lin, Yu Wang, Rong Luo, Huazhong Yang:
A capacitive boosted buffer technique for high-speed process-variation-tolerant interconnect in UDVS application. ASP-DAC 2008: 304-309 - [c35]Qian Ding, Yu Wang
Output Remapping Technique for Soft-Error Rate Reduction in Critical Paths. ISQED 2008: 74-77 - [c34]Fei Wei, Huazhong Yang:
Virtual Transmission Method, A New Distributed Algorithm to Solve Sparse Linear Systems. NCM (1) 2008: 703-709 - [c33]Fei Wei, Huazhong Yang:
Directed transmission method, a fully asynchronous approach to solve sparse linear systems in parallel. SPAA 2008: 365 - [c32]Yang Li, Shuzheng Xu, Huazhong Yang:
Design of Signal Constellations in the Presence of Phase Noise. VTC Fall 2008: 1-5 - [i2]Fei Wei, Huazhong Yang:
Virtual Transmission Method, A New Distributed Algorithm to Solve Sparse Linear Systems. CoRR abs/0807.1949 (2008) - [i1]Fei Wei, Huazhong Yang:
Directed Transmission Method, A Fully Asynchronous Approach to Solve Sparse Linear Systems in Parallel. CoRR abs/0810.3783 (2008) - 2007
- [j9]JianXing Fan, Huazhong Yang, Hui Wang, Xiaolang Yan, Chaohuan Hou:
Phase noise analysis of oscillators with Sylvester representation for periodic time-varying modulus matrix by regular perturbations. Sci. China Ser. F Inf. Sci. 50(4): 587-599 (2007) - [j8]Fei Qiao, Huazhong Yang, Dingli Wei, Hui Wang:
Modified Conditional-Precharge Sense-amplifier-Based Flip-Flop with Improved Speed. J. Circuits Syst. Comput. 16(2): 199-210 (2007) - [j7]Saihua Lin, Huazhong Yang, Rong Luo:
A Novel gamma d/n, RLCG Transmission Line Model Considering Complex RC(L) Loads. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(5): 970-977 (2007) - [c31]Yu Wang, Hong Luo, Ku He, Rong Luo, Huazhong Yang, Yuan Xie:
Temperature-aware NBTI modeling and the impact of input vector control on performance degradation. DATE 2007: 546-551 - [c30]Yongpan Liu, Robert P. Dick, Li Shang, Huazhong Yang:
Accurate temperature-dependent integrated circuit leakage power estimation is easy. DATE 2007: 1526-1531 - [c29]Yaohui Kong, Shuzheng Xu, Huazhong Yang:
A highly linear low voltage CMOS triode transconductor. ECCTD 2007: 739-742 - [c28]Zhixin Tian, Yongpan Liu, Huazhong Yang, Hui Wang:
A Hybrid Genetic Algorithm with Critical Primary Inputs Sharing and Minor Primary Inputs Bits Climbing for Circuit Maximum Power Estimation. ICNC (4) 2007: 183-187 - [c27]Shaohua Wang, Jinguo Quan, Rong Luo, Hao Cheng, Huazhong Yang:
A Noise Reduced Digitally Controlled Oscillator Using Complementary Varactor Pairs. ISCAS 2007: 937-940 - [c26]Saihua Lin, Huazhong Yang, Rong Luo:
A Novel Low Power Interface Circuit Design Technique for Multiple Voltage Islands Scheme. ISCAS 2007: 1401-1404 - [c25]Shuzheng Xu, Pengjun Wang, Feng Zhang, Huazhong Yang:
DRM - the Digital Radio on the Way. ISCC 2007: 151-154 - [c24]Hong Luo, Yu Wang, Ku He, Rong Luo, Huazhong Yang, Yuan Xie:
Modeling of PMOS NBTI Effect Considering Temperature Variation. ISQED 2007: 139-144 - [c23]Yongpan Liu, Huazhong Yang, Robert P. Dick, Hui Wang, Li Shang:
Thermal vs Energy Optimization for DVFS-Enabled Processors in Embedded Systems. ISQED 2007: 204-209 - [c22]Saihua Lin, Huazhong Yang, Rong Luo:
High Speed Soft-Error-Tolerant Latch and Flip-Flop Design for Multiple VDD Circuit. ISVLSI 2007: 273-278 - [c21]Hong Luo, Yu Wang, Ku He, Rong Luo, Huazhong Yang, Yuan Xie:
A Novel Gate-Level NBTI Delay Degradation Model with Stacking Effect. PATMOS 2007: 160-170 - 2006
- [j6]Yu Wang, Huazhong Yang, Hui Wang:
Signal-Path-Level Dual-VT Assignment for Leakage Power Reduction. J. Circuits Syst. Comput. 15(2): 197-216 (2006) - [j5]Chuande Zhi, Huazhong Yang:
A new adaptive delay method for wideband wireless Kahn's RF power amplifiers. IEEE Trans. Consumer Electron. 52(3): 962-965 (2006) - [c20]Hong Luo, Huazhong Yang, Rong Luo:
Accurate and Fast Estimation of Junction Band-to-Band Leakage in Nanometer-Scale MOSFET. APCCAS 2006: 956-959 - [c19]Yu Wang, Hui Wang, Huazhong Yang:
Fine-grain Sleep Transistor Placement Considering Leakage Feedback Gate. APCCAS 2006: 964-967 - [c18]Saihua Lin, Rong Luo, Huazhong Yang, Hui Wang:
A 0.9V 10GHz 71µW Static D Flip-flop by using FinFET Devices. APCCAS 2006: 1795-1798 - [c17]Ning Ge, Yuyu Liu, Huazhong Yang, Hui Wang:
Sigma-delta based clock recovery using on-chip PLL in FPGA. FPT 2006: 135-140 - [c16]Qihong Ge, Huazhong Yang:
A Noise-resilient Channel Estimation Algorithm Based on Two-Dimensional Hadamard Transform for OFDM Systems. ICN/ICONS/MCL 2006: 205 - [c15]Yu Wang, Yongpan Liu, Rong Luo, Huazhong Yang:
Genetic Algorithm Based Fine-Grain Sleep Transistor Insertion Technique for Leakage Optimization. ICNC (1) 2006: 716-725 - [c14]Yu Wang, Yongpan Liu, Rong Luo, Huazhong Yang, Hui Wang:
Two-phase fine-grain sleep transistor insertion technique in leakage critical circuits. ISLPED 2006: 238-243 - [c13]Yu Wang, Hai Lin, Huazhong Yang, Rong Luo, Hui Wang:
Simultaneous Fine-grain Sleep Transistor Placement and Sizing for Leakage Optimization. ISQED 2006: 723-728 - [c12]Yoshitaka Ueda, Hideki Yamauchi, Mamoru Mukuno, Shinji Furuichi, Mayumi Fujisawa, Fei Qiao, Huazhong Yang:
6.33mW MPEG audio decoding on a multimedia processor. ISSCC 2006: 1636-1645 - [c11]Hai Lin, Yu Wang, Rong Luo, Huazhong Yang, Hui Wang:
IR-drop Reduction Through Combinational Circuit Partitioning. PATMOS 2006: 370-381 - [c10]Saihua Lin, Hongli Gao, Huazhong Yang:
Low Clock Swing D Flip-Flops Design by Using Output Control and MTCMOS. PATMOS 2006: 486-495 - [c9]Saihua Lin, Huazhong Yang:
Worst Case Crosstalk Noise Effect Analysis in DSM Circuits by ABCD Modeling. PATMOS 2006: 504-513 - [c8]Qian Ding, Rong Luo, Hui Wang, Huazhong Yang, Yuan Xie:
Modeling the Impact of Process Variation on Critical Charge Distribution. SoCC 2006: 243-246 - [c7]Jun Chen, Rong Luo, Huazhong Yang, Hui Wang:
A Low Power ROM-Less Direct Digital Frequency Synthesizer with Preset Value Pipelined Accumulator. VLSI Design 2006: 377-380 - 2005
- [j4]Shuzheng Xu, Huazhong Yang, Hui Wang:
Application of DAPSK in HF communications. IEEE Commun. Lett. 9(7): 613-615 (2005) - [c6]Zhixin Tian, Huazhong Yang, Rong Luo:
Gibbs sampling in power grid analysis. ASP-DAC 2005: 107-110 - [c5]Qihong Ge, Huazhong Yang:
Comb-Pattern Optimal Pilot in MIMO-OFDM System. ICCNMC 2005: 84-92 - [c4]Yongpan Liu, Huazhong Yang, Rong Luo, Hui Wang:
A Hierarchical Approach for Incremental Floorplan Based on Genetic Algorithms. ICNC (3) 2005: 219-224 - [c3]Juan Wang, Jinguo Quan, Huazhong Yang, Hui Zhong, Sheng Lin:
A Robust and Low Complexity Coarse Frequency Offset Estimation Algorithm for DAB Receivers. ICWN 2005: 118-124 - [c2]Hui Zhang, Huazhong Yang, Shuzheng Xu, Hui Wang:
Improved Multiuser Detection for Fast FH/MFSK Systems. ICWN 2005: 130-136 - 2003
- [j3]Huazhong Yang, Guanzhang Hu:
Laplacian spectrum analysis and spanning tree algorithm for circuit partitioning problems. Sci. China Ser. F Inf. Sci. 46(6): 459-465 (2003) - 2002
- [j2]Gang Huang, Huazhong Yang, Rong Luo, Hui Wang:
An approach to predicting dynamic power dissipation of coupled interconnect network in dynamic CMOS logic circuits. Sci. China Ser. F Inf. Sci. 45(4): 286-298 (2002) - 2001
- [j1]Bin Chen, Huazhong Yang, Hui Wang:
Noise estimation for deep sub-micron integrated circuits. Sci. China Ser. F Inf. Sci. 44(5): 396-400 (2001)
1990 – 1999
- 1999
- [c1]Huazhong Yang, Rong Luo, Hui Wang, Runsheng Liu:
An SA-Based Nonlinear Function Synthesizer for Linear Analog Integrated Circuits. ASP-DAC 1999: 9-
Coauthor Index
[j163] [j125] [j118] [j116] [c277] [c276] [c275] [c273] [c258] [i36] [c231] [c229] [j86] [c215] [c214] [c205] [j75] [c169] [i18] [j62] [j61] [c156] [j57] [j54] [c129] [c125] [c113] [c109] [c105] [c93] [j46] [j44] [j40] [c89] [c78] [j31] [c76] [c74] [c66] [j26] [j24] [c61] [c53] [c44] [c40] [c39] [c38]
[j173] [j172] [c364] [c360] [c357] [c354] [i74] [i73] [i72] [i70] [i69] [i68] [i67] [j166] [j165] [j164] [j163] [j162] [c345] [c338] [c336] [c335] [c334] [c333] [c331] [c329] [c322] [i61] [j144] [j142] [j138] [c318] [c316] [c315] [c309] [c305] [i54] [i48] [c288] [c286] [c268] [c261] [c260] [c259] [c258] [c257] [c256] [c244] [i35] [i31] [j103] [j102] [c242] [c237] [c212] [c206] [c180] [c154] [c152] [c149] [c122] [i13] [c100] [c84]
[j183] [j182] [j181] [j177] [j175] [j172] [j169] [j168] [c365] [c362] [c361] [c359] [c358] [c353] [c352] [j160] [j159] [j158] [j157] [j156] [j152] [j149] [c347] [c344] [c339] [c337] [c330] [c327] [c326] [c324] [c323] [c321] [i63] [j147] [j146] [j143] [j137] [c317] [c312] [c308] [i52] [i51] [i50] [i48] [i45] [i44] [j134] [j127] [j124] [c293] [c292] [c291] [c290] [c287] [c285] [c284] [c283] [c281] [c278] [i43] [i42] [j121] [j112] [c274] [c270] [c267] [c250] [c247] [c246] [i28] [j110] [j108] [j99] [c241] [c239] [c236] [c233] [c227] [c224] [c222] [j93] [c189] [j72] [j63] [c131] [c127] [c119] [j49] [j35] [c57]
Xin-Jun Liu
aka: Xinjun Liu
aka: Xinjun Liu
[j183] [j182] [j181] [j180] [j179] [j177] [j176] [j175] [j172] [j168] [c363] [c361] [c353] [c352] [j161] [j159] [j158] [j157] [j156] [j155] [j154] [j153] [j152] [j151] [j150] [c348] [c346] [c343] [c340] [c339] [c337] [c330] [c327] [c326] [c325] [c323] [c321] [i63] [j147] [j146] [j143] [j140] [j139] [j137] [c320] [c319] [c317] [c312] [i52] [i51] [i50] [i48] [i46] [i45] [j134] [j127] [j124] [c300] [c297] [c294] [c292] [c290] [c284] [c282] [c281] [c278] [i42] [j121] [j120] [j115] [j112] [c274] [c272] [c270] [c265] [c254] [c253] [c251] [c250] [c247] [c246] [i28] [j110] [j109] [j108] [j105] [j104] [j102] [j100] [j99] [j98] [j97] [j96] [c243] [c241] [c240] [c239] [c238] [c236] [c227] [j86] [j83] [c219] [c218] [c199] [c197] [c192] [c189] [j81] [j80] [j75] [j74] [j73] [j72] [j71] [j70] [c182] [c176] [c172] [c171] [c170] [j64] [j63] [j62] [j61] [j60] [c164] [c163] [c162] [c159] [c158] [c146] [c144] [c139] [j59] [c137] [c131] [c129] [c128] [c127] [c126] [c123] [c117] [c115] [c111] [j47] [c107] [c99] [c96] [c91] [c90] [c87] [c86] [j37] [c77] [c73] [c71] [c65] [c62] [j30] [c54] [j21] [j20] [j17] [c47] [c43] [c42] [c41] [c30] [c28] [c23] [c15] [c14] [c4]
[j173] [c360] [c357] [c356] [c355] [c354] [c351] [i74] [i73] [i72] [i70] [i69] [i68] [i67] [j167] [j164] [c350] [c349] [c329] [c328] [c322] [i62] [i61] [i60] [i56] [j142] [c315] [c313] [c306] [c304] [i49] [j126] [j125] [c298] [c279] [i41] [i40] [i37] [j122] [c276] [c273] [c266] [c264] [i36] [i34] [i33] [i32] [i30] [i29] [i26] [i25] [i24] [c234] [j84] [c213] [c196] [c195] [i21] [i20] [c179]
[c338] [j141] [j130] [j129] [j128] [c299] [c295] [j123] [j114] [j113] [j111] [c269] [c252] [c249] [c248] [c245] [j107] [c232] [c230] [c225] [c224] [c223] [c222] [j92] [j91] [c221] [c219] [c216] [c204] [c201] [c194] [c193] [c191] [c190] [i23] [j82] [c177] [c174] [c173] [c172] [c168] [c167] [i19] [j68] [c150] [c145] [c142] [c141] [c140] [i16] [c135] [c133] [c118] [c112] [i14] [c102] [c97] [c92] [i12] [i11] [j45] [j43] [c80] [c79] [i10] [i9] [j35] [j34] [j33] [i8] [c56] [c55] [c48] [i4] [j13] [j8] [c12]
Narayanan Vijaykrishnan
aka: Vijaykrishnan Narayanan
aka: Vijaykrishnan Narayanan
[j178] [j173] [j172] [c366] [c364] [c360] [c357] [c356] [c355] [c354] [c351] [i74] [i73] [i72] [i70] [i69] [i68] [i67] [j167] [j166] [j165] [j164] [j163] [j162] [j159] [c350] [c349] [c345] [c342] [c341] [c338] [c336] [c335] [c334] [c333] [c332] [c331] [c329] [c328] [c322] [i65] [i64] [i62] [i61] [i60] [i59] [i58] [i57] [i56] [i55] [j144] [j142] [j138] [c318] [c316] [c315] [c314] [c313] [c311] [c310] [c309] [c307] [c306] [c305] [c304] [c303] [c302] [i54] [i53] [i49] [i47] [j136] [j127] [j126] [j125] [c298] [c296] [c289] [c288] [c286] [c280] [c279] [i42] [i41] [i40] [i39] [i38] [i37] [j122] [j118] [j117] [j116] [j112] [c277] [c276] [c275] [c274] [c273] [c271] [c268] [c266] [c264] [c262] [c261] [c260] [c259] [c258] [c257] [c256] [c255] [c250] [c244] [i36] [i35] [i34] [i33] [i32] [i31] [i30] [i29] [i27] [i26] [i25] [i24] [j103] [j102] [j101] [j95] [c242] [c237] [c235] [c234] [c231] [c229] [c228] [c226] [j94] [j88] [j87] [j86] [j85] [j84] [c220] [c215] [c214] [c213] [c212] [c206] [c205] [c203] [c196] [c195] [i21] [i20] [j81] [j79] [j75] [j72] [c188] [c187] [c183] [c181] [c180] [c179] [c178] [c170] [c169] [c166] [i18] [i17] [j69] [j66] [j63] [j62] [j61] [c161] [c160] [c157] [c156] [c155] [c154] [c153] [c152] [c151] [c149] [c148] [c144] [c143] [i15] [j58] [j57] [j55] [j54] [c138] [c136] [c134] [c130] [c129] [c125] [c124] [c122] [c121] [c120] [c115] [c113] [i13] [j53] [j51] [j48] [c109] [c108] [c106] [c105] [c104] [c103] [c101] [c100] [c98] [c94] [c93] [j46] [j44] [j40] [j38] [c89] [c85] [c84] [c83] [c82] [c81] [c78] [j31] [c76] [c74] [c72] [c70] [c67] [c66] [c63] [j26] [j25] [j24] [j23] [c61] [c60] [c59] [c58] [c53] [j19] [j18] [c52] [c49] [c46] [j15] [j14] [c45] [c44] [c40] [c39] [c38] [j11] [c37] [c36] [c35] [c31] [c24] [c21] [j6] [c19] [c15] [c14] [c13] [c11]
[j141] [j130] [j128] [c295] [j123] [j114] [j113] [j111] [c277] [c269] [c249] [c248] [c245] [j107] [c232] [c230] [c225] [c224] [j92] [j91] [c221] [c216] [c204] [c201] [c195] [c194] [c193] [c191] [i21] [j81] [j72] [c173] [c168] [c167] [c150] [c145] [c144] [c142] [c141] [c140] [i16] [c135] [c119] [c118] [c112] [i14] [j52] [j49] [c97] [c92] [i11] [j45] [c80] [i10] [j35] [i8] [c57]
[j183] [j181] [j180] [c361] [c352] [j158] [j155] [j153] [c348] [c340] [c327] [c326] [c325] [c321] [j147] [j146] [j143] [j140] [j139] [c320] [c319] [i45] [j134] [c300] [c297] [c282] [c281] [c278] [j121] [c270] [c254] [c247] [c246] [i28] [j98] [c243] [c241] [c239] [c227] [j83] [c189] [j74] [c176] [c171] [c158]
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