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Ivan Ciofi
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2020 – today
- 2024
- [c17]Y. Fang, Alicja Lesniewska, Ivan Ciofi, Philippe Roussel, Chen Wu, Victor Vega-Gonzalez, Ingrid De Wolf, Kris Croes:
BEOL tip-to-tip dielectric reliability characterization using a design-representative test structure. IRPS 2024: 1-7 - [c16]O. Varela Pedreira, Youqi Ding, D. Coenen, Philippe Roussel, A. S. Saleh, Veerle Simons, Houman Zahedmanesh, Ivan Ciofi, Kris Croes:
De-Coupling Thermo-Migration from Electromigration Using a Dedicated Test Structure. IRPS 2024: 1-5 - [c15]D. Tiernc, Antonio Arreghini, Alicja Lesniewska, Y. Jeong, Marleen H. van der Veen, J. Stiers, N. Bazzazian, Ivan Ciofi, Geert Van den Bosch, Maarten Rosmeulen:
Exploring the Reliability Limits for the Z-Pitch Scaling of Molybdenum Inter-Word Line Oxides in 3D NAND. IRPS 2024: 1-5 - [c14]Anshul Gupta, Shreya Kundu, Stefan Decoster, K. Sah, G. Delie, B. Truijen, Davide Tierno, Giulio Marti, O. Varela Pedreira, B. Kenens, Y. Hermans, C. Adelmann, B. de Wachter, Ivan Ciofi, G. Murdoch, A. Cross, Seongho Park, Zsolt Tokei:
Mitigating Line-Break Defectivity with a Sandwiched TiN or W Layer for Metal Pitch 18 NM Aspect Ratio 6 Semi-Damascene Interconnects. VLSI Technology and Circuits 2024: 1-2 - 2023
- [c13]Melina Lofrano, Herman Oprins, Xinyue Chang, Bjorn Vermeersch, Olalla Varela Pedreira, Alicja Lesniewska, Vladimir Cherman, Ivan Ciofi, Kristof Croes, Seongho Park, Zsolt Tokei
:
Towards accurate temperature prediction in BEOL for reliability assessment (Invited). IRPS 2023: 1-7 - [c12]Houman Zahedmanesh, Philippe Roussel, Ivan Ciofi, Kristof Croes:
A pragmatic network-aware paradigm for system-level electromigration predictions at scale. IRPS 2023: 1-6 - [c11]Olalla Varela Pedreira
Challenges for Interconnect Reliability: From Element to System Level. ISPD 2023: 106 - [c10]Giuliano Sisto, R. Preston, Rongmei Chen, Gioele Mirabelli, Anita Farokhnejad, Yun Zhou
Block-level Evaluation and Optimization of Backside PDN for High-Performance Computing at the A14 node. VLSI Technology and Circuits 2023: 1-2 - 2022
- [c9]Houman Zahedmanesh, Ivan Ciofi, Odysseas Zografos, Kristof Croes, Mustafa Badaroglu:
System-Level Simulation of Electromigration in a 3 nm CMOS Power Delivery Network: The Effect of Grid Redundancy, Metallization Stack and Standard-Cell Currents. IRPS 2022: 1-7 - [c8]O. Varela Pedreira
Assessment of critical Co electromigration parameters. IRPS 2022: 8 - 2021
- [c7]Houman Zahedmanesh, Ivan Ciofi, Odysseas Zografos, Mustafa Badaroglu, Kristof Croes:
A Novel System-Level Physics-Based Electromigration Modelling Framework: Application to the Power Delivery Network. SLIP 2021: 1-7
2010 – 2019
- 2018
- [c6]Chen Wu, O. Varela Pedreira
Insights into metal drift induced failure in MOL and BEOL. IRPS 2018: 3 - [c5]Deniz Kocaay, Philippe Roussel, Kristof Croes, Ivan Ciofi, Alicja Lesniewska, Ingrid De Wolf:
Method to assess the impact of LER and spacing variation on BEOL dielectric reliability using 2D-field simulations for <20nm spacing. IRPS 2018: 10-1 - 2017
- [j3]Deniz Kocaay, Philippe Roussel, Kris Croes, Ivan Ciofi, Yves Saad, Ingrid De Wolf:
LER and spacing variability on BEOL TDDB using E-field mapping: Impact of field acceleration. Microelectron. Reliab. 76-77: 131-135 (2017) - 2016
- [j2]Houman Zahedmanesh, Mario Gonzalez, Ivan Ciofi, Kristof Croes, Jürgen Bömmels, Zsolt Tökei
Design considerations for the mechanical integrity of airgaps in nano-interconnects under chip-package interaction; a numerical investigation. Microelectron. Reliab. 59: 102-107 (2016) - 2015
- [c4]Kris Croes, Alicja Lesniewska, Chen Wu, Ivan Ciofi, Agnieszka Banczerowska, B. Briggs, S. Demuynck, Zsolt Tökei, Jürgen Bömmels, Yves Saad, W. Gao:
Intrinsic reliability of local interconnects for N7 and beyond. IRPS 2015: 2 - [c3]Kris Croes, Deniz Kocaay, Ivan Ciofi, Jürgen Bömmels, Zsolt Tökei:
Impact of process variability on BEOL TDDB lifetime model assessment. IRPS 2015: 5 - 2014
- [c2]Trong Huynh Bao
Circuit and process co-design with vertical gate-all-around nanowire FET technology to extend CMOS scaling for 5nm and beyond technologies. ESSDERC 2014: 102-105 - 2012
- [c1]Christoph Kerner, Ivan Ciofi, Thomas Chiarella, Stefaan Van Huylenbroeck:
Methodology for extracting the characteristic capacitances of a power MOSFET transistor, using conventional on-wafer testing techniques. ESSDERC 2012: 221-225
2000 – 2009
- 2001
- [b1]Ivan Ciofi:
Metodi e strumentazione per la caratterizzazione di interconnessioni VLSI. University of Pisa, Italy, 2001 - 2000
- [j1]Carmine Ciofi, Ivan Ciofi, Stefano C. Di Pascoli, Bruno Neri
Temperature controlled oven for low noise measurement systems [for electromigration characterization]. IEEE Trans. Instrum. Meas. 49(3): 546-549 (2000)
Coauthor Index
aka: Kristof Croes
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