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A curated list of awesome resources for HDL design and verification

Shell 175 24 Updated Jul 24, 2026

Windows tool for using CH341A EEPROM/FLASH programmer for other purposes

C++ 219 38 Updated Jul 26, 2026

Displays real time data from serial port

C++ 828 268 Updated Dec 21, 2023

Waveform Viewer Extension for VScode

TypeScript 349 18 Updated Jul 23, 2026

High-speed JTAG via Raspberry Pi 5 RP1 PIO

C 8 1 Updated May 28, 2026

Open Logic FPGA Standard Library

VHDL 992 114 Updated Jul 8, 2026

Affordable 2 GHz 3.2 GS/s 12 bit open-source open-hardware expandable USB real-time oscilloscope

FIRRTL 455 91 Updated Jun 6, 2026

Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTLR4

C++ 330 80 Updated Jun 30, 2025

The official repository for the gem5 computer-system architecture simulator.

C++ 2,733 1,923 Updated Jul 29, 2026

A tool for synthesizing Verilog programs

Verilog 115 14 Updated Aug 25, 2025

📃 White paper for Backend developers

4,985 508 Updated Feb 2, 2025

FPGA modules used together with the PCILeech Direct Memory Access (DMA) Attack Software

Verilog 1,783 390 Updated Apr 8, 2026

Time And Relative Dimension In Logic (TARDIL)

Tcl 4 Updated Apr 8, 2026

This repo provide an index of VLSI content creators and their materials

176 19 Updated Aug 21, 2024

Real-time embedded variable & trace viewer

C 1,471 182 Updated Jun 24, 2026

A http/https proxy using QUIC as transport layer

Go 244 59 Updated Jun 8, 2021

Experimental flows using nextpnr for Xilinx devices

C++ 261 66 Updated Oct 11, 2024

tser - tiny serialization for C++

C++ 147 8 Updated May 5, 2021

Python toolkit for quantitative finance

Python 11,668 1,580 Updated Jul 15, 2026

A curated list of insanely awesome libraries, packages and resources for Quants (Quantitative Finance)

HTML 28,300 3,779 Updated Jul 29, 2026

A huge collection of VHDL/Verilog open-source IP cores scraped from the web

617 174 Updated Jan 18, 2023

Developed with the aim of providing engineers and designers with a centralized resource, this repository serves as a valuable reference for understanding and implementing robust clock domain crossi…

Verilog 72 7 Updated Apr 14, 2024

List of awesome open source hardware tools, generators, and reusable designs

Python 2,379 232 Updated Mar 2, 2026

RTL design for a nasdaq compatible high frequency trading low level. Supports itch on moldudp64.

C 111 27 Updated Dec 24, 2023

Embedded Template Library

C++ 3,080 535 Updated Jul 26, 2026

Digilent JTAG clone hardware + eeprom firmware (.bin)

72 31 Updated Aug 18, 2022

Recipe for FPGA cooking

Verilog 315 67 Updated Sep 29, 2024

HDLBits website practices & solutions

Verilog 806 182 Updated Dec 27, 2023

Verilog (SystemVerilog) coding style

42 13 Updated Jan 7, 2019
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