perf(interp): cut trace loop iteration overhead by siyul-park · Pull Request #159 · siyul-park/minivm

siyul-park · 2026-07-18T00:28:46Z

Summary

lower eligible ARM64 trace loops as one native body with a real backward branch
cache the safepoint budget in a register for native loops and write it back only on cold exits
avoid repeated unchanged local stores across snapshot flushes
add a zero-byte pseudo-use instruction to keep hoisted registers live across the backedge
fall back to bounded forward chaining when native backedge allocation hits register pressure
unify native and chained backedge budget emission

Closes #156.

Verification

go test ./asm/... ./interp -count=1
make check
go test -race ./...
git diff --check

Benchmarks

Focused ARM64 results from the branch:

BenchmarkControl_Sieve/jit: 4.17-4.26 us/op
BenchmarkControl_Sieve/threaded: 15.82-15.91 us/op
BenchmarkMemory_TypedArraySum/jit: 611-625 ns/op
BenchmarkMemory_TypedArraySum/threaded: 6.15-6.21 us/op

Summary by CodeRabbit

New Features
- Improved ARM64 JIT native-loop handling with more precise safepoint budgeting and back-edge control, including smarter retry behavior under register pressure.
- Added a new zero-byte pseudo-instruction to extend derived register live ranges across native loop backward branches (enabling container hoisting).
Bug Fixes
- Ensured pseudo-instructions are never emitted as machine code or relocations during assembly.
- Refined local state tracking so dirty locals are only stored when needed, reducing redundant updates.
Documentation
- Updated JIT loop and loop-invariant container hoisting documentation to reflect the new backward-branch live-range behavior.
Tests
- Added coverage for pseudo-instruction behavior and enhanced validation of loop-entry code metrics.

coderabbitai · 2026-07-18T00:29:17Z

No actionable comments were generated in the recent review. 🎉

ℹ️ Recent review info

⚙️ Run configuration

Configuration used: defaults

Review profile: CHILL

Plan: Pro Plus

Run ID: bb61f69f-8e6a-4fe6-83e3-6903116c4d50

📥 Commits

Reviewing files that changed from the base of the PR and between 03ab3bd and 49aa162.

📒 Files selected for processing (3)

asm/assembler_test.go
asm/instr.go
interp/jit_arm64_test.go

🚧 Files skipped from review as they are similar to previous changes (2)

asm/instr.go
interp/jit_arm64_test.go

📝 Walkthrough

Walkthrough

Adds OpPseudoUse support to assembler encoding and register usage tracking, then applies it to ARM64 native-loop back-edges. JIT lowering now tracks stored locals and cached safepoint budgets, with register-pressure fallback, documentation updates, and loop-size validation.

Changes

Native loop optimization

Layer / File(s)	Summary
Pseudo-use instruction contract `asm/instr.go`, `asm/assembler.go`, `asm/*_test.go`	Defines `OpPseudoUse` as a zero-byte live-range marker, preserves its source-register usage, omits it from encoded output, and tests byte equivalence and register liveness.
JIT state and flush tracking `interp/jit.go`, `interp/jit_arm64.go`	Tracks resident budgets and stored locals through lowering, local initialization, calls, exits, snapshots, and commits.
Native-loop back-edge lowering `interp/jit.go`, `interp/jit_arm64.go`, `interp/jit_arm64_test.go`, `docs/jit-internals.md`, `AGENTS.md`	Adds native-loop retry behavior, cached safepoint budgets, explicit back-edge yielding, hoisted-register liveness preservation, loop-size validation, and updated loop invariants and documentation.

Estimated code review effort: 3 (Moderate) | ~20 minutes

Sequence Diagram(s)

sequenceDiagram
  participant compiler.compile
  participant arm64Lowerer
  participant journalBudget
  participant trapYield
  compiler.compile->>arm64Lowerer: emit nativeLoop
  arm64Lowerer->>arm64Lowerer: emit OpPseudoUse and back edge
  arm64Lowerer->>journalBudget: decrement or persist budget
  arm64Lowerer->>trapYield: yield when budget is exhausted

Possibly related PRs

siyul-park/minivm#154: Introduces related loop-invariant container hoisting extended here with OpPseudoUse.
siyul-park/minivm#151: Overlaps with the ARM64 JIT flush and commit state-handling paths.

🚥 Pre-merge checks | ✅ 5

✅ Passed checks (5 passed)

Check name	Status	Explanation
Title check	✅ Passed	The title clearly summarizes the main change: reducing trace loop iteration overhead.
Description check	✅ Passed	The description covers the key changes, related issue, verification, and benchmark results, matching the template content well enough.
Linked Issues check	✅ Passed	The changes implement the `#156` goals: true native backedges, budget caching, flush/store reduction, pseudo-use liveness, and register-pressure fallback.
Out of Scope Changes check	✅ Passed	The modified docs and tests support the loop-runtime changes and do not introduce unrelated scope.
Docstring Coverage	✅ Passed	No functions found in the changed files to evaluate docstring coverage. Skipping docstring coverage check.

✨ Finishing Touches

📝 Generate docstrings

Create stacked PR
Commit on current branch

🧪 Generate unit tests (beta)

Create PR with unit tests
Commit unit tests in branch feature/cut-per-iteration-overhead

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coderabbitai

Actionable comments posted: 1

🤖 Prompt for all review comments with AI agents

Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.

Inline comments:
In `@interp/jit_arm64_test.go`:
- Around line 1735-1740: Update the vm_jit_entry_bytes_total validation in the
test to require that a metric with label kind=loop is encountered, then assert
its value remains below 16<<10. Ensure the test fails when no matching loop
metric sample is emitted while preserving the existing size assertion.

🪄 Autofix (Beta)

Fix all unresolved CodeRabbit comments on this PR:

Push a commit to this branch (recommended)
Create a new PR with the fixes

ℹ️ Review info

⚙️ Run configuration

Configuration used: defaults

Review profile: CHILL

Plan: Pro Plus

Run ID: 2922a0c7-6a45-498e-aae9-b0caa0a47476

📥 Commits

Reviewing files that changed from the base of the PR and between a601c71 and ad78089.

📒 Files selected for processing (9)

AGENTS.md
asm/assembler.go
asm/assembler_test.go
asm/instr.go
asm/instr_test.go
docs/jit-internals.md
interp/jit.go
interp/jit_arm64.go
interp/jit_arm64_test.go

codecov · 2026-07-18T00:36:09Z

Codecov Report

❌ Patch coverage is 22.22222% with 7 lines in your changes missing coverage. Please review.
✅ Project coverage is 29.69%. Comparing base (a601c71) to head (03ab3bd).

Files with missing lines	Patch %	Lines
interp/jit.go	0.00%	7 Missing ⚠️

Additional details and impacted files

@@           Coverage Diff           @@
##             main     #159   +/-   ##
=======================================
  Coverage   29.68%   29.69%           
=======================================
  Files          86       86           
  Lines       60350    60357    +7     
=======================================
+ Hits        17915    17922    +7     
- Misses      41157    41160    +3     
+ Partials     1278     1275    -3

☔ View full report in Codecov by Harness.
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siyul-park added 3 commits July 18, 2026 00:46

perf(interp): add native trace loop backedges

020e9c5

refactor(interp): clarify native loop lowering state

cff8820

refactor(interp): unify trace backedge budgets

ad78089

fix(interp): keep operand flushes position-safe

03ab3bd

coderabbitai Bot reviewed Jul 18, 2026

View reviewed changes

Comment thread interp/jit_arm64_test.go

test(jit): enforce native loop contracts

49aa162

siyul-park merged commit b4719c5 into main Jul 18, 2026
4 of 5 checks passed

siyul-park deleted the feature/cut-per-iteration-overhead branch July 18, 2026 00:41

siyul-park mentioned this pull request Jul 18, 2026

Fold loop-kind branch legs so in-loop branches stop exiting native code #155

Closed

coderabbitai Bot mentioned this pull request Jul 18, 2026

perf(interp): fold loop branch legs into native back-edges #160

Merged

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siyul-park commented Jul 18, 2026 •

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siyul-park commented Jul 18, 2026 •

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