Ph.D. candidate in Integrated Circuits @ SEU. Researching AI4EDA, formal verification & synthesis optimization. @FORMiND-Lab
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Southeast University
- Nanjing
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17:18
(UTC +08:00)
Highlights
- Pro
LI Min
lee-man
Building Silicon-Proven Verification Tools. Rejecting paper/胶片-only "breakthroughs". Ex. Huawei Engineer. @FORMiND-Lab
Southeast University Shenzhen