A fork of antmicro/tlib, maintained for MeshBench, an RF-accurate MeshCore network simulator. Upstream plus a patch, not a rewrite.
What it adds. SEVONPEND generates an event for any exception entering the pending state, not only ones the CPU would accept.
Why. ARM DDI0403E B1.5.17 does not qualify SEVONPEND by whether the
exception is enabled, and MeshCore's published nRF52 builds sleep on WFE
expecting the wider behaviour. The C# half of the same fix is in
MeshBench/renode-infrastructure;
MeshBench/renode ties them together.
Branches. meshbench-main is the default. sevonpend-any-pending is the
earlier name for the same work, kept so existing references still resolve.
Upstream's branches are untouched.
Reporting. Issues are tracked at MeshBench/meshbench, not here.
Upstream's own documentation and licence are unchanged in the tree.