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1. Channel-Coding-QPSK-For-WiMAX-system Channel-Coding-QPSK-For-WiMAX-system Public

   RTL Implementation of a channel coding (QPSK) for a WiMAX system on a DE0-CV FPGA, using VHDL on Altera Quartus.

   VHDL 2

2. ESP8266_LCD_and_HC-SR04_interfaceWith_PIC16F877A ESP8266_LCD_and_HC-SR04_interfaceWith_PIC16F877A Public

   This project can be used with MPLABX and XC8 compiler, for interfacing HC-SR04 sensors, LCD, ESP8266 and PIC16F877A

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3. 32-bit_RISC-V_pipelined_core 32-bit_RISC-V_pipelined_core Public

   RISC-V processor supporting all forty RV32I user-level instructions. The processor is pipelined with correct hazards handling. The design was tested and verified on the Nexys A7 FPGA using Xilinx V…

   Verilog 2 1

4. Tomasulo_Algorithm_Architectural_Simulator Tomasulo_Algorithm_Architectural_Simulator Public

   C++ architectural simulator capable of assessing the performance of a simplified superscalar out-of-order dual-issue 16-bit RISC processor that uses Tomasulo’s algorithm with speculation

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5. 65nm-TSMC-16-bit-adders 65nm-TSMC-16-bit-adders Public

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6. stereo_depth_estimator stereo_depth_estimator Public

   Forked from gsurma/stereo_depth_estimator

   Stereo depth estimation for self-driving cars 🚗

   Python 1