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  • 07:50 (UTC +08:00)

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@nscscc2019 @OpenXiangShan

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Cryptomator for Windows, macOS, and Linux: Secure client-side encryption for your cloud storage, ensuring privacy and control over your data.

Java 16,168 1,542 Updated Sep 16, 2026

You can flexibility to create a 'Block' by many means. It also provides many useful features, like `list to table`. (obsidian/markdown-it/vuepress plugin/app)

TypeScript 564 23 Updated Sep 5, 2026

DCPerf benchmark suite for hyperscale cloud applications

Python 251 94 Updated Sep 17, 2026
Python 83 16 Updated Oct 29, 2024

Dynamic Instrumentation Tool Platform

C 3,164 630 Updated Sep 19, 2026

A web-based markdown viewer optimized for Obsidian

CSS 1,980 152 Updated Jan 21, 2026
Python 406 59 Updated Sep 17, 2026

The Elixir Cross Referencer

C 1,191 171 Updated Aug 14, 2026

Open-source non-blocking L2 cache

Scala 66 34 Updated Sep 16, 2026
Mathematica 387 42 Updated Sep 25, 2025
C++ 159 89 Updated Sep 20, 2026

《明日方舟》小助手,全日常一键长草!| A one-click tool for the daily tasks of Arknights, supporting all clients.

C++ 23,366 2,852 Updated Sep 20, 2026

A template for developing custom FIRRTL transforms

Scala 10 1 Updated Jan 30, 2020

A Chisel RTL generator for network-on-chip interconnects

Scala 236 40 Updated Nov 7, 2025

Open-source high-performance non-blocking cache

Scala 101 40 Updated Jun 17, 2026

Open-source high-performance RISC-V processor

Scala 7,268 945 Updated Sep 20, 2026
Scala 17 Updated Mar 17, 2022

高颜值的第三方网易云播放器,支持 Windows / macOS / Linux :electron:

Vue 33,305 4,668 Updated Jun 14, 2026

Super fast RISC-V ISA emulator for XiangShan processor

C 349 144 Updated Sep 20, 2026

Get away from UCAS!!!

HTML 14 12 Updated Aug 24, 2022

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

Scala 2,392 919 Updated Sep 13, 2026

RISC-V SoC designed by students in UCAS

Scala 1,552 261 Updated Sep 20, 2026

LaTeX Thesis Template for the University of Chinese Academy of Sciences

TeX 3,908 948 Updated Feb 29, 2024

Rocket Chip Generator

Scala 3,869 1,303 Updated Sep 13, 2026
Verilog 2 1 Updated Aug 15, 2019

MIRROR_SWAMP is a MIPS processor capable of booting linux, and it is specially optimized for DDR3 memory access pattern.

Verilog 6 2 Updated Aug 20, 2019

NonTrivial-MIPS is a synthesizable superscalar MIPS processor with branch prediction and FPU support, and it is capable of booting linux.

SystemVerilog 608 101 Updated Jul 7, 2020

国科大机器学习课程&机器学习笔记

262 70 Updated Nov 11, 2020

My Blog / Jekyll Themes / PWA

HTML 7,608 6,564 Updated Sep 13, 2026
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