Starred repositories
A library for efficient similarity search and clustering of dense vectors.
A high-performance distributed file system designed to address the challenges of AI training and inference workloads.
Matter (formerly Project CHIP) creates more connections between more objects, simplifying development for manufacturers and increasing compatibility for consumers, guided by the Connectivity Standa…
The BusTub Relational Database Management System (Educational)
The official distribution of olcPixelGameEngine, a tool used in javidx9's YouTube videos and projects
The official repository for the gem5 computer-system architecture simulator.
Automatically Discovering Fast Parallelization Strategies for Distributed Deep Neural Network Training
GPGPU-Sim provides a detailed simulation model of contemporary NVIDIA GPUs running CUDA and/or OpenCL workloads. It includes support for features such as TensorCores and CUDA Dynamic Parallelism as…
[MLSys'25] QServe: W4A8KV4 Quantization and System Co-design for Efficient LLM Serving; [MLSys'25] LServe: Efficient Long-sequence LLM Serving with Unified Sparse Attention
Custom programming interpreter for ZSharp (Z#), a custom game programming language I made
Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators
A Fast and Extensible DRAM Simulator, with built-in support for modeling many different DRAM technologies including DDRx, LPDDRx, GDDRx, WIOx, HBMx, and various academic proposals. Described in the…
An x86 monolithic kernel and operating system written in modern C++. Comes with in-house graphical applications and command line utilities, plus ports of existing software. And yes, it runs DOOM!
The NVIDIA® Tools Extension SDK (NVTX) is a C-based Application Programming Interface (API) for annotating events, code ranges, and resources in your applications.
DRAMsim3: a Cycle-accurate, Thermal-Capable DRAM Simulator
Minimal example of animating the HTML5 canvas from C++ using OpenGL through WebAssembly
ONNXim is a fast cycle-level simulator that can model multi-core NPUs for DNN inference
A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching
Repo for SpecEE: Accelerating Large Language Model Inference with Speculative Early Exiting (ISCA25)
mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)
arkhadem / aim_simulator
Forked from CMU-SAFARI/ramulator2A simulator for SK hynix AiM PIM architecture based on Ramulator 2.0