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  1. simple-RVOoO simple-RVOoO Public

    Simple Single Core, Superscalar Out-of-Order Processor implementing RV32IMA

    Scala

  2. Git-Note Git-Note Public

  3. vriscv-cpu vriscv-cpu Public

    5 Stage Pipeline CPU base on RV32I with a few fiexd-length SIMD instructions support

    Scala