Projects for an undergraduate OS course

upstream mirror

GNU toolchain for RISC-V, including GCC

Spike, a RISC-V ISA Simulator

The Computer History Simulation Project

The old Linux kernel source ver 0.11 which has been tested under modern Linux, Mac OSX and Windows.

Stupid memory latency and TLB tester

2025年春季OS课程Slides\实验指导\思维导图\挑战项目等 https://learningos.github.io/os-lectures/

Kernel Address Space Layout Derandomization (KASLD) - A collection of various techniques to infer the Linux kernel base virtual address as an unprivileged local user, for the purpose of bypassing K…

Doug Lea's memory allocator

A small library to modify all page-table levels of all processes from user space for x86_64 and ARMv8.

Arbitrary Speculative Code Execution with Return Instructions

PoC for breaking hypervisor ASLR using branch target buffer collisions

Formally-verified reference monitor for a secure isolated execution ("enclave") environment on ARM TrustZone

compilable linux-0.01

AMD Research Instruction Based Sampling Toolkit

Nemesis: Studying microarchitectural timing leaks in rudimentary CPU interrupt logic

Proof-of-concept code for the SMoTherSpectre exploit.

Proof-of-concept implementation for the paper "A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs" (IEEE S&P 2023)

Proof of concepts for speculative attacks using the BOOM core (https://github.com/riscv-boom/riscv-boom)

A libgloss replacement for RISC-V that supports HTIF

Training in Transient Execution and PhantomCALL, from Inception (SEC'23) Artifacts.

A fully-featured, cross platform XO-CHIP/S-CHIP/CHIP-8 emulator written in C and SDL.

The open-source component of Prime+Scope, published at CCS 2021

Artefacts for: "VMScape: Exposing and Exploiting Incomplete Branch Predictor Isolation in Cloud Environments"