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5 stars written in Verilog
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一步一步写MIPS CPU

Verilog 844 160 Updated Aug 4, 2021

An open-source benchmark for generating design RTL with natural language

Verilog 152 35 Updated Nov 8, 2024
Verilog 100 22 Updated May 27, 2024

Generating Hardware Verification Assertions from Design Specifications via Multi-LLMs

Verilog 45 6 Updated Oct 28, 2024

Microarchitectural control flow integrity (𝜇CFI) verification checks whether there exists a control or data flow from instruction's operands to the program counter.

Verilog 16 2 Updated Jun 22, 2025