- 🔭 I’m currently working on fuzzing using the ARM CoreSight tracing component.
- 🌱 I’m interested in software/hardware security solutions and looking to learn more about their OS integration!
- ⚡ I worked on the RISC-V ISA, extending it for the security of language VMs (such as Pharo)
- 🧑🎓 I recently defended my thesis intitled "Hardware Security for Just-in-Time Compilation in Language Virtual Machines", you can download the slides here (in French) or the complete thesis manuscript here (in English).
- 📫 How to reach me: quentin.ducasse@centralesupelec.fr
-
CentraleSupelec
- Rennes
- qducasse.github.io
- @quentin-ducasse.bsky.social
Pinned Loading
-
pharo-vm-riscv
pharo-vm-riscv PublicForked from pharo-project/pharo-vm
This is the VM used by Pharo
Smalltalk 1
-
brevibench
brevibench Public🧠 Benchmark facility to train networks on different datasets for PyTorch/Brevitas
-
cva6-jitdomain
cva6-jitdomain PublicForked from openhwfoundation/cva6
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
SystemVerilog 1
-
hardblare-ng
hardblare-ng PublicForked from llvm/llvm-project
The LLVM Project is a collection of modular and reusable compiler and toolchain technologies.
LLVM 1
If the problem persists, check the GitHub status page or contact support.